-
公开(公告)号：US20180068867A1
公开(公告)日：2018-03-08
申请号：US15688238
申请日：2017-08-28
申请人： R&D CIRCUITS, INC.
发明人： Donald Thompson , Cosimo Cantatore
CPC分类号： H01L21/486 , B33Y80/00 , G01R1/0483 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2224/16227 , H01L2224/1623 , H01L2224/16235 , H01L2924/15311 , H01L2924/15313 , H01R12/52 , H01R12/7082 , H01R13/112 , H01R13/2414 , H05K1/092 , H05K3/4069 , H05K7/1061 , H05K2203/107 , H05K2203/1131
摘要： The present invention provides for a structure and a mechanism by which by utilizing additive manufacturing processes electrical connections are created that connect the top and bottom of a block in a customizable pattern. Specifically connection points can be created on the surface of the block and route them to alternate locations transforming the original pattern to a smaller, larger, or alternate pattern.
-
公开(公告)号：US12052830B2
公开(公告)日：2024-07-30
申请号：US17542867
申请日：2021-12-06
申请人： R&D Circuits
发明人： Donald Eric Thompson
CPC分类号： H05K3/426 , C25D3/38 , C25D5/02 , C25D7/00 , H05K1/0222 , H05K1/182 , H05K3/0047 , H05K3/368 , H05K2201/09072 , H05K2201/09545 , H05K2201/10303 , H05K2201/10325 , H05K2201/10409 , H05K2203/0723
摘要： The present invention provides a novel method of constructing a coax spring-pin socket that furnishes better performance and is easier to manufacture in volume using common dielectrics and copper plating. This is accomplished by, in application, a lamination of PCB dielectric layers. This dielectric block is then drilled, plated, etched, and drilled in steps for the construction of a coaxial structure for the signal pins, and a ground structure for ground pins. This design process that can be quickly adjusted and customized for each design.
-
公开(公告)号：US10559476B2
公开(公告)日：2020-02-11
申请号：US15688238
申请日：2017-08-28
申请人： R&D Circuits, Inc.
发明人： Donald Thompson , Cosimo Cantatore
摘要： The present invention provides for a structure and a mechanism by which by utilizing additive manufacturing processes electrical connections are created that connect the top and bottom of a block in a customizable pattern. Specifically connection points can be created on the surface of the block and route them to alternate locations transforming the original pattern to a smaller, larger, or alternate pattern.
-
公开(公告)号：US10257930B2
公开(公告)日：2019-04-09
申请号：US15189435
申请日：2016-06-22
申请人： R&D CIRCUITS, INC.
摘要： The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side.
-
公开(公告)号：US20170374739A1
公开(公告)日：2017-12-28
申请号：US15189435
申请日：2016-06-22
申请人： R&D CIRCUITS, INC.
CPC分类号： H05K1/111 , H01L21/486 , H01L23/49827 , H01R13/2435 , H05K1/0251 , H05K1/0296 , H05K1/09 , H05K1/118 , H05K1/18 , H05K3/10 , H05K3/32 , H05K3/368 , H05K3/4007 , H05K3/4038 , H05K3/4046 , H05K2201/10015 , H05K2201/10022 , H05K2201/1003 , H05K2201/10378
摘要： The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side
-
公开(公告)号：US20220252660A1
公开(公告)日：2022-08-11
申请号：US17173441
申请日：2021-02-11
申请人： R & D Circuits, Inc.
发明人： Donald Eric Thompson , Thomas Smith
摘要： The present invention provides a method for detecting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. The present invention accomplishes this by adding a short to ground connection for every back-drill via that will be cut when the back-drill removes the via stub. If the back-drill is bad or failed the short to ground will fail the subsequent electrical tests. The PCB can be repaired by re-drilling the hole or via. The present invention allows for detecting failed back-drills with easy detection in the manufacturing stage using standard equipment and test procedures. This process creates a simple pass-fail measurement that uses an existing common test process to catch failed back drills in the PCB fabrication facility. This allows for easy and cost-effective repair and guarantees back-drill failures do not pass into the field.
-
公开(公告)号：US20210376535A1
公开(公告)日：2021-12-02
申请号：US16887640
申请日：2020-05-29
申请人： R&D Circuits, Inc.
发明人： Donald Eric Thompson
摘要： The present invention provides for an improved method and structure for forming an electrical interconnects mechanism in a Power Distribution Network (PDN) by placing capacitors on the top of the pin array on the printed circuit board (PCB) of the structure to decouple the PDN and results in lower impedance benefitting the frequency range of the PDN effecting a significant performance improvement in the spring-pin inductance from the transmission line. This reduction in impedance reduces the power supply ripple.
-
8.发明授权公开(公告)号：US09978702B2
公开(公告)日：2018-05-22
申请号：US15151658
申请日：2016-05-11
申请人： R&D CIRCUITS, INC.
发明人： James V Russell
IPC分类号： H01L23/00 , H01L23/498 , H01L21/56 , H01L21/48
CPC分类号： H01L21/4853 , G01R1/07378 , H01L21/56 , H01L23/49811 , H01L23/49838
摘要： The present invention relates to a method and an apparatus for a resurfaceable contact pad that uses an epoxy to encapsulate contact pads so that the epoxy and encapsulated contact pads are coplanar on a silicon redistribution interposer. These redistribution interposers electrically connect a wafer semi-conductor to a probe card where it is necessary to convert the course pad arrangement of one with a fine pad arrangement of the other through the use of an interposer board. The present invention relates to an apparatus and a method creates resurfaceable contact pads which may be resurfaced one or multiple times with an abrasive sanding operation to recreate a coplanar surface should any contact pad surfaces become damaged, allowing for a more cost-effective repair.
-
公开(公告)号：US09680245B2
公开(公告)日：2017-06-13
申请号：US14830019
申请日：2015-08-19
申请人： R&D Circuits, Inc
CPC分类号： H01R13/03 , H01R12/52 , H01R13/2414 , H01R43/26 , Y10T29/49208 , Y10T29/4921
摘要： A method and an electrical interconnect mechanism in which elastomeric pins are printed onto metal retainer tabs having at least one protrusion or tab extending laterally therefrom to engage a catch or recess of the laminated housing so as to locate each of the elastomeric pins and secure them within the housing. In one embodiment a champher may be employed with a catch or recess to engagely secure a second protrusion or tab extending laterally from another side of said elastomeric pin. In another embodiment the elastomeric pin may have a solid metal ring or a slide collar around the center of the pin wherein the ring has one or two tabs for engaging the recess in the housing and if preferred also the recess of a champfer.
-
10.发明申请Structure and Implementation Method for implementing an embedded serial data test loopback, residing directly under the device within a printed circuit board 审中-公开用于实现嵌入式串行数据测试环回的结构和实现方法，位于印刷电路板内的设备的正下方公开(公告)号：US20160065334A1
公开(公告)日：2016-03-03
申请号：US14833928
申请日：2015-08-24
申请人： R&D Circuits, Inc.
CPC分类号： H04L1/243 , G01R31/2889 , H04L1/205 , H04L41/24 , H04L43/50 , H05K1/0231 , H05K1/185 , H05K2201/10015
摘要： A method and a structure with multiple implementations is provided that depends on the specific need, for placing (embedding) a serial loopback circuit of known design in a printed circuit board directly beneath the device under test. Micro-vias and traces connect components including transmitter components (TX) and receiver components (RX) that are formed into a loopback circuit for connection to a device under test (DUT). The connection is accomplished by a coupling capacitor with a shortest possible electrical length approximating a straight line between said components and said DUT and said distance is a length of said short straight line times a square root of 2 so that said receiver components are beneath the DUT.
摘要翻译： 提供了具有多个实现的方法和结构，其取决于具体需要，将已知设计的串行回送电路放置（嵌入）在正在被测器件正下方的印刷电路板中。 微通孔和迹线连接组件，包括发射器组件（TX）和接收器组件（RX），其形成为用于连接到被测设备（DUT）的环回电路。 该连接由耦合电容器实现，其具有近似于所述部件和所述DUT之间的直线的最短电长度，并且所述距离是所述短直线的长度乘以2的平方根，使得所述接收器部件在DUT下方 。
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.017 秒)
