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    Charge transfer device and a manufacturing process therefor
    2.
    发明授权
    Charge transfer device and a manufacturing process therefor 失效
    电荷转移装置及其制造方法

    公开(公告)号：US06455345B1

    公开(公告)日：2002-09-24

    申请号：US09963491

    申请日：2001-09-27

    申请人： Akihito Tanabe

    发明人： Akihito Tanabe

    IPC分类号： H01L2100

    CPC分类号： H01L27/14683 ,  H01L27/14806 ,  H01L27/14843

    摘要： This invention provides a manufacturing process for a charge transfer device comprising an N-type well formed in a P-type well on a semiconductor substrate for transferring a signal charge, an N+ region formed on both sides along the charge transfer direction of the N-type well and containing a dopant in a higher concentration than that in the N-type well, a P-type region formed around the N+ region, and a gate electrode covering the N+ region and the N-type well and formed via a gate insulator, comprising ion-implanting an N-type dopant into the region to be the N-type well and the N+ region using the first mask and ion-implanting a P-type dopant into the region to be the N-type well using the second mask. Thus, there can be provided a charge transfer device which has a structure where there is an N+ region on both sides of the N-type well, a large maximum transferable charge and a compact CCD with a width up to 3 times the minimum design dimension.

    摘要翻译： 本发明提供了一种电荷转移装置的制造方法，该电荷转移装置包括在用于转移信号电荷的半导体衬底上的P型阱中形成的N型阱，沿着N型阱的电荷转移方向在两侧形成的N + 类型良好，并且含有比N型阱中更高的浓度的掺杂剂，形成在N +区域周围的P型区域和覆盖N +区域和N型阱并且经由栅极绝缘体形成的栅电极 包括使用第一掩模将N型掺杂剂离子注入到作为N型阱的区域和N +区域中，并使用第二掩模将P型掺杂剂离子注入该N区域中的N型阱 面具。 因此，可以提供一种电荷转移装置，其具有在N型阱的两侧具有N +区域的结构，大的最大可转移电荷和紧凑的CCD，其宽度可达最小设计尺寸的3倍 。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08809939B2

    公开(公告)日：2014-08-19

    申请号：US12532302

    申请日：2008-03-27

    申请人： Akihito Tanabe

    发明人： Akihito Tanabe

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7833 ,  H01L29/1054 ,  H01L29/66545 ,  H01L29/66613

    摘要： To suppress short channel effects and obtain a high driving current by means of a semiconductor device having an MISFET wherein a material having high mobility and high dielectric constant, such as germanium, is used for a channel. A p-type well is formed on a surface of a p-type silicon substrate. A silicon germanium layer having a dielectric constant higher than that of the p-type silicon substrate is formed to have a thickness of 30 nm or less on the p-type well. Then, on the silicon germanium layer, a germanium layer having a dielectric constant higher than that of the silicon germanium layer is formed to have a thickness of 3-40 nm by epitaxial growing. The germanium layer is permitted to be a channel region; and a gate insulating film, a gate electrode, a side wall insulating film, an n-type impurity diffusion region and a silicide layer are formed.

    摘要翻译： 通过具有MISFET的半导体器件抑制短沟道效应并获得高驱动电流，其中具有高迁移率和高介电常数的材料（例如锗）被用于沟道。 在p型硅衬底的表面上形成p型阱。 在p型阱上形成介电常数高于p型硅衬底的硅锗层的厚度为30nm以下。 然后，在硅锗层上，通过外延生长，形成具有高于硅锗层的介电常数的锗层，其厚度为3-40nm。 锗层被允许为通道区域; 形成栅绝缘膜，栅电极，侧壁绝缘膜，n型杂质扩散区和硅化物层。

    Charge transfer device and method of driving the same
    5.
    发明授权
    Charge transfer device and method of driving the same 失效
    电荷转移装置及其驱动方法

    公开(公告)号：US6157053A

    公开(公告)日：2000-12-05

    申请号：US84460

    申请日：1998-05-26

    申请人： Akihito Tanabe

    发明人： Akihito Tanabe

    IPC分类号： H01L29/762 ,  H01L21/339 ,  H01L27/148 ,  H01L29/768

    CPC分类号： H01L27/148 ,  H01L29/76808 ,  H01L29/76816

    摘要： There is provided a charge transfer device including (a) a charge transfer channel for transferring signal charges therethrough, (b) a floating diffusion region for accumulating therein charges transferred from the charge transfer channel, (c) a field effect transistor for resetting the floating diffusion region so that the floating diffusion region is at a predetermined potential and (d) a bias charge input section through which a bias charge is supplied and which is connected to either the charge transfer channel or the floating diffusion region. The field effect transistor includes a reset gate electrode and a reset drain. The charge transfer channel located below the reset gate electrode is designed to receive either a potential lower than a potential of the reset drain when the floating diffusion region is reset in the case that charges to be transferred are electrons, or a potential higher than a potential of the reset drain when the floating diffusion region is reset in the case that charges to be transferred are holes. The above-mentioned charge transfer device ensures to reset the floating diffusion region regardless of whether a potential in the reset drain is greater or smaller than a potential in a channel located below the reset gate electrode.

    摘要翻译： 提供了一种电荷转移装置，包括：（a）用于传送信号电荷的电荷转移通道，（b）用于在其中累积从电荷转移通道转移的电荷的浮动扩散区，（c）用于复位浮动的场效应晶体管 扩散区域，使得浮动扩散区域处于预定电位;以及（d）偏置电荷输入部分，通过该偏置电荷输入部分提供偏置电荷并连接到电荷转移通道或浮动扩散区域。 场效应晶体管包括复位栅电极和复位漏极。 位于复位栅电极下方的电荷传输通道被设计成在浮置电荷被移动的电荷为电子时，或在高于电位的电位时，在浮置扩散区被复位时接收低于复位漏极的电位的电位 当在要传送的电荷的情况下浮置扩散区域被复位时，复位漏极的位置是空穴。 无论复位漏极中的电位是否大于或小于位于复位栅极电极下方的沟道中的电位，上述电荷转移器件确保复位浮动扩散区域。

    Method of driving photoelectric conversion device
    6.
    发明授权
    Method of driving photoelectric conversion device 失效
    光电转换装置的驱动方法

    公开(公告)号：US5565676A

    公开(公告)日：1996-10-15

    申请号：US467305

    申请日：1995-06-06

    申请人： Akihito Tanabe ,  Shigeru Tohyama

    发明人： Akihito Tanabe ,  Shigeru Tohyama

    IPC分类号： H01L27/14 ,  H01L27/148 ,  H01L31/0232 ,  H01L31/10 ,  H01L31/108 ,  G01J5/02 ,  G01J5/20

    CPC分类号： H01L31/0232 ,  H01L27/14806 ,  H01L31/108

    摘要： Disclosed is a photoelectric conversion device in which a photodiode capacitance is increased. A transparent electrode is formed between a reflecting plate and a photodiode constituting a unitary picture element of a CCD image sensor. It is so formed that light is incident from the rear surface and the loop of the standing wave of the light comes on a platinum silicide film, thereby achieving the effective absorption of the incident light. The transparent electrode is formed between the reflecting plate and the photodiode in opposition to the platinum silicide film. The capacitance between the transparent electrode and the platinum silicide film can be utilized as photodiode capacitance. Optically optimum thickness is assured by individually forming the reflecting plate which optimizes optical properties represented by the absorption of the incident light, and the transparent electrode used for increasing the photodiode capacitance, and also applying a pulse voltage to the transparent electrode at a given timing in such a manner that the potential at the time of resetting of the photodiode potential is lower than that obtained when the charge is accumulated.

    摘要翻译： 公开了一种光电二极管电容增加的光电转换装置。 在反射板和构成CCD图像传感器的整体像素的光电二极管之间形成透明电极。 它形成为光从后表面入射，并且光的驻波的环到达铂硅化物膜，从而实现入射光的有效吸收。 透明电极形成在与铂硅化物膜相反的反射板和光电二极管之间。 透明电极和硅化铂膜之间的电容可用作光电二极管电容。 通过分别形成优化由入射光的吸收表示的光学特性的反射板和用于增加光电二极管电容的透明电极，并且在给定的定时向透明电极施加脉冲电压来确保光学最佳厚度 使得光电二极管电位复位时的电位低于电荷累积时的电位。

    SiGe photodiode
    7.
    发明授权
    SiGe photodiode 有权
    SiGe光电二极管

    公开(公告)号：US08269303B2

    公开(公告)日：2012-09-18

    申请号：US12919638

    申请日：2009-03-09

    申请人： Junichi Fujikata ,  Toru Tatsumi ,  Akihito Tanabe ,  Jun Ushida ,  Daisuke Okamoto ,  Kenichi Nishi

    发明人： Junichi Fujikata ,  Toru Tatsumi ,  Akihito Tanabe ,  Jun Ushida ,  Daisuke Okamoto ,  Kenichi Nishi

    IPC分类号： H01L31/105

    CPC分类号： H01L31/105 ,  G02B6/12004 ,  G02B6/4204 ,  G02B6/4214 ,  H01L31/022408 ,  H01L31/028 ,  H01L31/03529 ,  Y02E10/547

    摘要： The lattice mismatching between a Ge layer and a Si layer is as large as about 4%. Thus, when the Ge layer is grown on the Si layer, penetration dislocation is introduced to cause leakage current at the p-i-n junction. Thereby, the photo-detection sensitivity is reduced, and the reliability of the element is also lowered. Further, in the connection with a Si waveguide, there are also problems of the reflection loss due to the difference in refractive index between Si and Ge, and of the absorption loss caused by a metal electrode. In order to solve said problems, according to the present invention, there is provided a vertical type pin-SiGe photodiode having a structure which is embedded in a groove formed in a part of a Si layer, in which a p-type or n-type doped layer is formed in a lower section of the groove, and in which a i-SiGe layer having a rectangular shape or a reverse tapered shape is formed on a layered structure formed by laminating a i-Si layer and a SiGe buffer layer on the lower section and the side wall of the groove. Further, in an optical connection section with a Si waveguide, impedance matching is effected by the layered structure composed of the i-Si layer and the SiGe buffer layer, and an upper metal layer is separated therefrom so that a poly-Si bridge structure is employed to electrically connect the upper metal layer therewith.

    摘要翻译： Ge层与Si层之间的晶格失配大至4％左右。 因此，当Ge层在Si层上生长时，引入穿透位错以在p-i-n结处引起漏电流。 因此，光检测灵敏度降低，并且元件的可靠性也降低。 此外，在与Si波导的连接中，还存在由于Si和Ge之间的折射率的差异以及由金属电极引起的吸收损耗的反射损耗的问题。 为了解决所述问题，根据本发明，提供了一种垂直型pin-SiGe光电二极管，其具有嵌入到形成在Si层的一部分中的凹槽中的结构，其中p型或n- 在沟槽的下部形成有型掺杂层，其中在通过层叠i-Si层和SiGe缓冲层而形成的层叠结构上形成具有矩形或倒锥形的i-SiGe层 凹槽的下部和侧壁。 此外，在具有Si波导的光学连接部中，通过由i-Si层和SiGe缓冲层构成的层叠结构实现阻抗匹配，并且将上部金属层与其分离，使得多Si桥结构 用于将上部金属层电连接到其上。

    SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体装置及其制造方法

    公开(公告)号：US20110001188A1

    公开(公告)日：2011-01-06

    申请号：US12919548

    申请日：2009-03-11

    申请人： Akihito Tanabe

    发明人： Akihito Tanabe

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7606

    摘要： An impact ionization MISFET includes: a gate insulating film which has one surface contacting the surface of a semiconductor substrate; a gate electrode that contacts the other surface of the gate insulating film; and a drain region, channel region, impact ionization region, and source region that are formed in one direction on the semiconductor substrate. The channel region is on the surface of the semiconductor substrate to which the gate insulating film is in contact, and a channel is generated when a voltage is applied to the gate electrode. When a voltage is applied between the drain region and the source region and when a channel is generated in the channel region, avalanche multiplication of carriers injected from the source region occurs in the impact ionization region. The flow path of the carriers between the channel and the source region occurs within the semiconductor substrate.

    摘要翻译： 冲击电离MISFET包括：栅极绝缘膜，其具有与半导体衬底的表面接触的一个表面; 与栅极绝缘膜的另一个表面接触的栅电极; 以及在半导体基板上沿一个方向形成的漏极区域，沟道区域，冲击电离区域和源极区域。 沟道区域位于与栅极绝缘膜接触的半导体衬底的表面上，并且当向栅电极施加电压时产生沟道。 当在漏极区域和源极区域之间施加电压，并且当在沟道区域中产生沟道时，从源极区域注入的载流子的雪崩乘法发生在冲击电离区域中。 沟道和源极区之间的载流子的流路发生在半导体衬底内。

    Solid state imaging device and method for manufacturing the same
    10.
    发明授权
    Solid state imaging device and method for manufacturing the same 有权
    固态成像装置及其制造方法

    公开(公告)号：US06346722B1

    公开(公告)日：2002-02-12

    申请号：US09340127

    申请日：1999-06-28

    申请人： Yukiya Kawakami ,  Akihito Tanabe ,  Nobuhiko Mutoh

    发明人： Yukiya Kawakami ,  Akihito Tanabe ,  Nobuhiko Mutoh

    IPC分类号： H01L27148

    CPC分类号： H01L27/14812 ,  H01L27/14683

    摘要： A charge storing layer of a photodiode having an N-type conductivity includes an N+-type additional implant area in the vicinity of a junction between the charge storing layer and an isolation region. The additional implant area provides an increase of stored charge and suppression of increase of the pulse voltage for a substrate shutter, and can be made to have a smaller width within a current design rule.

    摘要翻译： 具有N型导电性的光电二极管的电荷存储层包括在电荷存储层和隔离区之间的结的附近的N +型附加注入区。 额外的注入区域提供了存储电荷的增加和抑制衬底快门的脉冲电压的增加，并且可以在当前设计规则内使其具有较小的宽度。