公开(公告)号：US08344514B2

公开(公告)日：2013-01-01

申请号：US13085112

申请日：2011-04-12

申请人： Chad A. Cobbley ,  Jonathon G. Greenwood

发明人： Chad A. Cobbley ,  Jonathon G. Greenwood

IPC分类号： H01L29/40

CPC分类号： H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2924/00

摘要： A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

摘要翻译： 半导体器件的导电通孔包括延伸到制造衬底的有源表面的相对小的直径部分和延伸到制造衬底的背侧的对应的相对较大的直径部分。 这种类型的导电通孔可以通过在BEOL处理之前或期间形成相对较小的直径部分来制造，而每个导电通孔的大直径部分可以在BEOL处理完成之后制造。 还公开了包括具有这种导电通孔的一个或多个半导体器件的电子器件。

公开(公告)号：US07939449B2

公开(公告)日：2011-05-10

申请号：US12052418

申请日：2008-06-03

申请人： Chad A. Cobbley ,  Jonathon G. Greenwood

发明人： Chad A. Cobbley ,  Jonathon G. Greenwood

IPC分类号： H01L21/311

CPC分类号： H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2924/00

摘要： A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

摘要翻译： 半导体器件的导电通孔包括延伸到制造衬底的有源表面的相对小的直径部分和延伸到制造衬底的背侧的对应的相对较大的直径部分。 这种类型的导电通孔可以通过在BEOL处理之前或期间形成相对较小的直径部分来制造，而每个导电通孔的大直径部分可以在BEOL处理完成之后制造。 还公开了包括具有这种导电通孔的一个或多个半导体器件的电子器件。

公开(公告)号：US20110180936A1

公开(公告)日：2011-07-28

申请号：US13085112

申请日：2011-04-12

申请人： Chad A. Cobbley ,  Jonathon G. Greenwood

发明人： Chad A. Cobbley ,  Jonathon G. Greenwood

IPC分类号： H01L23/48

CPC分类号： H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2924/00

摘要： A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

摘要翻译： 半导体器件的导电通孔包括延伸到制造衬底的有源表面的相对小的直径部分和延伸到制造衬底的背侧的对应的相对较大的直径部分。 这种类型的导电通孔可以通过在BEOL处理之前或期间形成相对较小的直径部分来制造，而每个导电通孔的大直径部分可以在BEOL处理完成之后制造。 还公开了包括具有这种导电通孔的一个或多个半导体器件的电子器件。

公开(公告)号：US20090294983A1

公开(公告)日：2009-12-03

申请号：US12052418

申请日：2008-06-03

申请人： Chad A. Cobbley ,  Jonathon G. Greenwood

发明人： Chad A. Cobbley ,  Jonathon G. Greenwood

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2924/00

摘要： A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

摘要翻译： 半导体器件的导电通孔包括延伸到制造衬底的有源表面的相对小的直径部分和延伸到制造衬底的背侧的对应的相对较大的直径部分。 这种类型的导电通孔可以通过在BEOL处理之前或期间形成相对较小的直径部分来制造，而每个导电通孔的大直径部分可以在BEOL处理完成之后制造。 还公开了包括具有这种导电通孔的一个或多个半导体器件的电子器件。

公开(公告)号：US20130234275A1

公开(公告)日：2013-09-12

申请号：US13866538

申请日：2013-04-19

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L27/146

CPC分类号： H01L23/00 ,  B33Y80/00 ,  H01L21/50 ,  H01L23/02 ,  H01L23/3128 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14687 ,  H01L31/0203 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/16235 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/05599

摘要： Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.

摘要翻译： 用于光学交互式装置的包装组件和以有效方式形成包装组件的方法，其消除或减少工艺污染物的发生。 在第一实施例中，透明盖附着到包含多个光学交互装置的半导体材料的晶片上。 晶片被分离，并且光学交互设备安装在插入器上并与引线键合电连接。 在第二实施例中，光学交互设备与背面导电元件电连接到插入器。 在第三实施例中，在附加透明盖之前，将光学交互式装置安装到插入器。 在该插入件上方形成一层密封材料，并且切断插入物和密封剂材料以提供单独的包装组件。 在第四实施例中，光学交互式装置安装在预先形成的无引线芯片载体中。

公开(公告)号：US20100283151A1

公开(公告)日：2010-11-11

申请号：US12839834

申请日：2010-07-20

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L25/065 ,  H01L23/538

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/5383 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

摘要翻译： 制造多器件组件的技术。 具体地，涉及用于制造包括至少一个I / C模块和多芯片封装的堆叠封装的技术。 多芯片封装包括耦合到载体的多个集成电路芯片。 骰子被封装，使得导电元件通过密封剂暴露。 导电元件电耦合到芯片。 I / C模块包括具有设置在其上的多个集成电路芯片的插入器。 I / C模块的裸片通过焊丝电耦合到插入器。 插入器被配置为使得通孔与多芯片封装上的导电元件对准。 多芯片封装和I / C模块可以单独制造，然后耦合在一起以形成堆叠封装。

公开(公告)号：US07553688B2

公开(公告)日：2009-06-30

申请号：US11250905

申请日：2005-10-15

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L21/00

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L27/14603 ,  H01L27/14625 ,  H01L27/14683 ,  H01L31/0203 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S257/924 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00011

摘要： The invention provides methods for packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment.

摘要翻译： 本发明提供了用于轻或其它辐射敏感的电子设备的封装方法，例如包括CCD或CMOS芯片的图像传感器。 在本发明的一个实施例中，图像传感器封装通过围绕具有转移模具化合物的屏障的芯片组装并用透明盖覆盖芯片来组装。 在本发明的另一个实施例中，芯片的周边区域（包括诸如引线接合和接合焊盘的互连）用液体分配的环氧树脂封装，并且附着有透明盖。 在本发明的另一个实施例中，芯片封装通过完全透明材料的整体外壳完成。 在本发明的另一个实施例中，将衬底安装的芯片和透明盖子装载到转移模具中，以使它们保持最佳对准。

公开(公告)号：US07332376B2

公开(公告)日：2008-02-19

申请号：US11516455

申请日：2006-09-05

申请人： Chad A. Cobbley

发明人： Chad A. Cobbley

IPC分类号： H01L21/48 ,  H01L23/48 ,  H05K3/30

CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L23/13 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/4824 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  Y10T29/49146 ,  Y10T29/49171 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Methods and apparatuses for encapsulating a microelectronic die or other components in the fabrication of packaged microelectronic devices. In one aspect of the invention, a packaged microelectronic device assembly includes a microelectronic die, a substrate attached to the die, a protective casing covering a portion of the substrate, and a barrier projecting away from the surface of the substrate. The microelectronic die can have an integrated circuit and a plurality of bond-pads operatively coupled to the integrated circuit. The substrate can have a cap-zone defined by an area that is to be covered by the protective casing, a plurality of contact elements arranged in the cap-zone, a plurality of ball-pads arranged in a ball-pad array outside of the cap-zone, and a plurality of conductive lines coupling the contact elements to the ball-pads. The contact elements are electrically coupled to corresponding bond-pads on the microelectronic die, and the protective casing covers the cap-zone. The barrier on the surface of the substrate is configured so that at least a portion of the barrier is outside of the cap-zone and adjacent to at least a portion of the molded section. The barrier is a seal that inhibits the thermosetting material of the protective casing from covering a portion of the substrate outside of the cap-zone. As such, the barrier prevents thermosetting material from leaking between the substrate and a mold outside of the cap-zone during a molding process.

摘要翻译： 用于将微电子管芯或其他部件封装在封装的微电子器件的制造中的方法和装置。 在本发明的一个方面，封装的微电子器件组件包括微电子管芯，连接到管芯的衬底，覆盖衬底的一部分的保护壳体以及远离衬底的表面突出的阻挡层。 微电子管芯可以具有集成电路和可操作地耦合到集成电路的多个接合焊盘。 衬底可以具有由被保护壳体覆盖的区域限定的帽区域，布置在帽区域中的多个接触元件，布置在球垫阵列外部的球垫阵列中的多个球垫 帽区，以及将接触元件耦合到球垫的多个导线。 接触元件电耦合到微电子管芯上的相应接合焊盘，并且保护套管覆盖盖区。 衬底表面上的阻挡层被构造成使得阻挡层的至少一部分在帽区域的外部并且与模制部分的至少一部分相邻。 阻挡层是抑制保护壳体的热固性材料在盖帽区域外部覆盖基底的一部分的密封件。 因此，在模制过程中，屏障防止热固性材料在盖区之外的基板和模具之间泄漏。

公开(公告)号：US07179681B2

公开(公告)日：2007-02-20

申请号：US11021175

申请日：2004-12-23

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/5383 ,  H01L24/10 ,  H01L24/13 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/85444 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.

公开(公告)号：US07109576B2

公开(公告)日：2006-09-19

申请号：US10862102

申请日：2004-06-04

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  B33Y70/00 ,  B33Y80/00 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor component includes a substrate and multiple stacked, encapsulated semiconductor dice on the substrate. A first die is back bonded to the substrate and encapsulated in a first encapsulant, and a second die is back bonded to the first encapsulant. The first encapsulant has a planar surface for attaching the second die, and can also include locking features for the second die. The component also includes a second encapsulant encapsulating the second die and forming a protective body for the component. A method for fabricating the component includes the steps of attaching the first die to the substrate, forming the first encapsulant on the first die, attaching the second die to the first encapsulant, and forming the second encapsulant on the second die.

摘要翻译： 半导体部件包括衬底和在衬底上的多个堆叠的，封装的半导体晶片。 将第一管芯重新结合到衬底并封装在第一密封剂中，并且将第二管芯重新结合到第一密封剂上。 第一密封剂具有用于附接第二模具的平坦表面，并且还可以包括用于第二模具的锁定特征。 该组件还包括封装第二模具的第二密封剂并且形成用于该部件的保护体。 一种制造该部件的方法包括以下步骤：将第一管芯附接到基板上，在第一管芯上形成第一密封剂，将第二管芯附接到第一密封剂，以及在第二管芯上形成第二密封剂。