公开(公告)号：US20060200248A1

公开(公告)日：2006-09-07

申请号：US11071539

申请日：2005-03-03

Applicant: Laurent Beguin ,  Denis Bouttens ,  Charles Cohn ,  Geert Declercq ,  Yann Brunnarius ,  Jean Grimberg ,  Dominique Huguet ,  Eric Lesprit ,  Pierre Massart ,  Bruno Rio ,  Jacques Teissier ,  Bruno Toussaint ,  Bruno Zipoli

Inventor： Laurent Beguin ,  Denis Bouttens ,  Charles Cohn ,  Geert Declercq ,  Yann Brunnarius ,  Jean Grimberg ,  Dominique Huguet ,  Eric Lesprit ,  Pierre Massart ,  Bruno Rio ,  Jacques Teissier ,  Bruno Toussaint ,  Bruno Zipoli

IPC: A61F2/40

CPC classification number: A61F2/4081 ,  A61B17/86 ,  A61B2017/8655 ,  A61F2002/30332 ,  A61F2002/30433 ,  A61F2002/30484 ,  A61F2002/305 ,  A61F2002/30607 ,  A61F2002/30878 ,  A61F2002/30902 ,  A61F2002/4085 ,  A61F2220/0025 ,  A61F2220/0033 ,  A61F2220/0041 ,  A61F2250/0062 ,  A61F2310/00017

Abstract: This prosthesis for the glenoid cavity of the scapula comprises a seat, intended to be fixed to the glenoid cavity of the patient to be treated by means of anchoring screws, said seat comprising a plate able to receive a male insert, and said seat being able to receive a female insert, said inserts being intended to cooperate with the humeral head of the shoulder joint in question or with a humeral implant fitted in the area of said joint. The outer face of the peripheral rim, with which the seat is provided, is configured as a truncated morse cone able to cooperate with a male insert provided with a bearing surface of complementary shape. The plate of the seat is provided with means intended to cooperate with a female insert in order to ensure that the latter is fixed by clipping into it.

Abstract translation: 用于肩胛骨关节腔的假体包括一个座，用于通过固定螺钉固定到待治疗患者的关节盂腔，所述座包括能够接纳阳插入物的板，并且所述座能够 为了接收雌性插入物，所述插入件旨在与所述肩关节的肱骨头或与所述关节区域中的肱骨植入物配合。 配置有座椅的外围边缘的外表面被构造成能够与设置有互补形状的支承表面的公插入口配合的截锥体。 座椅的板设置有用于与母插入件配合的装置，以便确保后者通过夹入固定。

公开(公告)号：US06790760B1

公开(公告)日：2004-09-14

申请号：US09621110

申请日：2000-07-21

Applicant: Charles Cohn ,  Donald Earl Hawk, Jr.

Inventor： Charles Cohn ,  Donald Earl Hawk, Jr.

IPC: H01L2144

CPC classification number: H01L24/49 ,  H01L23/13 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6611 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: A method of manufacturing an integrated circuit package such as a BGA package for use with an integrated circuit chip. The integrated circuit package has a substrate formed with a cavity that exposes a lower conductive level in the package so that connections between the integrated circuit chip and the lower conductive level may be formed to reduce the through holes formed in the substrate. As a result, additional signal line interconnections may be included in the substrate circuit package and/or the size of the integrated circuit chip may be decreased. Each of these may be implemented for enhanced electrical performance. The multiple wire bonding tiers in the substrate may also provide greater wire separation that eases wire bonding and subsequent encapsulation processes.

Abstract translation: 一种制造集成电路封装的方法，例如与集成电路芯片一起使用的BGA封装。 集成电路封装具有形成有空腔的衬底，该空腔暴露封装中的较低导电水平，从而可以形成集成电路芯片和下导电水平面之间的连接，以减少形成在衬底中的通孔。 结果，附加的信号线互连可以包括在衬底电路封装中，和/或可以减小集成电路芯片的尺寸。 这些中的每一个可以被实现以增强电气性能。 衬底中的多引线键合层还可以提供更大的导线分离，从而简化引线键合和随后的封装工艺。

公开(公告)号：US20060175081A1

公开(公告)日：2006-08-10

申请号：US11379256

申请日：2006-04-19

Applicant: Charles Cohn ,  Jeffrey Klemovage

Inventor： Charles Cohn ,  Jeffrey Klemovage

IPC: H05K1/00 ,  H05K3/10

CPC classification number: H05K3/4046 ,  H05K2201/10287 ,  H05K2201/10416 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The present invention provides a printed wiring board and a method of manufacture therefor. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.

Abstract translation: 本发明提供一种印刷线路板及其制造方法。 根据本发明的教导构造的印刷线路板包括具有位于其至少两侧的导电箔的印刷线路板电介质层。 印刷线路板还包括将导电箔互连的固体芯导电材料。

公开(公告)号：US20050150682A1

公开(公告)日：2005-07-14

申请号：US10755616

申请日：2004-01-12

Applicant: Charles Cohn ,  Jeffrey Klemovage

Inventor： Charles Cohn ,  Jeffrey Klemovage

IPC: H05K3/40 ,  H05K1/09 ,  H05K1/11

CPC classification number: H05K3/4046 ,  H05K2201/10287 ,  H05K2201/10416 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The present invention provides a printed wiring board and a method of manufacture therefor. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.

Abstract translation: 本发明提供一种印刷线路板及其制造方法。 根据本发明的教导构造的印刷线路板包括具有位于其至少两侧的导电箔的印刷线路板电介质层。 印刷线路板还包括将导电箔互连的固体芯导电材料。

公开(公告)号：US06465882B1

公开(公告)日：2002-10-15

申请号：US09620939

申请日：2000-07-21

Applicant: Charles Cohn ,  Donald Earl Hawk, Jr.

Inventor： Charles Cohn ,  Donald Earl Hawk, Jr.

IPC: H01L2352

CPC classification number: H01L24/49 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48235 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: An integrated circuit package such as a BGA package for use with an integrated circuit chip. The integrated circuit package has substrate with a cavity that exposes a lower conductive level in the package so that connections between the integrated circuit chip and the lower conductive level may be formed to reduce the through holes formed in the substrate. As a result, additional signal line interconnections may be included in the substrate circuit package and/or the size of the integrated circuit chip may be decreased. Each of these may be implemented for enhanced electrical performance. The multiple wire bonding tiers in the substrate may also provide greater wire separation that eases wire bonding and subsequent encapsulation processes.

Abstract translation: 集成电路封装，例如与集成电路芯片一起使用的BGA封装。 集成电路封装具有具有在封装中暴露较低导电水平的空腔的衬底，使得可以形成集成电路芯片与下导电电平之间的连接，以减少形成在衬底中的通孔。 结果，附加的信号线互连可以包括在衬底电路封装中，和/或可以减小集成电路芯片的尺寸。 这些中的每一个可以被实现以增强电气性能。 衬底中的多引线键合层还可以提供更大的导线分离，从而简化引线键合和随后的封装工艺。

公开(公告)号：US07394028B2

公开(公告)日：2008-07-01

申请号：US11360200

申请日：2006-02-23

Applicant: Charles Cohn

Inventor： Charles Cohn

IPC: H01L21/44 ,  H01R9/09

CPC classification number: H05K1/111 ,  H01L23/49811 ,  H01L23/4985 ,  H01L2224/16225 ,  H05K1/0204 ,  H05K1/0393 ,  H05K1/189 ,  H05K3/064 ,  H05K3/202 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09881 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0376 ,  Y02P70/611

Abstract: A circuit substrate for attachment to an integrated circuit chip comprises an electrical trace, a mounting pad and a dielectric layer. The mounting pad has a first surface, one or more sidewalls and a second surface. The first surface is attached to the electrical trace. The dielectric layer substantially covers the one or more sidewalls of the mounting pad and has an uppermost surface that is substantially coplanar with the second surface of the mounting pad.

Abstract translation: 用于附接到集成电路芯片的电路基板包括电迹线，安装焊盘和介电层。 安装垫具有第一表面，一个或多个侧壁和第二表面。 第一个表面附着在电气痕迹上。 电介质层基本上覆盖安装焊盘的一个或多个侧壁，并且具有与安装焊盘的第二表面基本共面的最上表面。

公开(公告)号：US20060014370A1

公开(公告)日：2006-01-19

申请号：US10878157

申请日：2004-06-28

Applicant: Musawir Chowdhury ,  Charles Cohn

Inventor： Musawir Chowdhury ,  Charles Cohn

IPC: H01L21/44

CPC classification number: H01L23/49805 ,  H01L21/4846 ,  H01L23/36 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K3/242 ,  H05K3/429 ,  H05K2201/0949 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit package is processed by electroplating the integrated circuit package. The electroplating is performed without forming plating traces on a conductive surface of a pad side of the integrated circuit package. Pad areas of the integrated circuit package are thus plated with one or more materials. An integrated circuit may be electrically coupled to pad areas on the integrated circuit package. The integrated circuit package can be electroplated by using the one or more current sources coupled to a back plane of the integrated circuit package. The back plane is patterned, wherein the patterning of the back plane occurs after the step of electroplating.

Abstract translation: 通过电镀集成电路封装来处理集成电路封装。 执行电镀而不在集成电路封装的焊盘侧的导电表面上形成电镀迹线。 因此，集成电路封装的焊盘区域被镀上一种或多种材料。 集成电路可以电耦合到集成电路封装上的焊盘区域。 集成电路封装可以通过使用耦合到集成电路封装的背板的一个或多个电流源进行电镀。 背面被图案化，其中背面的图案发生在电镀步骤之后。

公开(公告)号：US06740222B2

公开(公告)日：2004-05-25

申请号：US09876522

申请日：2001-06-07

Applicant: Charles Cohn

Inventor： Charles Cohn

IPC: C25D502

CPC classification number: H05K3/243 ,  H05K3/062 ,  H05K3/108 ,  H05K3/242 ,  H05K3/28 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0352 ,  H05K2201/09509 ,  H05K2203/0571 ,  H05K2203/1572 ,  H05K2203/1581

Abstract: The present invention provides a method of plating an electrical contact on an integrated circuit (IC) substrate manufactured from a rigid double-sided or multi-layered printed wiring board core with dielectric layers on both sides of the core. The method may include forming electrically connected plating layers on first and second opposing sides of a substrate and electroplating a contact layer over each of the plating layers using the plating layers. The method further includes removing a portion of the plating layers from the first and second opposing sides while leaving the plating layers under the contact layer.

Abstract translation: 本发明提供了一种在由芯的两侧具有电介质层的刚性双面或多层印刷线路板芯制造的集成电路（IC）基板上电镀电接触的方法。 该方法可以包括在基板的第一和第二相对侧上形成电连接的镀层，并且使用镀层在每个镀层上电镀接触层。 该方法还包括从第一和第二相对侧去除一部分镀层，同时将镀层留在接触层下方。

公开(公告)号：US08601683B2

公开(公告)日：2013-12-10

申请号：US11379256

申请日：2006-04-19

Applicant: Charles Cohn ,  Jeffrey M Klemovage

Inventor： Charles Cohn ,  Jeffrey M Klemovage

IPC: H05K3/02 ,  H05K3/10

CPC classification number: H05K3/4046 ,  H05K2201/10287 ,  H05K2201/10416 ,  Y10T29/49124 ,  Y10T29/49155

Abstract: The present invention provides method of manufacture for a printed wiring board. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.

Abstract translation: 本发明提供一种印刷线路板的制造方法。 根据本发明的教导构造的印刷线路板包括具有位于其至少两侧的导电箔的印刷线路板电介质层。 印刷线路板还包括将导电箔互连的固体芯导电材料。

公开(公告)号：US07445638B2

公开(公告)日：2008-11-04

申请号：US11071540

申请日：2005-03-03

Applicant: Laurent Beguin ,  Denis Bouttens ,  Charles Cohn ,  Geert Declercq ,  Yann Brunnarius ,  Jean Grimberg ,  Dominique Huguet ,  Eric Lesprit ,  Pierre Massart ,  Bruno Rio ,  Jacques Teissier ,  Bruno Toussaint ,  Bruno Zipoli

Inventor： Laurent Beguin ,  Denis Bouttens ,  Charles Cohn ,  Geert Declercq ,  Yann Brunnarius ,  Jean Grimberg ,  Dominique Huguet ,  Eric Lesprit ,  Pierre Massart ,  Bruno Rio ,  Jacques Teissier ,  Bruno Toussaint ,  Bruno Zipoli

IPC: A61F2/40 ,  A61F2/30

CPC classification number: A61F2/4014 ,  A61F2/4059 ,  A61F2002/30332 ,  A61F2002/30405 ,  A61F2002/305 ,  A61F2002/30537 ,  A61F2002/3054 ,  A61F2002/30594 ,  A61F2002/30607 ,  A61F2002/3082 ,  A61F2002/4037 ,  A61F2002/4044 ,  A61F2220/0025 ,  A61F2220/0033 ,  A61F2250/0004 ,  A61F2250/0062 ,  A61F2310/00017 ,  A61F2310/00029

Abstract: This adaptable humeral implant comprises an anchoring stem (1, 8) and a male insert (6) or a female insert (30, 31) which are able to cooperate with the glenoid cavity or a glenoid implant. It additionally comprises a removable support (5) intended to fit directly or indirectly to the upper end (3) of the anchoring stem (1, 8) and to cooperate with an intermediate neck (7), which is itself provided with means for cooperation with the male or female implant.

Abstract translation: 这种适应性肱骨植入物包括能够与关节盂腔或关节盂植入物配合的锚固杆（1,8）和阳插入件（6）或阴插入件（30,31）。 它还包括一个可拆卸的支撑件（5），用于直接地或间接地配合到锚固杆（1,8）的上端（3）并与中间颈部（7）配合，该中间颈部本身设有用于配合的装置 与雄性或雌性植入物。