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公开(公告)号：US08691706B2
公开(公告)日：2014-04-08
申请号：US13349323
申请日：2012-01-12
申请人： Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
发明人： Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
IPC分类号： H01L21/02
CPC分类号： C23C16/0209 , H01L21/67115 , H01L21/67201 , H01L21/67288
摘要： System and method for reducing substrate warpage in a thermal process. An embodiment comprises pre-heating a substrate in a loadlock chamber before performing the thermal process of the substrate. After the thermal process, the substrate is cooled down in a loadlock chamber. The pre-heat and cool-down process reduces the warpage of the substrate caused by the differences in coefficients of thermal expansion (CTEs) of the materials that make up the substrate.
摘要翻译： 用于减少热过程中的基板翘曲的系统和方法。 一个实施例包括在执行衬底的热处理之前预先加载负载锁定室中的衬底。 在热处理之后，基板在负载锁定室中被冷却。 预热和冷却过程减少了由构成基材的材料的热膨胀系数（CTE）所引起的基板翘曲。
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公开(公告)号：US20130183831A1
公开(公告)日：2013-07-18
申请号：US13349323
申请日：2012-01-12
申请人： Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
发明人： Chen-Hua Yu , Wen-Chih Chiou , Fang Wen Tsai , Kuang-Wei Cheng , Jiann Sheng Chang , Yi Chou Lai , Jiung Wu
CPC分类号： C23C16/0209 , H01L21/67115 , H01L21/67201 , H01L21/67288
摘要： System and method for reducing substrate warpage in a thermal process. An embodiment comprises pre-heating a substrate in a loadlock chamber before performing the thermal process of the substrate. After the thermal process, the substrate is cooled down in a loadlock chamber. The pre-heat and cool-down process reduces the warpage of the substrate caused by the differences in coefficients of thermal expansion (CTEs) of the materials that make up the substrate.
摘要翻译： 用于减少热过程中的基板翘曲的系统和方法。 一个实施例包括在执行衬底的热处理之前预先加载负载锁定室中的衬底。 在热处理之后，基板在负载锁定室中被冷却。 预热和冷却过程减少了由构成基材的材料的热膨胀系数（CTE）所引起的基板翘曲。
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公开(公告)号：US08896136B2
公开(公告)日：2014-11-25
申请号：US12827563
申请日：2010-06-30
申请人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/544 , H01L29/40 , H01L23/48 , H01L23/52 , H01L21/76 , H01L21/00 , H01L21/4763 , H01L21/44 , H01L21/683
CPC分类号： H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要： In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译： 根据实施例，结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔（TSV）; 在所述衬底的所述第二区域上方的隔离层，所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料，所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。
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公开(公告)号：US08567837B2
公开(公告)日：2013-10-29
申请号：US12954180
申请日：2010-11-24
申请人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： B66F19/00
CPC分类号： H01L21/6875 , B65G47/90 , H01L21/68707 , Y10T74/20305
摘要： An apparatus includes a robot arm, and a plurality of guide pins mounted on the robot arm. Each of the plurality of guide pins includes a plurality of wafer supports at different levels, with each of the plurality of wafer supports configured to support and center a wafer having a size different from wafers configured to be supported and centered by remaining ones of the plurality of wafer supports.
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5.发明申请公开(公告)号：US20120128457A1
公开(公告)日：2012-05-24
申请号：US12954180
申请日：2010-11-24
申请人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
CPC分类号： H01L21/6875 , B65G47/90 , H01L21/68707 , Y10T74/20305
摘要： An apparatus includes a robot arm, and a plurality of guide pins mounted on the robot arm. Each of the plurality of guide pins includes a plurality of wafer supports at different levels, with each of the plurality of wafer supports configured to support and center a wafer having a size different from wafers configured to be supported and centered by remaining ones of the plurality of wafer supports
摘要翻译： 一种装置包括机器人臂和安装在机器人手臂上的多个引导销。 多个引导销中的每一个包括多个不同级别的晶片支架，其中多个晶片支撑件中的每一个被配置为支撑和定心具有不同晶圆尺寸的晶片，所述晶片被配置为被多个晶圆支撑的中心部分支撑并居中 的晶片支架
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公开(公告)号：US08900994B2
公开(公告)日：2014-12-02
申请号：US13157137
申请日：2011-06-09
申请人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
发明人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
IPC分类号： H01L21/44 , H01L25/065 , H01L23/00 , H01L23/48 , H01L21/683
CPC分类号： H01L25/0657 , H01L21/0217 , H01L21/6835 , H01L21/76831 , H01L21/76834 , H01L21/76871 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/50 , H01L2221/68372 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05018 , H01L2224/05023 , H01L2224/05025 , H01L2224/05073 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05548 , H01L2224/05559 , H01L2224/05562 , H01L2224/05568 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/1411 , H01L2224/14181 , H01L2224/16113 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/01029 , H01L2224/05552
摘要： A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.
摘要翻译： 公开了一种制造硅通孔的系统和方法。 一个实施例包括用从衬底突出的衬垫形成通孔硅通孔。 钝化层形成在衬底和穿通硅通孔之上，钝化层和衬垫从通硅通孔的侧壁凹陷。 然后可以将导电材料形成为与通孔硅通孔的两个侧壁和顶表面接触。
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公开(公告)号：US20120313247A1
公开(公告)日：2012-12-13
申请号：US13157137
申请日：2011-06-09
申请人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
发明人： Chen-Hua Yu , Shin-Puu Jeng , Wen-Chih Chiou , Fang Wen Tsai , Chen-Yu Tsai
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L25/0657 , H01L21/0217 , H01L21/6835 , H01L21/76831 , H01L21/76834 , H01L21/76871 , H01L21/76895 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/50 , H01L2221/68372 , H01L2224/03002 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0347 , H01L2224/0391 , H01L2224/0401 , H01L2224/05008 , H01L2224/05018 , H01L2224/05023 , H01L2224/05025 , H01L2224/05073 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05548 , H01L2224/05559 , H01L2224/05562 , H01L2224/05568 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/1411 , H01L2224/14181 , H01L2224/16113 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/01029 , H01L2224/05552
摘要： A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.
摘要翻译： 公开了一种制造硅通孔的系统和方法。 一个实施例包括用从衬底突出的衬垫形成通孔硅通孔。 钝化层形成在衬底和穿通硅通孔之上，钝化层和衬垫从通硅通孔的侧壁凹陷。 然后可以将导电材料形成为与通孔硅通孔的两个侧壁和顶表面接触。
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公开(公告)号：US20120001337A1
公开(公告)日：2012-01-05
申请号：US12827563
申请日：2010-06-30
申请人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/532 , H01L21/71 , H01L23/522
CPC分类号： H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要： In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译： 根据实施例，结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔（TSV）; 在所述衬底的所述第二区域上方的隔离层，所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料，所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。
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公开(公告)号：US08847388B2
公开(公告)日：2014-09-30
申请号：US13267200
申请日：2011-10-06
申请人： Chen-Hua Yu , Hung-Pin Chang , An-Jhih Su , Tsang-Jiuh Wu , Wen-Chih Chiou , Shin-Puu Jeng
发明人： Chen-Hua Yu , Hung-Pin Chang , An-Jhih Su , Tsang-Jiuh Wu , Wen-Chih Chiou , Shin-Puu Jeng
CPC分类号： H01L23/293 , H01L23/3192 , H01L24/01 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0345 , H01L2224/03452 , H01L2224/0346 , H01L2224/03912 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05571 , H01L2224/05573 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/10126 , H01L2224/11334 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13006 , H01L2224/13007 , H01L2224/13018 , H01L2224/13022 , H01L2224/13082 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2924/00014 , H01L2924/01029 , H01L2924/10253 , H01L2924/15788 , H01L2924/014 , H01L2924/00012 , H01L2924/04941 , H01L2924/01047 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device includes a bump structure formed on a post-passivation interconnect (PPI) line and surrounded by a protection structure. The protection structure includes a polymer layer and at least one dielectric layer. The dielectric layer may be formed on the top surface of the polymer layer, underlying the polymer layer, inserted between the bump structure and the polymer layer, inserted between the PPI line and the polymer layer, covering the exterior sidewalls of the polymer layer, or combinations thereof.
摘要翻译： 半导体器件包括形成在钝化后互连（PPI）线上并由保护结构包围的凸块结构。 保护结构包括聚合物层和至少一个电介质层。 电介质层可以形成在聚合物层的顶表面上，该聚合物层的下面，插入凸起结构和聚合物层之间，插入在PPI线和聚合物层之间，覆盖聚合物层的外侧壁，或 其组合。
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公开(公告)号：US08846499B2
公开(公告)日：2014-09-30
申请号：US12858211
申请日：2010-08-17
申请人： Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Ying-Ching Shih , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L21/30
CPC分类号： G07F17/3213 , B32B17/10 , B32B37/1207 , B32B37/182 , B32B37/185 , B32B2457/14 , H01L21/6835 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要： A composite carrier structure for manufacturing semiconductor devices is provided. The composite carrier structure utilizes multiple carrier substrates, e.g., glass or silicon substrates, coupled together by interposed adhesive layers. The composite carrier structure may be attached to a wafer or a die for, e.g., backside processing, such as thinning processes. In an embodiment, the composite carrier structure comprises a first carrier substrate having through-substrate vias formed therethrough. The first substrate is attached to a second substrate using an adhesive such that the adhesive may extend into the through-substrate vias.
摘要翻译： 提供了一种用于制造半导体器件的复合载体结构。 复合载体结构利用多个载体衬底，例如玻璃或硅衬底，通过插入的粘合剂层耦合在一起。 复合载体结构可以附接到晶片或模具，用于例如背面处理，例如变薄处理。 在一个实施例中，复合载体结构包括具有贯穿其中形成的贯通基板通孔的第一载体基板。 使用粘合剂将第一衬底附接到第二衬底，使得粘合剂可以延伸到贯穿衬底通孔中。
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