公开(公告)号：US09412624B1

公开(公告)日：2016-08-09

申请号：US14316090

申请日：2014-06-26

申请人： Dao Nguyen Phu Cuong ,  Bartholomew Liao Chung Foh ,  Byung Tai Do ,  Kyung Moon Kim ,  Jeffrey David Punzalan ,  SeungYong Chai ,  Soo Won Lee ,  Kwok Keung Szeto ,  KyungOe Kim

发明人： Dao Nguyen Phu Cuong ,  Bartholomew Liao Chung Foh ,  Byung Tai Do ,  Kyung Moon Kim ,  Jeffrey David Punzalan ,  SeungYong Chai ,  Soo Won Lee ,  Kwok Keung Szeto ,  KyungOe Kim

IPC分类号： H01L29/72 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538

CPC分类号： H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/14 ,  H01L2924/15311

摘要： An integrated circuit packaging system, and a method of manufacture thereof, including: a substrate including: a first trace layer, an encapsulation on the first trace layer, the first trace layer having a surface exposed from the encapsulation with a rough texture characteristic of removal of a conductive carrier coating, a second trace layer on the encapsulation and over the first trace layer, the second trace layer connected to the first trace layer; and an integrated circuit die attached to the substrate.

摘要翻译： 一种集成电路封装系统及其制造方法，包括：基板，包括：第一迹线层，第一迹线层上的封装，第一迹线层具有从封装暴露的表面，粗糙纹理特征为去除 导电载体涂层，在封装上和第一迹线层上的第二迹线层，第二迹线层连接到第一迹线层; 以及附接到基板的集成电路管芯。

公开(公告)号：US20090085178A1

公开(公告)日：2009-04-02

申请号：US11864826

申请日：2007-09-28

申请人： Jong-Woo Ha ,  Koo Hong Lee ,  Soo Won Lee ,  JuHyun Park ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan

发明人： Jong-Woo Ha ,  Koo Hong Lee ,  Soo Won Lee ,  JuHyun Park ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan

IPC分类号： H01L23/495 ,  H01L23/02

CPC分类号： H01L23/3121 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.

摘要翻译： 一种集成电路封装系统，包括：形成具有开口的基座结构; 将基座结构装置安装在开口中; 将集成电路装置连接在所述基座结构装置上; 以及在所述基座结构，所述基座结构装置和所述集成电路装置上模制密封剂。

公开(公告)号：US20130249076A1

公开(公告)日：2013-09-26

申请号：US13424710

申请日：2012-03-20

申请人： Soo Won Lee ,  Kyu Won Lee ,  Eun Jin Jeong

发明人： Soo Won Lee ,  Kyu Won Lee ,  Eun Jin Jeong

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/13 ,  H01L21/4846 ,  H01L23/498 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05172 ,  H01L2224/05181 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/16112 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/01007 ,  H01L2924/01074 ,  H01L2924/01029 ,  H01L2924/01023 ,  H01L2924/014 ,  H01L2924/00012

摘要： A semiconductor device has a substrate. A first conductive layer is formed over the substrate. A duplex plated bump on lead pad is formed over the substrate. An insulating layer is formed over the first conductive layer and the substrate. A portion of the insulating over the duplex plated bump on lead pad is removed using a laser direct ablation process. The insulating layer is a lamination layer. The duplex plated bump on lead pad has a wide bump on lead pad. A semiconductor die is mounted over the substrate. The semiconductor die has a composite conductive interconnect structure. The semiconductor die has a first bump and a second bump with a pitch ranging from 90-150 micrometers between the first bump and the second bump. A duplex plated contact pad is formed on a surface of the substrate opposite the duplex plated bump-on-lead pad.

摘要翻译： 半导体器件具有基板。 第一导电层形成在衬底上。 引线板上的双面电镀凸块形成在衬底上。 在第一导电层和基板之上形成绝缘层。 使用激光直接烧蚀工艺去除铅焊盘上的双面电镀凸块上绝缘层的一部分。 绝缘层是层叠层。 导线焊盘上的双面电镀凸块在导线焊盘上有一个很大的凹凸。 半导体管芯安装在衬底上。 半导体管芯具有复合导电互连结构。 半导体管芯具有第一凸块和在第一凸块和第二凸块之间具有从90-150微米的间距的第二凸块。 双面电镀接触焊盘形成在与双面电镀凸块焊盘相对的基板的表面上。

公开(公告)号：US5693558A

公开(公告)日：1997-12-02

申请号：US756566

申请日：1996-11-26

申请人： Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

发明人： Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

IPC分类号： H01S5/00 ,  H01S5/22 ,  H01S5/227 ,  H01L21/20

CPC分类号： H01S5/227 ,  H01S5/2206 ,  H01S5/2275

摘要： The present invention relates to a method for fabricating a semiconductor laser diode in optical communication system, having the steps for forming current blocking layers on the resulting structure of the mesa structure and then forming an opening through the current blocking layer on the mesa structure.

摘要翻译： 本发明涉及一种在光通信系统中制造半导体激光二极管的方法，具有在台结构的结构上形成电流阻挡层，然后通过台面结构上的电流阻挡层形成开口的步骤。

公开(公告)号：US07915724B2

公开(公告)日：2011-03-29

申请号：US11864826

申请日：2007-09-28

申请人： Jong-Woo Ha ,  Koo Hong Lee ,  Soo Won Lee ,  JuHyun Park ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan

发明人： Jong-Woo Ha ,  Koo Hong Lee ,  Soo Won Lee ,  JuHyun Park ,  Zigmund Ramirez Camacho ,  Jeffrey D. Punzalan ,  Lionel Chien Hui Tay ,  Jairus Legaspi Pisigan

IPC分类号： H01L23/02 ,  H01L23/42

CPC分类号： H01L23/3121 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit packaging system including: forming a base structure, having an opening; mounting a base structure device in the opening; attaching an integrated circuit device over the base structure device; and molding an encapsulant on the base structure, the base structure device, and the integrated circuit device.

摘要翻译： 一种集成电路封装系统，包括：形成具有开口的基座结构; 将基座结构装置安装在开口中; 将集成电路装置连接在所述基座结构装置上; 以及在所述基座结构，所述基座结构装置和所述集成电路装置上模制密封剂。

公开(公告)号：US08709932B2

公开(公告)日：2014-04-29

申请号：US12966071

申请日：2010-12-13

申请人： Soo Won Lee ,  JiHoon Oh ,  Sung Jun Yoon

发明人： Soo Won Lee ,  JiHoon Oh ,  Sung Jun Yoon

IPC分类号： H01L21/44 ,  H01L21/00 ,  H01L23/02

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2224/05647

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a carrier having a contact pad; forming a first resist layer, having a first resist opening, over the carrier and the contact pad, the first resist opening partially exposing the first contact pad; forming a second resist layer, having a second resist opening over the first resist opening, the second resist opening partially exposing the first resist layer; mounting an integrated circuit over the carrier; and forming an internal interconnect between the integrated circuit and the carrier, the internal interconnect filling the second resist opening with no space between the second resist layer in the second resist opening.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有接触焊盘的载体; 在所述载体和所述接触焊盘上形成具有第一抗蚀剂开口的第一抗蚀剂层，所述第一抗蚀剂开口部分地暴露所述第一接触焊盘; 形成第二抗蚀剂层，在所述第一抗蚀剂开口上具有第二抗蚀剂开口，所述第二抗蚀剂开口部分地暴露所述第一抗蚀剂层; 在载体上安装集成电路; 以及在所述集成电路和所述载体之间形成内部互连，所述内部互连件在所述第二抗蚀剂开口中的所述第二抗蚀剂层之间没有空间填充所述第二抗蚀剂开口。

公开(公告)号：US20120146230A1

公开(公告)日：2012-06-14

申请号：US12966071

申请日：2010-12-13

申请人： Soo Won Lee ,  JiHoon Oh ,  Sung Jun Yoon

发明人： Soo Won Lee ,  JiHoon Oh ,  Sung Jun Yoon

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05639 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2224/05647

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a carrier having a contact pad; forming a first resist layer, having a first resist opening, over the carrier and the contact pad, the first resist opening partially exposing the first contact pad; forming a second resist layer, having a second resist opening over the first resist opening, the second resist opening partially exposing the first resist layer; mounting an integrated circuit over the carrier; and forming an internal interconnect between the integrated circuit and the carrier, the internal interconnect filling the second resist opening with no space between the second resist layer in the second resist opening.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有接触焊盘的载体; 在所述载体和所述接触焊盘上形成具有第一抗蚀剂开口的第一抗蚀剂层，所述第一抗蚀剂开口部分地暴露所述第一接触焊盘; 形成第二抗蚀剂层，在所述第一抗蚀剂开口上具有第二抗蚀剂开口，所述第二抗蚀剂开口部分地暴露所述第一抗蚀剂层; 在载体上安装集成电路; 以及在所述集成电路和所述载体之间形成内部互连，所述内部互连件在所述第二抗蚀剂开口中的所述第二抗蚀剂层之间没有空间填充所述第二抗蚀剂开口。

公开(公告)号：US5789275A

公开(公告)日：1998-08-04

申请号：US755816

申请日：1996-11-26

申请人： Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

发明人： Soo Won Lee ,  Gyu Seog Cho ,  Tae Jin Kim ,  Kyung Seok Oh

IPC分类号： H01S5/00 ,  H01S5/20 ,  H01S5/227 ,  H01S5/323 ,  H01L21/20

CPC分类号： H01S5/227 ,  H01S5/2081 ,  H01S5/2275 ,  H01S5/32391

摘要： The present invention relates to a method for fabricating a semiconductor laser diode in optical communication system, and the present invention uses both an oxide and a nitride pattern as an etch mask instead of the single oxide pattern in order to decrease the under cut of the edge of the oxide pattern.

摘要翻译： 本发明涉及一种在光通信系统中制造半导体激光二极管的方法，并且本发明使用氧化物和氮化物图案作为蚀刻掩模而不是单一氧化物图案，以便减少边缘的下切割 的氧化物图案。