公开(公告)号：US20050167812A1

公开(公告)日：2005-08-04

申请号：US11062735

申请日：2005-02-23

申请人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

发明人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

IPC分类号： H01L21/768 ,  H01L23/31 ,  H01L23/48 ,  H01L23/485 ,  H01L23/522 ,  H01L25/065 ,  H01L29/76

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

摘要翻译： 提供一种半导体器件，其形成具有彼此堆叠的半导体器件的三维半导体器件。 在该半导体器件中，在具有形成在外侧的主面上的集成电路单元和电极焊盘的硅半导体基板中形成有孔。 通过蚀刻形成孔，电极焊盘用作蚀刻停止层。 埋入电极形成在孔中。 该嵌入电极用于将电极焊盘导电到硅半导体衬底的底侧的主表面。

公开(公告)号：US07884459B2

公开(公告)日：2011-02-08

申请号：US12210645

申请日：2008-09-15

申请人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

发明人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

IPC分类号： H01L23/02

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

摘要翻译： 提供一种半导体器件，其形成具有彼此堆叠的半导体器件的三维半导体器件。 在该半导体器件中，在具有形成在外侧的主面上的集成电路单元和电极焊盘的硅半导体基板中形成有孔。 通过蚀刻形成孔，电极焊盘用作蚀刻停止层。 埋入电极形成在孔中。 该嵌入电极用于将电极焊盘导电到硅半导体衬底的底侧的主表面。

公开(公告)号：US08216934B2

公开(公告)日：2012-07-10

申请号：US12976089

申请日：2010-12-22

申请人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

发明人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

IPC分类号： H01L21/4763

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

摘要翻译： 提供一种半导体器件，其形成具有彼此堆叠的半导体器件的三维半导体器件。 在该半导体器件中，在具有形成在外侧的主面上的集成电路单元和电极焊盘的硅半导体基板中形成有孔。 通过蚀刻形成孔，电极焊盘用作蚀刻停止层。 埋入电极形成在孔中。 该嵌入电极用于将电极焊盘导电到硅半导体衬底的底侧的主表面。

公开(公告)号：US20090008798A1

公开(公告)日：2009-01-08

申请号：US12210645

申请日：2008-09-15

申请人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

发明人： Eiji Yoshida ,  Takao Ohno ,  Yoshito Akutagawa ,  Koji Sawahata ,  Masataka Mizukoshi ,  Takao Nishimura ,  Akira Takashima ,  Mitsuhisa Watanabe

IPC分类号： H01L23/52

CPC分类号： H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/13008 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

摘要翻译： 提供一种半导体器件，其形成具有彼此堆叠的半导体器件的三维半导体器件。 在该半导体器件中，在具有形成在外侧的主面上的集成电路单元和电极焊盘的硅半导体基板中形成有孔。 通过蚀刻形成孔，电极焊盘用作蚀刻停止层。 埋入电极形成在孔中。 该嵌入电极用于将电极焊盘导电到硅半导体衬底的底侧的主表面。

公开(公告)号：US06732911B2

公开(公告)日：2004-05-11

申请号：US09970802

申请日：2001-10-05

申请人： Hirohisa Matsuki ,  Hiroyuki Matsui ,  Eiji Yoshida ,  Takao Ohno ,  Koki Otake ,  Akiyo Mizutani ,  Motoshu Miyajima ,  Masataka Mizukoshi ,  Eiji Watanabe

发明人： Hirohisa Matsuki ,  Hiroyuki Matsui ,  Eiji Yoshida ,  Takao Ohno ,  Koki Otake ,  Akiyo Mizutani ,  Motoshu Miyajima ,  Masataka Mizukoshi ,  Eiji Watanabe

IPC分类号： B23K3538

CPC分类号： B23K1/008 ,  B23K2101/36 ,  H05K3/3489

摘要： There is provided a chamber open to the outside through openings through which a solder-adhered object is passed and the chamber having a heating/melting area, a carrying mechanism for carrying the solder-adhered object into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to create a lower pressure area in the heating/melting area as compared to the pressure of outside the chamber, heating means for heating directly or indirectly the solder-adhered object in the heating/melting area, and an air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas. Accordingly, there can be provided a solder jointing system for jointing solder layers of a semiconductor device, an electronic device, or the like to the wirings or the pads, which is capable of having a high processing ability and preventing re-oxidation.

摘要翻译： 设置有通过开口穿过焊料粘附物体的开口的室，并且具有加热/熔化区域的室，用于将焊料粘附物携带到加热/熔融区域中的承载机构， 用于将甲酸供应到加热/熔化区域的酸供应装置，用于从加热/熔化区域及其相邻区域排出气体的排气装置，以在加热/熔化区域中产生较低压力区域， 在室外，用于在加热/熔化区域中直接或间接加热焊接物体的加热装置，以及用于扰乱加热/熔化区域和承载区域之间的气流的气流抑制装置。 因此，可以提供一种用于将半导体器件，电子器件等的焊料层接合到布线或焊盘上的焊接接合系统，其能够具有高处理能力并防止再氧化。

公开(公告)号：US07196418B2

公开(公告)日：2007-03-27

申请号：US11042347

申请日：2005-01-26

申请人： Takao Ohno ,  Eiji Yoshida ,  Hiroshi Misawa

发明人： Takao Ohno ,  Eiji Yoshida ,  Hiroshi Misawa

IPC分类号： H01L23/34

CPC分类号： H01L23/3114 ,  H01L23/3128 ,  H01L24/50 ,  H01L24/75 ,  H01L24/79 ,  H01L24/81 ,  H01L24/86 ,  H01L25/0657 ,  H01L27/14618 ,  H01L31/0203 ,  H01L2224/75 ,  H01L2224/75302 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor element having a plurality of electrodes provided on one principal surface thereof and a wiring substrate having a conductive layer on an insulating substrate. The wiring substrate is arranged in a substantially U-shape along an outer edge of the semiconductor element. An end of the conductive layer of the wiring substrate is connected to the electrodes of the semiconductor element. The other end of the conductive layer extends in a direction opposite to the semiconductor element on the other principal surface side of the semiconductor element.

摘要翻译： 半导体器件包括具有设置在其一个主表面上的多个电极的半导体元件和在绝缘基板上具有导电层的布线基板。 布线基板沿着半导体元件的外边缘布置成大致U形。 布线基板的导电层的端部与半导体元件的电极连接。 导电层的另一端在与半导体元件的另一主面侧的半导体元件相反的方向上延伸。

公开(公告)号：US20050161793A1

公开(公告)日：2005-07-28

申请号：US11042347

申请日：2005-01-26

申请人： Takao Ohno ,  Eiji Yoshida ,  Hiroshi Misawa

发明人： Takao Ohno ,  Eiji Yoshida ,  Hiroshi Misawa

IPC分类号： H01L21/60 ,  H01L23/02 ,  H01L23/12 ,  H01L23/31 ,  H01L23/52 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L27/146 ,  H01L31/0203

CPC分类号： H01L23/3114 ,  H01L23/3128 ,  H01L24/50 ,  H01L24/75 ,  H01L24/79 ,  H01L24/81 ,  H01L24/86 ,  H01L25/0657 ,  H01L27/14618 ,  H01L31/0203 ,  H01L2224/75 ,  H01L2224/75302 ,  H01L2224/81121 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor element having a plurality of electrodes provided on one principal surface thereof and a wiring substrate having a conductive layer on an insulating substrate. The wiring substrate is arranged in a substantially U-shape along an outer edge of the semiconductor element. An end of the conductive layer of the wiring substrate is connected to the electrodes of the semiconductor element. The other end of the conductive layer extends in a direction opposite to the semiconductor element on the other principal surface side of the semiconductor element.

摘要翻译： 半导体器件包括具有设置在其一个主表面上的多个电极的半导体元件和在绝缘基板上具有导电层的布线基板。 布线基板沿着半导体元件的外边缘布置成大致U形。 布线基板的导电层的端部与半导体元件的电极连接。 导电层的另一端在与半导体元件的另一主面侧的半导体元件相反的方向上延伸。

公开(公告)号：US20090061192A1

公开(公告)日：2009-03-05

申请号：US11911435

申请日：2006-04-11

申请人： Kei Mizutani ,  Takashi Kushida ,  Satoshi Kitazawa ,  Takao Ohno ,  Koji Furuya

发明人： Kei Mizutani ,  Takashi Kushida ,  Satoshi Kitazawa ,  Takao Ohno ,  Koji Furuya

IPC分类号： B32B5/16

CPC分类号： G02B5/08 ,  G02B5/0808 ,  G02F1/133605 ,  Y10T428/249986

摘要： There is provided a reflective sheet made of self-sustaining porous sheet which comprises inert particles and a polyolefin and which has a porosity of 30 to 95% and a reflectivity at a wavelength of 550 nm of 60 to 120%. This reflective sheet can be reduced in thickness and weight while retaining sufficient reflectivity.

摘要翻译： 提供由自持多孔片制成的反射片，其包含惰性颗粒和聚烯烃，其孔隙率为30〜95％，波长550nm的反射率为60〜120％。 该反射片可以减小厚度和重量，同时保持足够的反射率。

公开(公告)号：US07407702B2

公开(公告)日：2008-08-05

申请号：US10776184

申请日：2004-02-12

申请人： Takao Ohno ,  Jiro Sadanobu ,  Tsutomu Nakamura ,  Susumu Honda ,  Toyoaki Ishiwata

发明人： Takao Ohno ,  Jiro Sadanobu ,  Tsutomu Nakamura ,  Susumu Honda ,  Toyoaki Ishiwata

IPC分类号： B32B5/22 ,  B01D39/14 ,  B05D1/22

CPC分类号： B32B27/08 ,  B01D67/0011 ,  B01D67/0016 ,  B01D69/02 ,  B01D69/141 ,  B01D71/56 ,  B01D2323/08 ,  B01D2323/12 ,  B01D2325/22 ,  B01D2325/24 ,  B32B27/18 ,  B32B27/304 ,  B32B27/34 ,  B32B27/36 ,  B32B38/0036 ,  B32B2305/026 ,  B32B2307/306 ,  B32B2307/724 ,  B32B2309/025 ,  B32B2377/00 ,  B32B2457/10 ,  C08J5/18 ,  C08J9/28 ,  C08J2201/0542 ,  C08J2377/10 ,  H01M2/1646 ,  H01M2/1653 ,  H01M2/166 ,  Y10T428/249978 ,  Y10T428/249979 ,  Y10T428/24998 ,  Y10T428/249981 ,  Y10T428/249986 ,  Y10T428/249991 ,  Y10T428/249992 ,  Y10T428/249993 ,  Y10T428/31725

摘要： A polymetaphenylene isophthalamide-based polymer porous film having a satisfactory porous structure that exhibits excellent gas permeability and heat resistance. It is produced by a process which comprises casting a dope of the polymetaphenylene isophthalamide-based polymer and coagulating it in a coagulating bath. The porous film may also contain inorganic whiskers, and a composite porous film may be formed in combination with a separate thermoplastic polymer film.

摘要翻译： 具有令人满意的多孔结构的聚邻苯二甲酰间苯二胺系聚合物多孔膜具有优异的透气性和耐热性。 它是通过一种方法生产的，该方法包括将聚邻苯二甲酰间苯二胺基聚合物的掺杂物浇铸并在凝固浴中凝结。 多孔膜也可以含有无机晶须，并且复合多孔膜可以与单独的热塑性聚合物膜组合形成。

公开(公告)号：US4830996A

公开(公告)日：1989-05-16

申请号：US218550

申请日：1988-07-13

申请人： Nobuki Hirai ,  Yoshihisa Ushida ,  Takao Ohno

发明人： Nobuki Hirai ,  Yoshihisa Ushida ,  Takao Ohno

IPC分类号： C04B35/493 ,  H01L41/187

CPC分类号： C04B35/493 ,  H01L41/187

摘要： Ferroelectric ceramics represented by xPbTiO.sub.3 -yPbZrO.sub.3 -zPb(Mg.sub.1/3 Nb.sub.2/3)O.sub.3 -mSrTiO.sub.3 -nSnO.sub.2 -pZnO-qBi.sub.2 O.sub.3 -rX wherein x,y,z,m,n,p,q and r represent amounts by mole, respectively, with the proviso that x+y+z being 1, Z is at least one oxide selected from the group consisting of Dy.sub.2 O.sub.3, Ta.sub.2 O.sub.5, and Y.sub.2 O.sub.3, and wherein x is from 0.25 to 0.50, y is from 0.05 to 0.70, z is from 0.05 to 0.70, m is from 0 to 0.10, n is from 0 to 0.04, p is from 0 to 0.04, q is from 0 to 0.02 and r is from 0.005 to 0.02. The disclosed ferroelectric ceramics have increased relative dielectric constant and/or electromechanical coupling factor, and are suitable for use as actuators.