公开(公告)号：US20170047302A1

公开(公告)日：2017-02-16

申请号：US15212656

申请日：2016-07-18

申请人： FUJITSU LIMITED

发明人： Masaru Morita ,  Nobuhiro Imaizumi

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/05 ,  H01L23/293 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/13 ,  H01L2224/02126 ,  H01L2224/03001 ,  H01L2224/03332 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03505 ,  H01L2224/038 ,  H01L2224/03848 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05018 ,  H01L2224/05025 ,  H01L2224/05076 ,  H01L2224/05078 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05255 ,  H01L2224/05541 ,  H01L2224/05551 ,  H01L2224/05562 ,  H01L2224/05567 ,  H01L2224/05576 ,  H01L2224/05582 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05755 ,  H01L2224/05839 ,  H01L2224/05844 ,  H01L2224/05847 ,  H01L2224/05855 ,  H01L2224/05999 ,  H01L2224/10126 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13026 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81097 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2225/06513 ,  H01L2924/1531 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/01049 ,  H01L2924/01083

摘要： An electronic apparatus includes: a first substrate; an electrode over the first substrate; a first conductor having a porous structure above the first substrate, the first conductor covering an upper surface and a side surface of the electrode; and an insulator above the first substrate, the insulator covering an upper surface and a side surface of the first conductor, wherein the insulator has an opening that exposes the first conductor.

摘要翻译： 电子设备包括：第一基板; 第一基板上的电极; 第一导体，其在第一基板上方具有多孔结构，第一导体覆盖电极的上表面和侧表面; 以及在所述第一基板上方的绝缘体，所述绝缘体覆盖所述第一导体的上表面和侧表面，其中所述绝缘体具有暴露所述第一导体的开口。

公开(公告)号：US20160192498A1

公开(公告)日：2016-06-30

申请号：US15062480

申请日：2016-03-07

申请人： FUJITSU LIMITED

发明人： Teru Nakanishi ,  Nobuyuki Hayashi ,  Masaru Morita ,  Yasuhiro YONEDA

IPC分类号： H05K1/18

CPC分类号： H05K1/0296 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/1379 ,  H01L2224/13839 ,  H01L2224/13847 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10719 ,  Y02P70/613 ,  H01L2924/00

摘要： A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and including an interconnection connected to the first electrode pad; and a semiconductor package disposed to face the wiring board with the circuit board interposed therebetween, and including a second electrode pad on a surface thereof, the second electrode pad being connected to the interconnection.

摘要翻译： 半导体器件包括：布线板，其表面上包括第一电极焊盘; 电路板，被布置成站立在所述布线板上，并且包括连接到所述第一电极焊盘的互连; 以及半导体封装，其设置成与所述布线板面对所述电路板，并且在其表面上包括第二电极焊盘，所述第二电极焊盘连接到所述互连。

公开(公告)号：US20200343133A1

公开(公告)日：2020-10-29

申请号：US16808847

申请日：2020-03-04

申请人： FUJITSU LIMITED

发明人： Masaru Morita

IPC分类号： H01L21/768 ,  H05K3/10 ,  H05K3/38

摘要： A wiring board includes a wiring layer; a diffusion suppressing layer that. covers the wiring layer and suppresses diffusion of a metal component of the wiring layer; a base metal layer that covers the diffusion suppressing layer; and a passivation layer that covers the base metal layer.

公开(公告)号：US20160192479A1

公开(公告)日：2016-06-30

申请号：US15062477

申请日：2016-03-07

申请人： FUJITSU LIMITED

发明人： Teru Nakanishi ,  Nobuyuki Hayashi ,  Masaru Morita ,  Yasuhiro YONEDA

IPC分类号： H05K1/02

CPC分类号： H05K1/0296 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/1379 ,  H01L2224/13839 ,  H01L2224/13847 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10719 ,  Y02P70/613 ,  H01L2924/00

摘要： A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and including an interconnection connected to the first electrode pad; and a semiconductor package disposed to face the wiring board with the circuit board interposed therebetween, and including a second electrode pad on a surface thereof, the second electrode pad being connected to the interconnection.

公开(公告)号：US09565755B2

公开(公告)日：2017-02-07

申请号：US15062477

申请日：2016-03-07

申请人： FUJITSU LIMITED

发明人： Teru Nakanishi ,  Nobuyuki Hayashi ,  Masaru Morita ,  Yasuhiro Yoneda

IPC分类号： H05K1/11 ,  H05K1/14 ,  H05K1/02 ,  H01L23/13 ,  H01L23/498 ,  H05K3/34 ,  H05K1/18 ,  H01L23/00

CPC分类号： H05K1/0296 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/1379 ,  H01L2224/13839 ,  H01L2224/13847 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10719 ,  Y02P70/613 ,  H01L2924/00

摘要： A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and including an interconnection connected to the first electrode pad; and a semiconductor package disposed to face the wiring board with the circuit board interposed therebetween, and including a second electrode pad on a surface thereof, the second electrode pad being connected to the interconnection.

摘要翻译： 半导体器件包括：布线板，其表面上包括第一电极焊盘; 电路板，被布置成站立在所述布线板上，并且包括连接到所述第一电极焊盘的互连; 以及半导体封装，其设置成与所述布线板面对所述电路板，并且在其表面上包括第二电极焊盘，所述第二电极焊盘连接到所述互连。

公开(公告)号：US11276610B2

公开(公告)日：2022-03-15

申请号：US16808847

申请日：2020-03-04

申请人： FUJITSU LIMITED

发明人： Masaru Morita

IPC分类号： H05K1/09 ,  H01L21/768 ,  H05K3/10 ,  H05K3/38 ,  H05K3/24 ,  H05K3/28 ,  H05K3/46

摘要： A wiring board includes a wiring layer; a diffusion suppressing layer that covers the wiring layer and suppresses diffusion of a metal component of the wiring layer; a base metal layer that covers the diffusion suppressing layer; and a passivation layer that covers the base metal layer.

公开(公告)号：US20200168563A1

公开(公告)日：2020-05-28

申请号：US16590691

申请日：2019-10-02

申请人： FUJITSU LIMITED

发明人： Masaru Morita ,  Yoshihiro Nakata

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L21/48

摘要： An electronic device includes a substrate and a wiring. The wiring is provided above the substrate and includes a Ni—B layer and a copper layer provided on the Ni—B layer. The Ni—B layer contains 3.2% by weight to 5% by weight of boron.

公开(公告)号：US09585246B2

公开(公告)日：2017-02-28

申请号：US15062480

申请日：2016-03-07

申请人： FUJITSU LIMITED

发明人： Teru Nakanishi ,  Nobuyuki Hayashi ,  Masaru Morita ,  Yasuhiro Yoneda

IPC分类号： H05K1/11 ,  H05K1/14 ,  H05K1/02 ,  H01L23/13 ,  H01L23/498 ,  H05K3/34 ,  H05K1/18 ,  H01L23/00

CPC分类号： H05K1/0296 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/1379 ,  H01L2224/13839 ,  H01L2224/13847 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/10287 ,  H05K2201/10378 ,  H05K2201/10424 ,  H05K2201/10719 ,  Y02P70/613 ,  H01L2924/00

摘要： A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and including an interconnection connected to the first electrode pad; and a semiconductor package disposed to face the wiring board with the circuit board interposed therebetween, and including a second electrode pad on a surface thereof, the second electrode pad being connected to the interconnection.

摘要翻译： 半导体器件包括：布线板，其表面上包括第一电极焊盘; 电路板，被布置成站立在所述布线板上，并且包括连接到所述第一电极焊盘的互连; 以及半导体封装，其设置成与所述布线板面对所述电路板，并且在其表面上包括第二电极焊盘，所述第二电极焊盘连接到所述互连。

公开(公告)号：US20220189895A1

公开(公告)日：2022-06-16

申请号：US17401364

申请日：2021-08-13

申请人： FUJITSU LIMITED

发明人： Masaru Morita

IPC分类号： H01L23/00

摘要： A semiconductor device includes a semiconductor substrate configured to include a first electrode layer, and a first barrier layer provided on the first electrode layer and bonded to a metal layer, and a circuit substrate configured to include a second electrode layer, and a second barrier layer provided on the second electrode layer and bonded to the metal layer, wherein the semiconductor substrate including a semiconductor element, and the circuit substrate are bonded via the metal layer containing Sn, a linear expansion coefficient of the first barrier layer is larger than that of the circuit substrate, and a linear expansion coefficient of the second barrier layer is smaller than that of the circuit substrate.

公开(公告)号：US20190312122A1

公开(公告)日：2019-10-10

申请号：US16451477

申请日：2019-06-25

申请人： FUJITSU LIMITED

发明人： Masaru Morita ,  Yoshihiro Nakata

IPC分类号： H01L29/45 ,  H01L21/283 ,  H01L23/498 ,  H05K3/24 ,  H05K1/09

摘要： An electronic component includes: a conductor portion containing a first element; a compound layer disposed around the conductor portion and containing a second element and a third element which are different from the first element; and an isolation layer, disposed between the conductor portion and the compound layer and containing a fourth element which is different from the first element, the second element, and the third element, to isolate the first element in the conductor portion from the second element and the third element outside the conductor portion.