公开(公告)号：US20170127508A1

公开(公告)日：2017-05-04

申请号：US15407273

申请日：2017-01-17

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Tuomas Waris

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/028 ,  H01L21/568 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/115 ,  H05K1/182 ,  H05K1/188 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09127 ,  H05K2203/308 ,  H01L2924/0665 ,  H01L2924/00

Abstract: Rigid-flex-type circuit-board structure and manufacturing method, in which a flexible membrane and a sacrificial-material piece are attached to an insulator membrane in the location of the flexible zone. An insulator layer, which encloses within itself a sacrificial-material piece is manufactured on the surface of the conductor membrane. The flexible zone is formed in such a way that an opening is made in the insulator layer, through which the sacrificial-material piece is removed. The flexible zone comprises at least part of the flexible membrane as well as conductors, which are manufactured by patterning the insulator membrane at a suitable stage in the method.

公开(公告)号：US20170271288A1

公开(公告)日：2017-09-21

申请号：US15611812

申请日：2017-06-02

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Risto Tuominen

IPC: H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H05K1/18 ,  H05K3/30

CPC classification number: H01L24/09 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/188 ,  H05K3/305 ,  H05K2201/0969 ,  H05K2201/10674 ,  H01L2924/00

Abstract: Manufacturing method and a multi-chip package, which comprises a conductor pattern and insulation, and, inside the insulation, a first component, the contact terminals of which face towards the conductor pattern and are conductively connected to the conductor pattern. The multi-chip package also comprises inside the insulation a second semiconductor chip, the contact terminals of which face towards the same conductor pattern and are conductively connected through contact elements to this conductor pattern. The semiconductor chips are located in such a way that the first semiconductor chip is located between the second semiconductor chip and the conductor pattern.

公开(公告)号：US09691724B2

公开(公告)日：2017-06-27

申请号：US14161735

申请日：2014-01-23

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Risto Tuominen

IPC: H01L23/02 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H05K1/18 ,  H01L25/065 ,  H05K3/30

CPC classification number: H01L24/09 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/188 ,  H05K3/305 ,  H05K2201/0969 ,  H05K2201/10674 ,  H01L2924/00

Abstract: Manufacturing method and a multi-chip package, which comprises a conductor pattern and insulation, and, inside the insulation, a first component, the contact terminals of which face towards the conductor pattern and are conductively connected to the conductor pattern. The multi-chip package also comprises inside the insulation a second semiconductor chip, the contact terminals of which face towards the same conductor pattern and are conductively connected through contact elements to this conductor pattern. The semiconductor chips are located in such a way that the first semiconductor chip is located between the second semiconductor chip and the conductor pattern.

公开(公告)号：US09674948B2

公开(公告)日：2017-06-06

申请号：US15211051

申请日：2016-07-15

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Tuomas Waris

IPC: H05K1/18 ,  H05K1/02 ,  H01L23/00 ,  H05K3/46 ,  H05K1/11

CPC classification number: H05K1/028 ,  H01L21/568 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/115 ,  H05K1/182 ,  H05K1/188 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09127 ,  H05K2203/308 ,  H01L2924/0665 ,  H01L2924/00

Abstract: Rigid-flex-type circuit-board structure and manufacturing method, in which a flexible membrane and a sacrificial-material piece are attached to an insulator membrane in the location of the flexible zone. An insulator layer, which encloses within itself a sacrificial-material piece is manufactured on the surface of the conductor membrane. The flexible zone is formed in such a way that an opening is made in the insulator layer, through which the sacrificial-material piece is removed. The flexible zone comprises at least part of the flexible membrane as well as conductors, which are manufactured by patterning the insulator membrane at a suitable stage in the method.

公开(公告)号：US10085347B2

公开(公告)日：2018-09-25

申请号：US14660991

申请日：2015-03-18

Applicant: GE Embedded Electronics Oy

Inventor： Risto Tuominen ,  Petteri Palm ,  Antti Iihola

IPC: H05K3/02 ,  H05K3/10 ,  F02M53/02 ,  F02M53/06 ,  F02M55/02 ,  F02M69/46 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H05K1/18 ,  H05K1/02 ,  H01L25/065 ,  H05K3/18

CPC classification number: H05K3/10 ,  F02M53/02 ,  F02M53/06 ,  F02M55/02 ,  F02M55/025 ,  F02M69/465 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/24137 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H05K1/02 ,  H05K1/185 ,  H05K3/108 ,  H05K3/181 ,  H05K2203/0156 ,  H05K2203/1469 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49146 ,  Y10T29/49155 ,  H01L2924/00

Abstract: Method for the manufacture of a circuit board containing a component and circuit board containing a component. The invention is based on first manufacturing (101-102 or 101-103) an intermediate product, which contains the insulator layer of the circuit board and the components, which are set in place inside the insulator layer, in such a way that the contact elements of the components face the surface of the intermediate product. After this, the intermediate product is transferred to the circuit-board manufacturing line, on which a suitable number of conducting-pattern layers and, if necessary, insulator layers are manufactured (104) on one or both sides of the intermediate product, in such a way that, when manufacturing the first conducting-pattern layer, the conductor material forms an electrical contact with the contact elements of the components. Alternatively, stages (101-105) can also be performed on a single manufacturing line.

公开(公告)号：US20140131870A1

公开(公告)日：2014-05-15

申请号：US14161735

申请日：2014-01-23

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Risto Tuominen

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/09 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/12042 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/188 ,  H05K3/305 ,  H05K2201/0969 ,  H05K2201/10674 ,  H01L2924/00

Abstract: Manufacturing method and a multi-chip package, which comprises a conductor pattern and insulation, and, inside the insulation, a first component, the contact terminals of which face towards the conductor pattern and are conductively connected to the conductor pattern. The multi-chip package also comprises inside the insulation a second semiconductor chip, the contact terminals of which face towards the same conductor pattern and are conductively connected through contact elements to this conductor pattern. The semiconductor chips are located in such a way that the first semiconductor chip is located between the second semiconductor chip and the conductor pattern.

Abstract translation: 制造方法和多芯片封装，其包括导体图案和绝缘体，并且在绝缘体内部，第一部件的接触端子面向导体图案并且导电地连接到导体图案。 多芯片封装还包括在绝缘体内部的第二半导体芯片，其接触端子面向相同的导体图案并且通过接触元件导电连接到该导体图案。 半导体芯片的位置使得第一半导体芯片位于第二半导体芯片和导体图案之间。

公开(公告)号：US09622354B2

公开(公告)日：2017-04-11

申请号：US14076292

申请日：2013-11-11

Applicant: GE Embedded Electronics Oy

Inventor： Risto Tuominen ,  Antti Iihola ,  Petteri Palm

IPC: H05K3/30 ,  H05K3/06 ,  H01L21/48 ,  H01L23/13 ,  H05K1/18 ,  H01L23/538 ,  H01L23/544 ,  H01L23/00 ,  H05K3/20 ,  H05K3/28 ,  H05K3/32 ,  H05K3/40

CPC classification number: H05K3/064 ,  H01L21/4846 ,  H01L21/56 ,  H01L21/568 ,  H01L23/13 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/16 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/90 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2224/18 ,  H01L2224/24227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/81121 ,  H01L2224/81132 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/92144 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/183 ,  H05K1/187 ,  H05K1/188 ,  H05K3/205 ,  H05K3/284 ,  H05K3/303 ,  H05K3/305 ,  H05K3/32 ,  H05K3/321 ,  H05K3/4069 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0353 ,  H05K2203/063 ,  H05K2203/0723 ,  Y02P70/613 ,  Y10T29/4913 ,  H01L2224/29075 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method for manufacturing a circuit-board structure wherein a conductor foil is provided on an insulating material layer, a resist layer is spread on the conductor foil and a recess formed in the conductor foil and insulating material layer. The resist layer is patterned to form a conductor-pattern having openings wherein conductor patterns may be grown. A component is attached to the conductor foil and conductor pattern and conductor material is removed which does not form part of a conductor pattern.

公开(公告)号：US10231335B2

公开(公告)日：2019-03-12

申请号：US14285710

申请日：2014-05-23

Applicant: GE Embedded Electronics Oy

Inventor： Petteri Palm ,  Tuomas Waris ,  Antti Iihola

IPC: H05K1/11 ,  H05K1/18 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H05K1/14 ,  H05K3/20

Abstract: The present invention generally provides a novel method for manufacturing an electronic module with crossed conducting lines and a novel electronic module with crossed conducting lines. In particular, an aspect of the present invention is to provide a thin, single layer electronic module. It is also an object of the present invention to provide an electronic module with an embedded jumper element having reliable high quality connections and contacts. To achieve at least some of the aspects of the present invention, an embedded pre-fabricated jumper module is placed inside a printed circuit board which allows the crossing of conducting lines within the module without manufacturing additional layers over the whole PCB board. The resultant PCB will have improved contacts and will not have surface deformation.

公开(公告)号：US09820375B2

公开(公告)日：2017-11-14

申请号：US15407273

申请日：2017-01-17

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Tuomas Waris

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K1/028 ,  H01L21/568 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/115 ,  H05K1/182 ,  H05K1/188 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09127 ,  H05K2203/308 ,  H01L2924/0665 ,  H01L2924/00

Abstract: Rigid-flex-type circuit-board structure and manufacturing method, in which a flexible membrane and a sacrificial-material piece are attached to an insulator membrane in the location of the flexible zone. An insulator layer, which encloses within itself a sacrificial-material piece is manufactured on the surface of the conductor membrane. The flexible zone is formed in such a way that an opening is made in the insulator layer, through which the sacrificial-material piece is removed. The flexible zone comprises at least part of the flexible membrane as well as conductors, which are manufactured by patterning the insulator membrane at a suitable stage in the method.

公开(公告)号：US20170071061A1

公开(公告)日：2017-03-09

申请号：US15355096

申请日：2016-11-18

Applicant: GE Embedded Electronics Oy

Inventor： Risto Tuominen ,  Antti Iihola ,  Petteri Palm

IPC: H05K1/18 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H05K3/30 ,  H05K3/28 ,  H01L21/48 ,  H01L23/544 ,  H05K3/06 ,  H05K3/32

CPC classification number: H05K3/064 ,  H01L21/4846 ,  H01L21/56 ,  H01L21/568 ,  H01L23/13 ,  H01L23/5389 ,  H01L23/544 ,  H01L24/16 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L24/83 ,  H01L24/90 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/04105 ,  H01L2224/16 ,  H01L2224/18 ,  H01L2224/24227 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/81121 ,  H01L2224/81132 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/83132 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83205 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/92144 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/183 ,  H05K1/187 ,  H05K1/188 ,  H05K3/205 ,  H05K3/284 ,  H05K3/303 ,  H05K3/305 ,  H05K3/32 ,  H05K3/321 ,  H05K3/4069 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2201/0969 ,  H05K2201/10674 ,  H05K2201/10977 ,  H05K2203/0353 ,  H05K2203/063 ,  H05K2203/0723 ,  Y02P70/613 ,  Y10T29/4913 ,  H01L2224/29075 ,  H01L2924/00 ,  H01L2224/0401

Abstract: The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and the conductor layer is thinned, in such a way that the conductor material of the conductor layer is removed from outside the conductor pattern.

Abstract translation: 本公开公开了一种制造电路板结构的方法。 在该方法中，制造导体层，其在导体箔的表面上包括导体箔和导体图案。 将一个部件连接到导体层，并且导体层被薄化，使得导体层的导体材料从导体图案的外面去除。