Abstract:
A method for cleaning residues from a semiconductor substrate during a nickel platinum silicidation process is disclosed, including a multi-step residue cleaning, including exposing the substrate to an aqua regia solution, followed by an exposure to a solution having hydrochloric acid and hydrogen peroxide. The SC2 solution can further react with remaining platinum residues, rendering it more soluble in an aqueous solution and thereby dissolving it from the surface of the substrate.
Abstract:
A method for cleaning residues from a semiconductor substrate during a nickel platinum silicidation process is disclosed, including a multi-step residue cleaning, including exposing the substrate to an aqua regia solution, followed by an exposure to a solution having hydrochloric acid and hydrogen peroxide. The SC2 solution can further react with remaining platinum residues, rendering it more soluble in an aqueous solution and thereby dissolving it from the surface of the substrate.
Abstract:
A method for cleaning residues from a semiconductor substrate during a nickel platinum silicidation process is disclosed, including a multi-step residue cleaning, including exposing the substrate to an aqua regia solution, followed by an exposure to a solution having hydrochloric acid and hydrogen peroxide. The SC2 solution can further react with remaining platinum residues, rendering it more soluble in an aqueous solution and thereby dissolving it from the surface of the substrate.
Abstract:
Copper can be etched with selectivity to Ta/TaN barrier liner and SiC hardmask layers, for example, to reduce the potential copper contamination. The copper film can be recessed more than the liner to further enhance the protection. Wet etch solutions including a mixture of HF and HCl can be used for selective etching copper with respect to the liner material, for example, the copper film can be recessed between 2 and 3 nm, and the barrier liner film can be recessed between 1.5 and 2 nm.
Abstract:
Methods for etching copper in the fabrication of integrated circuits are disclosed. In one exemplary embodiment, a method for fabricating an integrated circuit includes providing an integrated circuit structure including a copper bump structure and a copper seed layer underlying and adjacent to the copper bump structure and etching the seed layer selective to the copper bump structure using a wet etching chemistry consisting of H3PO4 in a volume percentage of about 0.07 to about 0.36, H2O2 in a volume percentage of about 0.1 to about 0.7, and a remainder of H2O, and optionally NH4OH.
Abstract translation:公开了在制造集成电路中蚀刻铜的方法。 在一个示例性实施例中,一种用于制造集成电路的方法包括提供集成电路结构,该集成电路结构包括铜凸块结构和位于铜凸块结构之下并与铜凸起结构相邻的铜籽晶层,并使用湿法蚀刻对铜凸块结构有选择性的晶种层 以约0.07至约0.36的体积百分比由H 3 PO 4组成的体积百分比为约0.1至约0.7的H 2 O 2,以及剩余的H 2 O和任选的NH 4 OH的蚀刻化学。
Abstract:
Methods for etching copper in the fabrication of integrated circuits are disclosed. In one exemplary embodiment, a method for fabricating an integrated circuit includes providing an integrated circuit structure including a copper bump structure and a copper seed layer underlying and adjacent to the copper bump structure and etching the seed layer selective to the copper bump structure using a wet etching chemistry consisting of H3PO4 in a volume percentage of about 0.07 to about 0.36, H2O2 in a volume percentage of about 0.1 to about 0.7, and a remainder of H2O, and optionally NH4OH.
Abstract translation:公开了在制造集成电路中蚀刻铜的方法。 在一个示例性实施例中,一种用于制造集成电路的方法包括提供集成电路结构,该集成电路结构包括铜凸块结构和位于铜凸块结构之下并与铜凸起结构相邻的铜籽晶层,并使用湿法蚀刻对铜凸块结构有选择性的晶种层 以约0.07至约0.36的体积百分比由H 3 PO 4组成的体积百分比为约0.1至约0.7的H 2 O 2,以及剩余的H 2 O和任选的NH 4 OH的蚀刻化学。
Abstract:
A method includes forming a refractory metal alloy layer above a silicon-containing material, performing a first heating process to form a metal silicide region in at least a portion of the silicon-containing material using the refractory metal alloy layer, and removing at least a first portion of an unreacted portion of the refractory metal alloy layer using a first solution comprising a solvent and an organic chelator.
Abstract:
Copper can be etched with selectivity to Ta/TaN barrier liner and SiC hardmask layers, for example, to reduce the potential copper contamination. The copper film can be recessed more than the liner to further enhance the protection. Wet etch solutions including a mixture of HF and H2SO4 can be used for selective etching copper with respect to the liner material, for example, the copper film can be recessed between 2 and 3 nm, and the barrier liner film can be recessed between 1.5 and 2 nm.
Abstract:
Copper can be etched with selectivity to Ta/TaN barrier liner and SiC hardmask layers, for example, to reduce the potential copper contamination. The copper film can be recessed more than the liner to further enhance the protection. Wet etch solutions including a mixture of HF and HCl can be used for selective etching copper with respect to the liner material, for example, the copper film can be recessed between 2 and 3 nm, and the barrier liner film can be recessed between 1.5 and 2 nm.
Abstract:
Copper can be etched with selectivity to Ta/TaN barrier liner and SiC hardmask layers, for example, to reduce the potential copper contamination. The copper film can be recessed more than the liner to further enhance the protection. Wet etch solutions including a mixture of HF and H2SO4 can be used for selective etching copper with respect to the liner material, for example, the copper film can be recessed between 2 and 3 nm, and the barrier liner film can be recessed between 1.5 and 2 nm.