Reconfigurable transmitter
    3.
    发明授权
    Reconfigurable transmitter 有权
    可重新配置的发射机

    公开(公告)号:US09582454B2

    公开(公告)日:2017-02-28

    申请号:US14218684

    申请日:2014-03-18

    Abstract: Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.

    Abstract translation: 描述的是可重新配置的发射机,其包括:第一焊盘; 第二垫 耦合到第一焊盘的第一单端驱动器; 第二个单端驱动器到第二个垫; 耦合到所述第一和第二焊盘的差分驱动器; 以及用于启用第一和第二单端驱动器或启用差分驱动器的逻辑单元。

    WIRELINE RECEIVER CIRCUITRY HAVING COLLABORATIVE TIMING RECOVERY
    4.
    发明申请
    WIRELINE RECEIVER CIRCUITRY HAVING COLLABORATIVE TIMING RECOVERY 有权
    具有协调时序恢复的线路接收器电路

    公开(公告)号:US20160182259A1

    公开(公告)日:2016-06-23

    申请号:US14573343

    申请日:2014-12-17

    Abstract: Some embodiments include apparatus and methods having an input to receive an input signal, additional inputs to receive clock signals having different phases to sample the input signal, and a decision feedback equalizer (DFE) having DFE slices. The DFE slices include a number of data comparators to provide data information based on the sampling of the input signal, and a number of phase error comparators to provide phase error information associated with the sampling of the input signal. The number of phase error comparators of the DFE slices is not greater than the number of data comparators of the DFE slices.

    Abstract translation: 一些实施例包括具有用于接收输入信号的输入的装置和方法,用于接收具有不同相位以对输入信号进行采样的时钟信号的附加输入以及具有DFE切片的判决反馈均衡器(DFE)。 DFE片包括多个数据比较器,用于基于输入信号的采样来提供数据信息,以及多个相位误差比较器,以提供与输入信号的采样相关联的相位误差信息。 DFE切片的相位误差比较器的数量不大于DFE切片的数据比较器的数量。

    Photonic apparatus with bias control to provide substantially constant responsivity of a photodetector

    公开(公告)号:US11137283B2

    公开(公告)日:2021-10-05

    申请号:US16402990

    申请日:2019-05-03

    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for a photonic apparatus with a photodetector with bias control to provide substantially constant responsivity. The apparatus includes a first photodetector, to receive an optical input and provide a corresponding electrical output; a second photodetector coupled with the first photodetector, wherein the second photodetector is free from receipt of the optical input; and circuitry coupled with the first and second photodetectors, to generate a bias voltage, based at least in part on a dark current generated by the second photodetector in an absence of the optical input, and provide the generated bias voltage to the first photodetector. The first photodetector is to provide a substantially constant ratio of the electrical output to optical input in response to the provision of the generated bias voltage. Additional embodiments may be described and claimed.

    PHOTONIC APPARATUS WITH BIAS CONTROL TO PROVIDE SUBSTANTIALLY CONSTANT RESPONSIVITY OF A PHOTODETECTOR

    公开(公告)号:US20190257688A1

    公开(公告)日:2019-08-22

    申请号:US16402990

    申请日:2019-05-03

    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for a photonic apparatus with a photodetector with bias control to provide substantially constant responsivity. The apparatus includes a first photodetector, to receive an optical input and provide a corresponding electrical output; a second photodetector coupled with the first photodetector, wherein the second photodetector is free from receipt of the optical input; and circuitry coupled with the first and second photodetectors, to generate a bias voltage, based at least in part on a dark current generated by the second photodetector in an absence of the optical input, and provide the generated bias voltage to the first photodetector. The first photodetector is to provide a substantially constant ratio of the electrical output to optical input in response to the provision of the generated bias voltage. Additional embodiments may be described and claimed.

    OPTICAL COHERENT RECEIVER ON A CHIP

    公开(公告)号:US20240388366A1

    公开(公告)日:2024-11-21

    申请号:US18787886

    申请日:2024-07-29

    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

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