公开(公告)号：US20160155667A1

公开(公告)日：2016-06-02

申请号：US15018686

申请日：2016-02-08

Applicant: INTEL CORPORATION

Inventor： Aleksandar ALEKSOV ,  Tony DAMBRAUSKAS ,  Danish FARUQUI ,  Mark S. HLAD ,  Edward R. PRACK

IPC: H01L21/78 ,  H01L21/02 ,  H01L21/768 ,  H01L23/00 ,  H01L21/027

CPC classification number: H01L24/11 ,  H01L21/02118 ,  H01L21/02263 ,  H01L21/0234 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/76883 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3142 ,  H01L23/49894 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/1162 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81026 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81375 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/81913 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.

Abstract translation: 描述了电子组件及其制造。 一个实施例涉及一种方法，包括在半导体晶片上的金属凸块上沉积有机薄膜层，该有机薄膜层也形成在与晶片上的金属凸块相邻的表面上。 将晶片切割成多个半导体管芯结构，该管芯结构包括有机薄膜层。 半导体管芯结构附着到基板上，其中，附接包括在管芯结构上的金属凸块和衬底上的焊盘之间形成焊料接合，并且其中焊料接合延伸穿过有机薄膜层。 然后将有机薄膜层暴露于等离子体。 描述和要求保护其他实施例。

公开(公告)号：US20160172222A1

公开(公告)日：2016-06-16

申请号：US15050387

申请日：2016-02-22

Applicant: INTEL CORPORATION

Inventor： John C. JOHNSON ,  Sandeep B. SANE ,  Sandeep RAZDAN ,  Edward R. PRACK ,  Leonel R. ARANA ,  Peter A. DAVISON ,  Eric J. MORET ,  Lawrence M. PALANUK ,  Gregory A. STONE

IPC: H01L21/673 ,  H01L21/683 ,  H01L21/78 ,  H01L21/67 ,  H01L21/677

CPC classification number: H01L21/67333 ,  H01L21/67265 ,  H01L21/67309 ,  H01L21/67356 ,  H01L21/67363 ,  H01L21/67383 ,  H01L21/67769 ,  H01L21/67772 ,  H01L21/67778 ,  H01L21/68 ,  H01L21/6833 ,  H01L21/68764 ,  H01L21/68771 ,  H01L21/78 ,  H05K13/0084

Abstract: A method includes identifying a wafer position for a plurality of die on a wafer, storing the wafer position for each of the plurality of die in a database, dicing the wafer into a plurality of singulated die, positioning each of the singulated die in a die position location on a tray, and storing the die position on the tray for each of the singulated die in the database. The database includes information including the wafer position associated with each die position. The tray is transported to a processing tool, and at least one of the plurality of singulated die is removed from the die position on the tray and processed in the processing tool. The processed singulated die is replaced in the same defined location on the tray that the singulated die was positioned in prior to the processing. Other embodiments are described and claimed.

公开(公告)号：US20170141061A1

公开(公告)日：2017-05-18

申请号：US15421340

申请日：2017-01-31

Applicant: INTEL CORPORATION

Inventor： Aleksandar ALEKSOV ,  Tony DAMBRAUSKAS ,  Danish FARUQUI ,  Mark S. HLAD ,  Edward R. PRACK

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/683 ,  H01L21/311 ,  H01L25/065 ,  H01L25/00 ,  H01L21/78 ,  H01L21/027

CPC classification number: H01L24/11 ,  H01L21/02118 ,  H01L21/02263 ,  H01L21/0234 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/76883 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/3142 ,  H01L23/49894 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68304 ,  H01L2221/68327 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/1148 ,  H01L2224/1162 ,  H01L2224/11849 ,  H01L2224/1191 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81026 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/81207 ,  H01L2224/81375 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/81913 ,  H01L2224/831 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.

公开(公告)号：US20170033069A1

公开(公告)日：2017-02-02

申请号：US15295952

申请日：2016-10-17

Applicant: Intel Corporation

Inventor： Mihir A. Oka ,  Edward R. PRACK ,  Dingying XU ,  Saikumar JAYARAMAN

IPC: H01L23/00 ,  C09D5/20 ,  C09D7/12 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L24/11 ,  C08G73/22 ,  C09D5/20 ,  C09D7/63 ,  C09D179/04 ,  C09D179/08 ,  C09D181/04 ,  H01L21/02112 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/02318 ,  H01L21/31127 ,  H01L24/13 ,  H01L2224/05568 ,  H01L2224/11009 ,  H01L2224/11332 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/11849 ,  H01L2224/13023 ,  H01L2924/095 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/00 ,  C08L83/04

Abstract: Techniques are disclosed for protecting a surface using a dry-removable protective coating that does not require chemical solutions to be removed. In an embodiment, a protective layer is disposed on a surface. The protective layer is composed of one layer that adheres to the surface. The surface is then processed while the protective coating is on the surface. Thereafter, the protective layer is removed from the surface by separating the protective layer away from the surface without the use of chemical solutions.

Abstract translation: 公开了用于使用不需要除去化学溶液的可干燥去除的保护涂层来保护表面的技术。 在一个实施例中，保护层设置在表面上。 保护层由附着在表面上的一层组成。 然后在表面上保护表面进行处理。 此后，通过将保护层从表面分离而不使用化学溶液，从表面除去保护层。

公开(公告)号：US20170032991A1

公开(公告)日：2017-02-02

申请号：US15295943

申请日：2016-10-17

Applicant: INTEL CORPORATION

Inventor： John C. JOHNSON ,  Sandeep B. SANE ,  Sandeep RAZDAN ,  Edward R. PRACK ,  Leonel R. ARANA ,  Peter A. DAVISON ,  Eric J. MORET ,  Lawrence M. PALANUK ,  Gregory A. STONE

IPC: H01L21/673 ,  H01L21/78 ,  H01L21/683 ,  H01L21/67 ,  H01L21/677

CPC classification number: H01L21/67333 ,  H01L21/67265 ,  H01L21/67309 ,  H01L21/67356 ,  H01L21/67363 ,  H01L21/67383 ,  H01L21/67769 ,  H01L21/67772 ,  H01L21/67778 ,  H01L21/68 ,  H01L21/6833 ,  H01L21/68764 ,  H01L21/68771 ,  H01L21/78 ,  H05K13/0084

Abstract: A method includes identifying a wafer position for a plurality of die on a wafer, storing the wafer position for each of the plurality of die in a database, dicing the wafer into a plurality of singulated die, positioning each of the singulated die in a die position location on a tray, and storing the die position on the tray for each of the singulated die in the database. The database includes information including the wafer position associated with each die position. The tray is transported to a processing tool, and at least one of the plurality of singulated die is removed from the die position on the tray and processed in the processing tool. The processed singulated die is replaced in the same defined location on the tray that the singulated die was positioned in prior to the processing. Other embodiments are described and claimed.

Abstract translation: 一种方法包括识别晶片上的多个管芯的晶片位置，将多个管芯中的每个管芯的晶片位置存储在数据库中，将晶片切割成多个单个管芯，将每个单模管芯定位在管芯中 在托盘上的位置位置，并将模具位置存储在数据库中的每个单个模具的托盘上。 数据库包括包括与每个模具位置相关联的晶片位置的信息。 托盘被运送到处理工具，并且多个分割模具中的至少一个从托盘上的模具位置移除并在处理工具中进行处理。 在处理之前，单独模具位于托盘上的相同的限定位置处理被处理的单个模具。 描述和要求保护其他实施例。