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    Technologies for flexible protocol acceleration
    1.
    发明授权
    Technologies for flexible protocol acceleration 有权

    公开(公告)号：US10884968B2

    公开(公告)日：2021-01-05

    申请号：US16366496

    申请日：2019-03-27

    申请人： Intel Corporation

    发明人： Matthew J. Adiletta ,  Bradley Burres ,  Duane Galbi ,  Amit Kumar ,  Yadong Li ,  Salma Mirza ,  Jose Niell ,  Thomas E. Willis ,  William Duggan

    IPC分类号： G06F13/42 ,  G06F8/60

    摘要： Technologies for flexible I/O protocol acceleration include a computing device having a root complex, a smart endpoint coupled to the root complex, and an offload complex coupled to the smart endpoint. The smart endpoint receives an I/O transaction that originates from the root complex and parses the I/O transaction based on an I/O protocol and identifies an I/O command. The smart endpoint may parse the I/O transaction based on endpoint firmware that may be programmed by the computing device. The smart endpoint accelerates the I/O command and provides a smart context to the offload complex. The smart endpoint may copy the I/O command to memory of the smart endpoint or the offload complex. The smart endpoint may identify protocol data based on the I/O command and copy the protocol data to the memory of the smart endpoint or the offload complex. Other embodiments are described and claimed.

    Technologies for flexible I/O endpoint acceleration
    4.
    发明授权
    Technologies for flexible I/O endpoint acceleration 有权

    公开(公告)号：US10783100B2

    公开(公告)日：2020-09-22

    申请号：US16366504

    申请日：2019-03-27

    申请人： Intel Corporation

    发明人： Matthew J. Adiletta ,  Brad Burres ,  Duane Galbi ,  Amit Kumar ,  Yadong Li ,  Salma Mirza ,  Jose Niell ,  Thomas E. Willis ,  William Duggan

    IPC分类号： G06F13/20 ,  G06F13/42

    摘要： Technologies for flexible I/O endpoint acceleration include a computing device having a root complex, a soft endpoint coupled to the root complex, and an offload complex coupled to the soft endpoint. The soft endpoint establishes an emulated endpoint hierarchy based on endpoint firmware. The computing device may program the endpoint firmware. The soft endpoint receives an I/O transaction that originates from the root complex and determines whether to process the I/O transaction. The soft endpoint may process the I/O transaction or forward the I/O transaction to the offload complex. The soft endpoint may encapsulate the I/O transaction with metadata and forward the encapsulated transaction to the offload complex. The soft endpoint may store responses from the offload complex in a history buffer and retrieve the responses in response to retried I/O transactions. The I/O transaction may be a PCI Express transaction layer packet. Other embodiments are described and claimed.

    TECHNOLOGIES FOR PROCESSING NETWORK PACKETS BY AN INTELLIGENT NETWORK INTERFACE CONTROLLER
    7.
    发明申请
    TECHNOLOGIES FOR PROCESSING NETWORK PACKETS BY AN INTELLIGENT NETWORK INTERFACE CONTROLLER 审中-公开

    公开(公告)号：US20180152540A1

    公开(公告)日：2018-05-31

    申请号：US15721815

    申请日：2017-09-30

    申请人： Intel Corporation

    发明人： Jose Niell ,  Brad Burres ,  Erik McShane ,  Naru Sundar ,  Alain Gravel

    IPC分类号： H04L29/08 ,  H04L12/24 ,  H04L12/933

    摘要： Technologies for processing network packets by a network interface controller (NIC) of a computing device include a network interface, a packet processor, and a controller device of the NIC, each communicatively coupled to a memory fabric of the NIC. The packet processor is configured to receive an event message from the memory fabric and transmit a message to the controller device, wherein the message indicates the network packet has been received and includes the memory fabric location pointer. The controller device is configured to fetch at least a portion of the received network packet from the memory fabric, write an inbound descriptor usable by one or more on-die cores of the NIC to perform an operation on the fetched portion, and restructure the network packet as a function of an outbound descriptor written by the on-die cores subsequent to performing the operation. Other embodiments are described herein.

    VM encryption of block storage with end-to-end data integrity protection in a SmartNIC
    8.
    发明授权
    VM encryption of block storage with end-to-end data integrity protection in a SmartNIC 有权

    公开(公告)号：US12124619B2

    公开(公告)日：2024-10-22

    申请号：US17133469

    申请日：2020-12-23

    申请人： Intel Corporation

    发明人： Jose Niell ,  Kiel Boyle ,  Bradley Burres

    IPC分类号： G06F21/78 ,  G06F21/60 ,  G06F21/85

    CPC分类号： G06F21/78 ,  G06F21/602 ,  G06F21/85

    摘要： Methods and apparatus for Virtual Machine (VM) encryption of block storage with end-to-end data integrity protection in a SmartNIC. For a Write operation, the NIC is configured to encrypt a data block, append the encrypted data block with protection information (PI) generated using data in the data block to generate a protected data block and forward the protected data block onto a network or fabric to be delivered to a storage node. For a Read operation, the NIC is configured to receive a protected data block comprising cipher text including encrypted payload data concatenated with an encrypted inner PI and an outer PI, use the inner and outer PIs to perform PI checks, decrypt the cipher text to extract payload data, and forward or write at least the payload to a host. The inner and outer PIs and data formats are compliant with an NVMe specification.

    REMOTE DISAGGREGATED INFRASTRUCTURE PROCESSING UNITS (IPUS)
    9.
    发明申请
    REMOTE DISAGGREGATED INFRASTRUCTURE PROCESSING UNITS (IPUS) 有权

    公开(公告)号：US20230096451A1

    公开(公告)日：2023-03-30

    申请号：US17484193

    申请日：2021-09-24

    申请人： Intel Corporation

    发明人： Salma Johnson ,  Duane Galbi ,  Bradley Burres ,  Jose Niell ,  Jeongnim Kim ,  Reshma Lal ,  Anandhi Jayakumar ,  Mrittika Ganguli ,  Thomas Willis

    IPC分类号： G06F9/50 ,  H04L29/08 ,  H04L29/06 ,  H04L9/08

    摘要： Techniques for remote disaggregated infrastructure processing units (IPUs) are described. An apparatus described herein includes an interconnect controller to receive a transaction layer packet (TLP) from a host compute node; identify a sender and a destination from the TLP; and provide, to a content addressable memory (CAM), a key determined from the sender and the destination. The apparatus as described herein can further include core circuitry communicably coupled to the interconnect controller, the core circuitry to determine an output of the CAM based on the key, the output comprising a network address of an infrastructure processing unit (IPU) assigned to the host compute node, wherein the IPU is disaggregated from the host compute node over a network; and send the TLP to the IPU using a transport protocol.

    TECHNOLOGIES FOR PROCESSING NETWORK PACKETS IN AGENT-MESH ARCHITECTURES
    10.
    发明申请
    TECHNOLOGIES FOR PROCESSING NETWORK PACKETS IN AGENT-MESH ARCHITECTURES 审中-公开

    公开(公告)号：US20180152383A1

    公开(公告)日：2018-05-31

    申请号：US15720390

    申请日：2017-09-29

    申请人： Intel Corporation

    发明人： Brad Burres ,  Ronen Chayat ,  Alain Gravel ,  Robert Hathaway ,  Amit Y. Kumar ,  Jose Niell ,  Nadav Turbovich

    IPC分类号： H04L12/813 ,  H04L12/851 ,  H04L12/26

    摘要： Technologies for processing network packets in an agent-mesh architecture include a network interface controller (NIC) of a computing device configured to write, by a network fabric interface of a memory fabric of the NIC, a received network packet to the memory fabric in a distributed fashion. The network fabric interface is configured to send an event message indicating the received network packet to a packet processor communicatively coupled to the memory fabric. The packet processor is configured to read, in response to having received the generated event message, at least a portion of the received network packet from the memory fabric, identify an agent of the NIC for additional processing of the received network packet, generate a network packet received event message indicating the received network packet is available for processing, and transmit the network packet received event message to the identified agent. Other embodiments are described herein.