公开(公告)号：US5843691A

公开(公告)日：1998-12-01

申请号：US779735

申请日：1996-12-31

申请人： Joel Douglas ,  Ernest Kiser ,  Michael F. Tomasco ,  Remedios Dato ,  Edward G. Rice ,  Deborah P. Tuohy ,  Mark Maxson ,  Zbigniew Witko ,  Scott Segelke

发明人： Joel Douglas ,  Ernest Kiser ,  Michael F. Tomasco ,  Remedios Dato ,  Edward G. Rice ,  Deborah P. Tuohy ,  Mark Maxson ,  Zbigniew Witko ,  Scott Segelke

IPC分类号： C12Q1/00 ,  C12Q1/26 ,  C12Q1/54 ,  G01N33/52 ,  G01N33/558 ,  G01N33/66 ,  C12Q1/28 ,  G01N21/00

CPC分类号： G01N33/66 ,  C12Q1/54 ,  G01N33/521 ,  G01N33/523 ,  G01N33/526 ,  G01N33/558

摘要： A multilayer reagent test strip measures the concentration of analyte in a liquid sample that is applied to it. The sample is guided to a number of assay areas arrayed along the strip, where the analyte can react with a reagent to cause a color change. Each assay area also includes an inhibitor for the color-change reaction. The inhibitor concentration increases in successive assay areas; thus, the number of areas that change color is a measure of the analyte concentration. The test strip is particularly adapted for measuring glucose in a whole blood sample. In a preferred embodiment, the sample is guided to the assay areas along a path formed by crushing selected areas of a membrane, and the assay areas are uncrushed areas of the membrane.

摘要翻译： 多层试剂测试条测量施加于其上的液体样品中分析物的浓度。 将样品引导到沿着条带排列的多个测定区域，其中分析物可以与试剂反应以引起颜色变化。 每个测定区域还包括用于变色反应的抑制剂。 连续测定区域的抑制剂浓度增加; 因此，改变颜色的区域的数量是分析物浓度的量度。 测试条特别适用于测量全血样品中的葡萄糖。 在优选的实施方案中，将样品引导到沿着通过破碎膜的选定区域形成的路径的测定区域，并且测定区域是膜的未破碎区域。

公开(公告)号：US20060236277A1

公开(公告)日：2006-10-19

申请号：US11089472

申请日：2005-03-24

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G06F17/50 ,  G06F9/45 ,  H03K17/693

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method, apparatus and computer program product are provided for implementing vertically coupled noise control through a mesh plane in an electronic package design. Electronic package physical design data are received. Instances of vertically coupled noise in the electronic package physical design data are identified. The identified instances of vertically coupled noise are quantified. Then the electronic package physical design data are modified to limit the vertically coupled noise.

摘要翻译： 提供了一种用于通过电子封装设计中的网格平面实现垂直耦合噪声控制的方法，装置和计算机程序产品。 接收电子封装物理设计数据。 识别电子封装物理设计数据中垂直耦合噪声的实例。 所确定的垂直耦合噪声的实例被量化。 然后修改电子封装物理设计数据，以限制垂直耦合噪声。

公开(公告)号：US20050264380A1

公开(公告)日：2005-12-01

申请号：US10857742

申请日：2004-05-28

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： H01P3/12 ,  H05K1/02 ,  H05K3/00

CPC分类号： H01P3/12 ,  H05K1/0237 ,  H05K1/0272 ,  H05K3/0061 ,  H05K2201/037

摘要： A method and stiffener-embedded waveguide structure are provided for implementing enhanced data transfer for printed circuit board applications. At least one microwave channel is defined within a stiffener. The microwave channel provides a high frequency path for data transfers. Use of the waveguide channel in the stiffener for data transfers can replace or supplement otherwise required transmission paths in an associated printed circuit board.

摘要翻译： 提供了一种用于实现印刷电路板应用的增强型数据传输的方法和加强肋嵌入式波导结构。 在加强件内限定至少一个微波通道。 微波通道为数据传输提供了高频路径。 在加强件中用于数据传输的波导通道的使用可替代或补充相关印刷电路板中所需的传输路径。

公开(公告)号：US20070263475A1

公开(公告)日：2007-11-15

申请号：US11383023

申请日：2006-05-12

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G11C8/00

CPC分类号： G11C5/063 ,  G11C7/1048 ,  G11C7/1066

摘要： A double-data-rate two synchronous dynamic random access (DDR2) memory circuit includes a low-speed input path and a high-speed input path coupled thereto by an input coupling and forming a common input, the common input coupled to a memory core, the memory core having a common output wherein a high-speed output path and a low-speed output path are coupled together by an output coupling and further coupled to the common output of the memory core.

摘要翻译： 双数据速率两同步动态随机存取（DDR2）存储器电路包括低速输入路径和通过输入耦合耦合到其上的高速输入路径并形成公共输入，公共输入耦合到存储器核心 存储器芯具有公共输出，其中高速输出路径和低速输出路径通过输出耦合耦合在一起并进一步耦合到存储器核心的公共输出端。

公开(公告)号：US20050285600A1

公开(公告)日：2005-12-29

申请号：US10879813

申请日：2004-06-29

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G01R27/28 ,  G01R31/08 ,  G01R31/28

CPC分类号： G01R31/2853 ,  G01R27/28

摘要： A method and apparatus are provided for implementing direct attenuation loss measurement in an electronic package. A sinusoidal voltage source signal of a selected frequency is coupled to an embedded transmission line test structure in the electronic package. Receive circuitry is coupled to the transmission line test structure for detecting amplitude of a received sinusoidal voltage source signal to identify attenuation loss through the transmission line test structure. An identified attenuation loss of the transmission line test structure is compared with a threshold value for verifying acceptable attenuation of the electronic package transmission line test structure.

摘要翻译： 提供一种用于在电子封装中实现直接衰减损耗测量的方法和装置。 所选频率的正弦电压源信号耦合到电子封装中的嵌入式传输线测试结构。 接收电路耦合到传输线测试结构，用于检测接收的正弦电压源信号的幅度，以通过传输线测试结构识别衰减损耗。 将传输线测试结构的确定的衰减损耗与用于验证电子封装传输线测试结构的可接受衰减的阈值进行比较。

公开(公告)号：US20050104602A1

公开(公告)日：2005-05-19

申请号：US10712742

申请日：2003-11-13

申请人： Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G01R27/04 ,  G01R27/28 ,  G01R31/02 ,  H04B3/46

CPC分类号： G01R27/04

摘要： A method and apparatus are provided for implementing automated electronic package transmission line characteristic impedance verification. A sinusoidal voltage source is coupled to a transmission line test structure for generating a selected frequency. Impedance measuring circuitry is coupled to the transmission line test structure for measuring an input impedance with an open-circuit termination and a short-circuit termination. Characteristic impedance calculation circuitry is coupled to the impedance measuring circuitry receiving the input impedance measured values for the open-circuit termination and the short-circuit termination for calculating characteristic impedance. Logic circuitry is coupled to the characteristic impedance calculation circuitry for comparing the calculated characteristic impedance with threshold values for verifying acceptable electronic package transmission line characteristic impedance.

摘要翻译： 提供了一种用于实现自动化电子封装传输线特性阻抗验证的方法和装置。 正弦电压源耦合到用于产生选定频率的传输线测试结构。 阻抗测量电路耦合到传输线测试结构，用于测量具有开路端接和短路端接的输入阻抗。 特征阻抗计算电路耦合到阻抗测量电路，其接收用于开路端接的输入阻抗测量值和用于计算特性阻抗的短路端接。 逻辑电路耦合到特征阻抗计算电路，用于将计算的特性阻抗与用于验证可接受的电子封装传输线特性阻抗的阈值进行比较。

公开(公告)号：US20070108611A1

公开(公告)日：2007-05-17

申请号：US11282082

申请日：2005-11-17

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： H01L23/48

CPC分类号： H05K1/141 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/144 ,  H05K3/3436 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2203/1572

摘要： A stacking method and structure for attaching memory components to a ball grid array (BGA) device are provided. A specialized carrier includes multiple memory devices such as memory die, or chip scale packaging (CSP) memory. The specialized carrier is attached to a mating supporting carrier to form a stacked structure. The mating supporting carrier includes an associated ball grid array (BGA) device for the multiple devices of the specialized carrier.

摘要翻译： 提供了一种用于将存储器组件附接到球栅阵列（BGA）装置的堆叠方法和结构。 专用载体包括多个存储器件，例如存储管芯或芯片级封装（CSP）存储器。 专用载体附接到配合支撑载体以形成堆叠结构。 配合支撑载体包括用于专用载体的多个装置的相关联的球栅阵列（BGA）装置。

公开(公告)号：US20050251777A1

公开(公告)日：2005-11-10

申请号：US10839488

申请日：2004-05-05

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G06F17/50 ,  H01L21/44 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/42

CPC分类号： H01L23/49827 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/115 ,  H05K3/0032 ,  H05K3/429 ,  H05K2201/09836

摘要： A method and structure are provided for implementing enhanced electronic packaging and printed circuit board (PCB) layout. A diagonal via is formed at a selected angle between a first side and an opposite second side of a printed circuit board at a selected printed circuit board location. The diagonal via is plated with an electrically conductive material. Diagonal vias are used to interconnect between a high-density pitch on the first side and a larger pitch on the opposite second side of the printed circuit board. The diagonal vias can be used to selectively interconnect electrical patterns of selected layers and eliminate the use of blind and buried vias.

摘要翻译： 提供了一种用于实现增强型电子封装和印刷电路板（PCB）布局的方法和结构。 在所选择的印刷电路板位置处，在印刷电路板的第一侧和相对的第二侧之间以选定的角度形成对角通孔。 对角通孔镀有导电材料。 对角通孔用于在第一侧上的高密度间距和在印刷电路板的相对的第二侧上的较大节距之间进行互连。 对角通孔可用于选择性地互连所选层的电气图案，并消除使用盲孔和埋孔。

公开(公告)号：US20050098607A1

公开(公告)日：2005-05-12

申请号：US10703353

申请日：2003-11-07

申请人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Darryl Becker ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： H05K1/02 ,  H05K3/34 ,  B23K1/00

CPC分类号： H05K3/3436 ,  H05K1/0219 ,  H05K2201/09609 ,  H05K2201/10378 ,  H05K2203/0415 ,  Y02P70/613

摘要： A method and structure are provided for implementing a column attach coupled noise suppressor for a solder column structure of the type used to join a substrate to a circuit card. The electrical noise suppressor structure includes a plurality of elongated through openings that are arranged in a predefined pattern. The elongated through openings have electrically conductive sidewalls and are electrically connected together. The predefined pattern of the elongated, electrically conductive through openings corresponds to a layout of solder columns. The solder columns are attached at one end to either a substrate or a circuit card and are inserted through the elongated through openings of the electrical noise suppressor structure, spaced apart from the electrically conductive sidewalls. Then the solder columns are attached at the other end to the other one of the substrate or circuit card.

摘要翻译： 提供了一种用于实现用于将基板连接到电路卡的类型的焊料柱结构的列连接耦合噪声抑制器的方法和结构。 电噪声抑制器结构包括以预定图案布置的多个细长通孔。 细长的通孔具有导电侧壁并电连接在一起。 细长的导电通孔的预定图案对应于焊料柱的布局。 焊料柱的一端连接到基板或电路卡，并且通过与导电侧壁间隔开的电噪声抑制器结构的细长通孔插入。 然后，焊料柱在另一端连接到另一个衬底或电路卡。

公开(公告)号：US20050077912A1

公开(公告)日：2005-04-14

申请号：US10682132

申请日：2003-10-09

申请人： Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

发明人： Gerald Bartley ,  Paul Dahlen ,  Philip Germann ,  Andrew Maki ,  Mark Maxson

IPC分类号： G01R1/073 ,  G01R31/28 ,  H05K3/22 ,  G01R31/02

CPC分类号： G01R1/07328 ,  G01R31/2808 ,  H05K3/222

摘要： A method and a probe structure are provided for implementing multiple signals probing of a printed circuit board. A probe structure is formed on an outside surface of the printed circuit board. A resistor is electrically connected with an associated via with a signal to be monitored. A path to a predefined probe location for monitoring the signal is defined from the resistor using the probe structure.

摘要翻译： 提供了一种用于实现印刷电路板的多信号探测的方法和探针结构。 探针结构形成在印刷电路板的外表面上。 电阻器与相关的通孔与要监控的信号电连接。 使用探针结构从电阻器定义用于监测信号的预定义探针位置的路径。