公开(公告)号：US07115985B2

公开(公告)日：2006-10-03

申请号：US10955913

申请日：2004-09-30

申请人： Joze E. Antol ,  Philip William Seitzer ,  Daniel Patrick Chesire ,  Rafe Carl Mengel ,  Vance Dolvan Archer ,  Thomas B. Gans ,  Taeho Kook ,  Sailesh M. Merchant

发明人： Joze E. Antol ,  Philip William Seitzer ,  Daniel Patrick Chesire ,  Rafe Carl Mengel ,  Vance Dolvan Archer ,  Thomas B. Gans ,  Taeho Kook ,  Sailesh M. Merchant

IPC分类号： H01L23/12 ,  H01L23/053 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00015

摘要： Disclosed herein are novel support structures for pad reinforcement in conjunction with new bond pad designs for semiconductor devices. The new bond pad designs avoid the problems associated with probe testing by providing a probe region that is separate from a wire bond region. Separating the probe region 212 from the wire bond region 210 and forming the bond pad 211 over active circuitry has several advantages. By separating the probe region 212 from the wire bond region 210, the wire bond region 210 is not damaged by probe testing, allowing for more reliable wire bonds. Also, forming the bond pad 211 over active circuitry, including metal interconnect layers, allows the integrated circuit to be smaller.

公开(公告)号：US07301231B2

公开(公告)日：2007-11-27

申请号：US11448560

申请日：2006-06-07

申请人： Joze E. Antol ,  Philip William Seitzer ,  Daniel Patrick Chesire ,  Rafe Carl Mengel ,  Vance Dolvan Archer ,  Thomas B. Gans ,  Taeho Kook ,  Sailesh M. Merchant

发明人： Joze E. Antol ,  Philip William Seitzer ,  Daniel Patrick Chesire ,  Rafe Carl Mengel ,  Vance Dolvan Archer ,  Thomas B. Gans ,  Taeho Kook ,  Sailesh M. Merchant

IPC分类号： H01L23/522

CPC分类号： H01L24/05 ,  H01L23/3171 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00015

摘要： Disclosed herein are novel support structures for pad reinforcement in conjunction with new bond pad designs for semiconductor devices. The new bond pad designs avoid the problems associated with probe testing by providing a probe region that is separate from a wire bond region. Separating the probe region 212 from the wire bond region 210 and forming the bond pad 211 over active circuitry has several advantages. By separating the probe region 212 from the wire bond region 210, the wire bond region 210 is not damaged by probe testing, allowing for more reliable wire bonds. Also, forming the bond pad 211 over active circuitry, including metal interconnect layers, allows the integrated circuit to be smaller.

摘要翻译： 这里公开了用于衬垫加强的新型支撑结构以及用于半导体器件的新的接合焊盘设计。 新的焊盘设计通过提供与引线键合区域分离的探针区域来避免与探针测试相关的问题。 将探针区域212与引线接合区域210分离并通过有源电路形成接合焊盘211具有若干优点。 通过将探针区域212与引线键合区域210分离，引线键合区域210不会被探针测试所损坏，从而允许更可靠的引线键合。 此外，在包括金属互连层的有源电路上形成接合焊盘211允许集成电路更小。

公开(公告)号：US07429502B2

公开(公告)日：2008-09-30

申请号：US11868624

申请日：2007-10-08

申请人： Vance D. Archer, III ,  Kouros Azimi ,  Daniel Patrick Chesire ,  Warren K Gladden ,  Seung H. Kang ,  Taeho Kook ,  Sailesh M. Merchant ,  Vivian Ryan

发明人： Vance D. Archer, III ,  Kouros Azimi ,  Daniel Patrick Chesire ,  Warren K Gladden ,  Seung H. Kang ,  Taeho Kook ,  Sailesh M. Merchant ,  Vivian Ryan

IPC分类号： H01L21/00

CPC分类号： H01L23/36 ,  H01L21/4871 ,  H01L25/165 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/00

摘要： An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.

摘要翻译： 一种集成电路装置，其包括冶金结合以增强对散热器的热传导。 在半导体器件中，集成电路管芯的表面冶金地结合到散热器的表面。 在制造器件的示例性方法中，封装衬底的上表面包括内部区域和周边区域。 集成电路管芯位于衬底表面上，并且集成电路管芯的第一表面被放置成与封装衬底接触。 金属层形成在集成电路管芯的第二相对表面上。 预成型件定位在金属层上，并且散热器位于预制件上。 用预成型件形成接合层，将散热器冶金结合到集成电路管芯的第二表面。

公开(公告)号：US07327029B2

公开(公告)日：2008-02-05

申请号：US11235920

申请日：2005-09-27

申请人： Vance D. Archer, III ,  Kouros Azimi ,  Daniel Patrick Chesire ,  Warren K Gladden ,  Seung H. Kang ,  Taeho Kook ,  Sailesh M. Merchant ,  Vivian Ryan

发明人： Vance D. Archer, III ,  Kouros Azimi ,  Daniel Patrick Chesire ,  Warren K Gladden ,  Seung H. Kang ,  Taeho Kook ,  Sailesh M. Merchant ,  Vivian Ryan

IPC分类号： H01L23/34

CPC分类号： H01L23/36 ,  H01L21/4871 ,  H01L25/165 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/00

摘要： An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.

摘要翻译： 一种集成电路装置，其包括冶金结合以增强对散热器的热传导。 在半导体器件中，集成电路管芯的表面冶金地结合到散热器的表面。 在制造器件的示例性方法中，封装衬底的上表面包括内部区域和周边区域。 集成电路管芯位于衬底表面上，并且集成电路管芯的第一表面被放置成与封装衬底接触。 金属层形成在集成电路管芯的第二相对表面上。 预成型件定位在金属层上，并且散热器位于预制件上。 用预成型件形成接合层，将散热器冶金结合到集成电路管芯的第二表面。

公开(公告)号：US07221173B2

公开(公告)日：2007-05-22

申请号：US10953291

申请日：2004-09-29

申请人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh M. Merchant

发明人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh M. Merchant

IPC分类号： G01R31/02

CPC分类号： H01L24/10 ,  H01L22/32 ,  H01L24/13 ,  H01L2224/0392 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/056 ,  H01L2224/05624 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00014

摘要： An interface assembly (20) and method for testing a semiconductor wafer prior to performing a flip chip bumping process are provided. The interface assembly includes a flip chip bonding pad (24) having a region (28) for performing the bumping process. A test pad (22) is integrally constructed with the bonding pad and includes a probe region (26) for performing wafer-level testing prior to performing the bumping process. The integral construction of the bonding and testing pads avoids, for example, an introduction of propagation delays to test signals passing therethrough, thereby improving the accuracy and reliability of wafer test results.

摘要翻译： 提供了一种用于在执行倒装芯片碰撞处理之前测试半导体晶片的界面组件（20）和方法。 接口组件包括具有用于执行碰撞处理的区域（28）的倒装芯片焊盘（24）。 测试焊盘（22）与接合焊盘一体构成，并且包括用于在执行碰撞过程之前进行晶片级测试的探针区域（26）。 焊接和测试焊盘的整体结构避免了例如引入传播延迟来测试通过其的信号，从而提高了晶片测试结果的准确性和可靠性。

公开(公告)号：US20090072393A1

公开(公告)日：2009-03-19

申请号：US11884328

申请日：2006-02-24

申请人： Mark Adam Bachman ,  Donald Stephen Bitting ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh Mansinh Merchant

发明人： Mark Adam Bachman ,  Donald Stephen Bitting ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh Mansinh Merchant

IPC分类号： H01L23/488 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/11912 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A solder bump structure and an under bump metallurgical structure. An upper surface of a semiconductor substrate comprises a first conductive pad (200) disposed thereon. A passivation layer (202) overlies the upper surface. A second conductive pad (212) is disposed in an opening (204) in the passivation layer and in contact with the first conductive pad. The under bump metallurgical structure (300) encapsulates the second conductive pad, covering an upper surface and sidewalls surfaces of the second conductive pad, protecting both the first and the second conductive pads from environmental and processing effects. According to the present invention, the conventional second passivation layer is not required. Methods for forming the various structures are also presented.

摘要翻译： 焊料凸块结构和凹凸金属结构。 半导体衬底的上表面包括设置在其上的第一导电焊盘（200）。 钝化层（202）覆盖在上表面上。 第二导电焊盘（212）设置在钝化层中的开口（204）中并与第一导电焊盘接触。 凸块下金属结构（300）封装第二导电焊盘，覆盖第二导电焊盘的上表面和侧壁表面，保护第一和第二导电焊盘免受环境和处理的影响。 根据本发明，不需要传统的第二钝化层。 还提出了形成各种结构的方法。

公开(公告)号：US07777333B2

公开(公告)日：2010-08-17

申请号：US11884328

申请日：2006-02-24

申请人： Mark Adam Bachman ,  Donald Stephen Bitting ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh Mansinh Merchant

发明人： Mark Adam Bachman ,  Donald Stephen Bitting ,  Daniel Patrick Chesire ,  Taeho Kook ,  Sailesh Mansinh Merchant

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/11912 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A solder bump structure and an under bump metallurgical structure. An upper surface of a semiconductor substrate comprises a first conductive pad (200) disposed thereon. A passivation layer (202) overlies the upper surface. A second conductive pad (212) is disposed in an opening (204) in the passivation layer and in contact with the first conductive pad. The under bump metallurgical structure (300) encapsulates the second conductive pad, covering an upper surface and sidewalls surfaces of the second conductive pad, protecting both the first and the second conductive pads from environmental and processing effects. According to the present invention, the conventional second passivation layer is not required. Methods for forming the various structures are also presented.

摘要翻译： 焊料凸块结构和凹凸金属结构。 半导体衬底的上表面包括设置在其上的第一导电焊盘（200）。 钝化层（202）覆盖在上表面上。 第二导电焊盘（212）设置在钝化层中的开口（204）中并与第一导电焊盘接触。 凸块下金属结构（300）封装第二导电焊盘，覆盖第二导电焊盘的上表面和侧壁表面，保护第一和第二导电焊盘免受环境和处理的影响。 根据本发明，不需要传统的第二钝化层。 还提出了形成各种结构的方法。

公开(公告)号：US07328830B2

公开(公告)日：2008-02-12

申请号：US10741155

申请日：2003-12-19

申请人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Sailesh Mansinh Merchant

发明人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Sailesh Mansinh Merchant

IPC分类号： B23K31/02

CPC分类号： H01L21/02063 ,  H01L21/31116 ,  H01L21/32136 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/45 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05022 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05554 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/11901 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/8501 ,  H01L2924/0001 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： An integrated circuit structure and a method for fabricating the structure. The method comprises forming a copper bond pad for attaching the integrated circuit to a package. Copper oxide is removed from the pad by reduction in a hydrogen ion atmosphere. For attaching the integrated circuit to a bump-bonding package an under-bump metallization layer is formed over the reduced copper pad and a solder bump formed thereover. The process can also be employed in a wire bonding process by forming an aluminum layer overlying the cleaned copper pad. The structure of the present invention comprises a copper pad formed in a substrate. A passivation layer defining an opening therein overlies the copper pad. A under-bump metallization layer is disposed in the opening and a solder bump overlies the metallization layer. Alternatively, the structure further comprises an aluminum pad disposed overlying the reduced copper pad.

摘要翻译： 集成电路结构及其制造方法。 该方法包括形成用于将集成电路附接到封装的铜焊盘。 通过在氢离子气氛中还原，将铜氧化物从垫中除去。 为了将集成电路连接到凸块焊接封装，在减小的铜焊盘上形成凸起下金属化层，并在其上形成焊料凸块。 该方法也可以通过形成覆盖在清洁的铜垫上的铝层在引线接合工艺中使用。 本发明的结构包括形成在基板中的铜焊盘。 限定其中的开口的钝化层覆盖在铜焊盘上。 凸起下金属化层设置在开口中，并且焊料凸块覆盖在金属化层上。 或者，该结构还包括设置在还原铜垫上的铝垫。

公开(公告)号：US06960836B2

公开(公告)日：2005-11-01

申请号：US10675260

申请日：2003-09-30

申请人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Sailesh Mansinh Merchant ,  John William Osenbach ,  Kurt George Steiner

发明人： Mark Adam Bachman ,  Daniel Patrick Chesire ,  Sailesh Mansinh Merchant ,  John William Osenbach ,  Kurt George Steiner

IPC分类号： H01L21/60 ,  H01L23/00 ,  H01L23/485 ,  H01L23/52

CPC分类号： H01L24/05 ,  H01L21/768 ,  H01L23/562 ,  H01L24/03 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05093 ,  H01L2224/05558 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/05552

摘要： Disclosed herein is a reinforcing system and method for reinforcing a contact pad of an integrated circuit. Specifically exemplified is a system and method that comprises a reinforcing structure interposed between a top contact pad layer and an underlying metal layer.

摘要翻译： 本文公开了一种用于加强集成电路的接触焊盘的增强系统和方法。 具体示出的是包括插入在顶部接触垫层和下面的金属层之间的加强结构的系统和方法。