Transfer chamber metrology for improved device yield
    3.
    发明授权
    Transfer chamber metrology for improved device yield 有权
    转移室计量,提高装置产量

    公开(公告)号:US09076827B2

    公开(公告)日:2015-07-07

    申请号:US13230573

    申请日:2011-09-12

    摘要: Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes.

    摘要翻译: 用于控制外延生长参数的设备和方法,例如在制造发光二极管(LED)期间。 实施例包括生长后的III-V族薄膜的PL测量,而在高温下的基底处于多腔聚集工具的转移室中。 在其它实施例中,在衬底设置在传送室中的同时,执行膜厚度测量,非接触电阻率测量以及颗粒和/或粗糙度测量。 通过基于从设置在III-V族III膜以下的GaN基底层的发射来估计升高的温度,在传送室中执行的一个或多个测量值被温度校正到室温。 在其他实施例中,温度校正基于由所收集的白光反射光谱确定的GaN基底层的吸收带边缘。 然后使用温度校正计量来控制生长过程。

    METHOD AND SYSTEM FOR PLANAR REGROWTH IN GAN ELECTRONIC DEVICES

    公开(公告)号:US20130292686A1

    公开(公告)日:2013-11-07

    申请号:US13465812

    申请日:2012-05-07

    摘要: A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources.

    METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE
    6.
    发明申请
    METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE 有权
    制备GAN MERGED P-I-N肖特基(MPS)二极体的方法

    公开(公告)号:US20130087878A1

    公开(公告)日:2013-04-11

    申请号:US13270625

    申请日:2011-10-11

    IPC分类号: H01L29/47 H01L21/20

    摘要: A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.

    摘要翻译: 半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括III族氮化物外延结构,其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。 多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。 半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。 在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

    Photonic crystal structures and methods of making and using photonic crystal structures
    10.
    发明授权
    Photonic crystal structures and methods of making and using photonic crystal structures 有权
    光子晶体结构及制造和使用光子晶体结构的方法

    公开(公告)号:US07759689B2

    公开(公告)日:2010-07-20

    申请号:US11745027

    申请日:2007-05-07

    申请人: David P. Bour

    发明人: David P. Bour

    IPC分类号: H01L33/00

    摘要: A light emitting device having a buried photonic bandgap (PBG) structure is created using a relatively simple fabrication method known as epitaxial layer overgrowth (ELOG). By burying the PBG structure, the difficulties and disadvantages associated with the known technique of etching holes into a LED emission surface to form the PBG structure are avoided.

    摘要翻译: 使用称为外延层过度生长(ELOG)的相对简单的制造方法产生具有掩埋光子带隙(PBG)结构的发光器件。 通过埋入PBG结构,避免了将已知的将孔蚀刻到LED发射表面中以形成PBG结构的技术的困难和缺点。