公开(公告)号：US5950099A

公开(公告)日：1999-09-07

申请号：US629442

申请日：1996-04-09

申请人： Naohiro Shoda ,  Katsuya Okumura

发明人： Naohiro Shoda ,  Katsuya Okumura

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/52 ,  H01L21/265

CPC分类号： H01L21/28512

摘要： A method for fabricating a damascene interconnect includes the steps of depositing a metal layer of the surface of an insulating film; etching the metal layer and the insulating film to form an insulating groove; depositing a silicon layer on an upper surface on the metal layer and on each sidewall and a bottom of the insulating groove; annealing the silicon layer and the metal layer to form a silicide layer; implanting ions in the bottom of the insulating groove; and depositing an interconnect material in the insulating groove using selective chemical vapor deposition. In one embodiment, the metal layer is a titanium layer, the interconnect material is tungsten, and the implanted ions are arsenic ions.

摘要翻译： 一种用于制造镶嵌互连的方法包括沉积绝缘膜表面的金属层的步骤; 蚀刻金属层和绝缘膜以形成绝缘槽; 在金属层的上表面和绝缘槽的每个侧壁和底部上沉积硅层; 退火硅层和金属层以形成硅化物层; 将离子注入绝缘槽的底部; 以及使用选择性化学气相沉积在所述绝缘槽中沉积互连材料。 在一个实施例中，金属层是钛层，互连材料是钨，注入的离子是砷离子。

公开(公告)号：US09034467B2

公开(公告)日：2015-05-19

申请号：US13192694

申请日：2011-07-28

申请人： Masamitsu Itoh ,  Katsuya Okumura ,  Taro Inada ,  Jun Watanabe

发明人： Masamitsu Itoh ,  Katsuya Okumura ,  Taro Inada ,  Jun Watanabe

IPC分类号： B32B7/12 ,  B08B7/00 ,  G03F7/20

CPC分类号： B08B7/0028 ,  B05D3/0254 ,  B05D5/00 ,  G03F7/707 ,  G03F7/70925 ,  Y10T428/28 ,  Y10T428/2848

摘要： According to one embodiment, a reticle chuck cleaner for cleaning a reticle chuck of an EUV exposure apparatus includes a substrate having a shape to be carried to the reticle chuck of the EUV exposure apparatus, and an adhesive formed on one of the main surfaces of the substrate.

摘要翻译： 根据一个实施例，用于清洁EUV曝光装置的光罩卡盘的掩模版卡盘清洁器包括具有要携带到EUV曝光装置的掩模版卡盘的形状的基板，以及形成在其中一个主表面上的粘合剂 基质。

公开(公告)号：US20130313429A1

公开(公告)日：2013-11-28

申请号：US13954425

申请日：2013-07-30

申请人： Nobuharu Noji ,  Yoshihiko Naito ,  Hirosi Sobukawa ,  Kenji Terao ,  Masahiro Hatakeyama ,  Katsuya Okumura

发明人： Nobuharu Noji ,  Yoshihiko Naito ,  Hirosi Sobukawa ,  Kenji Terao ,  Masahiro Hatakeyama ,  Katsuya Okumura

IPC分类号： H01J37/26

CPC分类号： H01J37/265 ,  G01R31/307 ,  H01J37/04 ,  H01J2237/2441 ,  H01J2237/2446 ,  H01J2237/2594 ,  H01J2237/2817

摘要： Provided is a method and an apparatus for inspecting a sample surface with high accuracy. Provided is a method for inspecting a sample surface by using an electron beam method sample surface inspection apparatus, in which an electron beam generated by an electron gun of the electron beam method sample surface inspection apparatus is irradiated onto the sample surface, and secondary electrons emanating from the sample surface are formed into an image toward an electron detection plane of a detector for inspecting the sample surface, the method characterized in that a condition for forming the secondary electrons into an image on a detection plane of the detector is controlled such that a potential in the sample surface varies in dependence on an amount of the electron beam irradiated onto the sample surface.

公开(公告)号：US08324726B2

公开(公告)日：2012-12-04

申请号：US11351338

申请日：2006-02-10

申请人： Katsuya Okumura ,  Yoshikazu Takahashi ,  Kazunori Takenouchi

发明人： Katsuya Okumura ,  Yoshikazu Takahashi ,  Kazunori Takenouchi

IPC分类号： H01L23/34

CPC分类号： H01L23/49811 ,  H01L23/49827 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/072 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40139 ,  H01L2224/40225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/351 ,  H05K1/115 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599

摘要： A semiconductor device that improves the heat cycle resistance and power cycle resistance of a power module. An electrode member in which copper posts are formed in a plurality of perforations cut in a support made of a ceramic material is soldered onto a side of an IGBT where an emitter electrode is formed. By soldering the copper posts onto the electrode, heat generated in the IGBT is transferred to the electrode member and is radiated. In addition, even if a material of which the IGBT is made and copper differ in thermal expansivity, stress on a soldered interface is reduced and distortion is reduced. This suppresses the appearance of a crack. As a result, the heat cycle resistance and power cycle resistance of a power module can be improved.

摘要翻译： 一种改善功率模块的热循环电阻和功率循环电阻的半导体器件。 在由陶瓷材料制成的支撑体上切割的多个穿孔中形成铜柱的电极部件被焊接到形成有发射极的IGBT的一侧。 通过将铜柱焊接到电极上，在IGBT中产生的热量转移到电极部件并被辐射。 此外，即使制造IGBT的材料和铜的热膨胀性不同，焊接界面上的应力降低，并且变形减小。 这样可以抑制裂纹的出现。 结果，可以提高功率模块的耐热循环电阻和功率循环电阻。

公开(公告)号：US08283755B2

公开(公告)日：2012-10-09

申请号：US13067180

申请日：2011-05-13

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L29/40

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。

公开(公告)号：US08247289B2

公开(公告)日：2012-08-21

申请号：US11508141

申请日：2006-08-23

申请人： Yoshiki Yamanishi ,  Muneo Harada ,  Takahiro Kitano ,  Tatsuzo Kawaguchi ,  Yoshihiro Hirota ,  Kinji Yamada ,  Tomotaka Shinoda ,  Katsuya Okumura ,  Shuichi Kawano

发明人： Yoshiki Yamanishi ,  Muneo Harada ,  Takahiro Kitano ,  Tatsuzo Kawaguchi ,  Yoshihiro Hirota ,  Kinji Yamada ,  Tomotaka Shinoda ,  Katsuya Okumura ,  Shuichi Kawano

IPC分类号： H01L21/8242 ,  H01L21/20 ,  H01L21/00

CPC分类号： H01L23/50 ,  H01G4/228 ,  H01G4/33 ,  H01L23/481 ,  H01L24/81 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01056 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/002 ,  H05K2201/09509 ,  H05K2201/096 ,  H05K2201/10378

摘要： A capacitor having a high quality and a manufacturing method of the same are provided.A capacitor has a lower electrode formed on an oxide film, a dielectric layer formed on the lower electrode, an upper electrode formed so as to face the lower electrode with the dielectric layer between, and an upper electrode formed so as to cover the upper electrode, an opening portion of the upper electrode and an opening portion of the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to pattern the dielectric layer by using the upper electrode as a mask, and provide a capacitor having a high-quality dielectric layer by preventing impurity diffusion into the dielectric layer. By forming the upper electrode on the dielectric layer, it is possible to prevent the dielectric layer from being exposed to etching liquid, liquid developer, etc.

摘要翻译： 提供了具有高质量的电容器及其制造方法。 电容器具有形成在氧化膜上的下电极，形成在下电极上的电介质层，形成为与电极之间介电层相对的下电极的上电极和形成为覆盖上电极的上电极 ，上电极的开口部分和电介质层的开口部分。 通过在电介质层上形成上电极，可以通过使用上电极作为掩模对电介质层进行图案化，并且通过防止杂质扩散到电介质层中来提供具有高质量电介质层的电容器。 通过在电介质层上形成上部电极，可以防止电介质层暴露于蚀刻液体，液体显影剂等

公开(公告)号：US08174093B2

公开(公告)日：2012-05-08

申请号：US12926104

申请日：2010-10-26

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L29/40

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

公开(公告)号：US20120024318A1

公开(公告)日：2012-02-02

申请号：US13192694

申请日：2011-07-28

申请人： Masamitsu ITOH ,  Katsuya Okumura ,  Taro Inada ,  Jun Watanabe

发明人： Masamitsu ITOH ,  Katsuya Okumura ,  Taro Inada ,  Jun Watanabe

IPC分类号： B08B7/00 ,  B05D5/06 ,  B05D5/12 ,  B05D5/10

CPC分类号： B08B7/0028 ,  B05D3/0254 ,  B05D5/00 ,  G03F7/707 ,  G03F7/70925 ,  Y10T428/28 ,  Y10T428/2848

摘要： According to one embodiment, a reticle chuck cleaner for cleaning a reticle chuck of an EUV exposure apparatus includes a substrate having a shape to be carried to the reticle chuck of the EUV exposure apparatus, and an adhesive formed on one of the main surfaces of the substrate.

摘要翻译： 根据一个实施例，用于清洁EUV曝光装置的光罩卡盘的掩模版卡盘清洁器包括具有要携带到EUV曝光装置的掩模版卡盘的形状的基板，以及形成在其中一个主表面上的粘合剂 基质。

公开(公告)号：US20110215443A1

公开(公告)日：2011-09-08

申请号：US13067180

申请日：2011-05-13

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L29/41

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

公开(公告)号：US20110101522A1

公开(公告)日：2011-05-05

申请号：US12926104

申请日：2010-10-26

申请人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

发明人： Nobuo Hayasaka ,  Katsuya Okumura ,  Keiichi Sasaki ,  Mie Matsuo

IPC分类号： H01L23/485

CPC分类号： H01L23/642 ,  H01L21/76898 ,  H01L23/367 ,  H01L23/481 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/00

摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。