公开(公告)号：US06600234B2

公开(公告)日：2003-07-29

申请号：US09494916

申请日：2000-01-31

申请人： Osamu Kuwabara ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Osamu Kuwabara ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L2328

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L23/3192 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/051 ,  H01L2224/05569 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647

摘要： A semiconductor device includes a semiconductor substrate having bump electrodes and a sealing film formed thereon, the sealing film having laminated layers. The sealing film interposed between adjacent bump electrodes is prepared by laminating a protective film and each layer of the sealing film on the lower surface of the base film, on the bump electrodes, followed by allowing the bump electrodes to project through the sealing film under pressure and heat. The thickness of the sealing film is smaller than the height of the bump electrode, and thus the bump electrode projects through the sealing film. Particles for lowering the thermal expansion coefficient are dispersed in the sealing film to allow the sealing layers to exhibit a thermal expansion coefficient differing in its thickness direction such that the thermal expansion coefficient in the layer which is close to the semiconductor substrate is close to that of the semiconductor substrate.

摘要翻译： 半导体器件包括具有突起电极和形成在其上的密封膜的半导体衬底，该密封膜具有层叠层。 插入相邻的凸块电极之间的密封膜通过在基底膜的下表面上的凸起电极上层叠保护膜和每层密封膜，然后使凸起电极在压力下突出通过密封膜来制备 和热量。 密封膜的厚度小于突起电极的高度，因此突起电极通过密封膜突出。 用于降低热膨胀系数的颗粒分散在密封膜中，使得密封层的厚度方向的热膨胀系数不同，使得靠近半导体基板的层中的热膨胀系数接近于 半导体衬底。

公开(公告)号：USRE41511E1

公开(公告)日：2010-08-17

申请号：US11726763

申请日：2007-03-22

申请人： Yutaka Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

发明人： Yutaka Aoki ,  Ichiro Mihara ,  Takeshi Wakabayashi ,  Katsumi Watanabe

IPC分类号： H01L23/522 ,  H01L23/50

CPC分类号： H01L23/3114 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/525 ,  H01L2924/0002 ,  H01L2924/1423 ,  H01L2924/19041 ,  H01L2924/00

摘要： In a semiconductor device, re-wiring is provided on a circuit element formation region of a semiconductor substrate. A columnar electrode for connection with a circuit board is provided on the rewiring. A first insulating film is provided over the semiconductor substrate excluding a connection pad, and a ground potential layer connected to a ground potential is provided on an upper surface of the first insulating film. A re-wiring is provided over the ground potential layer with a second insulating film interposed. The ground potential layer serves as a barrier layer for preventing crosstalk between the re-wiring and circuit element formation region. A thin-film circuit element is provided on the second insulating film, and a second ground potential layer is provided as a second barrier layer over the thin-film circuit element with an insulating film interposed. Re-wiring is provided over the second ground potential layer.

摘要翻译： 在半导体器件中，在半导体衬底的电路元件形成区域上设置再布线。 在重新布线时提供用于与电路板连接的柱状电极。 第一绝缘膜设置在除了连接焊盘之外的半导体衬底上，并且在第一绝缘膜的上表面上设置连接到接地电位的接地电位层。 在地电位层上提供再布线，其中插入有第二绝缘膜。 地电位层用作防止重新布线和电路元件形成区域之间的串扰的阻挡层。 薄膜电路元件设置在第二绝缘膜上，第二接地电位层设置在薄膜电路元件上，作为第二阻挡层，绝缘膜被插入。 在第二接地电位层上提供重新布线。

公开(公告)号：US07592672B2

公开(公告)日：2009-09-22

申请号：US11729650

申请日：2007-03-29

申请人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

发明人： Takeshi Wakabayashi ,  Ichiro Mihara ,  Osamu Okada

IPC分类号： H01L29/04

CPC分类号： H01L29/78639 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/492 ,  H01L23/50 ,  H01L24/16 ,  H01L24/24 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/16225 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24998 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/82007 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/07811 ,  H01L2924/10156 ,  H01L2924/10158 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/05599

摘要： A circuit substrate of a grounding structure of a semiconductor device according to the invention has a plurality of connection pads and a grounding wiring. The semiconductor device has a semiconductor substrate having one side face and the other side face opposite thereto, an insulating film formed thereon, an SOI integrated circuit provided thereon and including a plurality of connection pads, and electrodes for external connection each of which is connected to the corresponding connection pad. The semiconductor device has the external connection electrodes connected to the respective connection pads of the circuit substrate by a face-down bonding scheme. An under-filling material is provided between the semiconductor device and the circuit substrate, and there is provided a connection member which connects the other side face of the semiconductor device with the grounding wiring of the circuit substrate, and is made of a conductive material.

摘要翻译： 根据本发明的半导体器件的接地结构的电路基板具有多个连接焊盘和接地布线。 半导体器件具有一个半导体衬底，其具有一个侧面，另一个侧面与其相对，形成在其上的绝缘膜，设置在其上的SOI集成电路，并且包括多个连接焊盘，以及用于外部连接的电极， 相应的连接板。 半导体器件具有通过面向下接合方案连接到电路衬底的各个连接焊盘的外部连接电极。 在半导体器件和电路基板之间设置有填充不足的材料，并且设置有将半导体器件的另一个侧面与电路基板的接地布线连接的连接部件，并且由导电材料制成。

公开(公告)号：US07368813B2

公开(公告)日：2008-05-06

申请号：US10986532

申请日：2004-11-10

申请人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/52

CPC分类号： H01L24/27 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.

摘要翻译： 第一半导体元件安装在基板上，其周边处于密封状态，被绝缘构件覆盖，其上表面被上绝缘膜覆盖。 通过导体将形成在上绝缘膜上的上布线层和通过下绝缘膜形成在基板下方的下布线层连接。 第二半导体元件被暴露安装，连接到下布线层。

公开(公告)号：US20070123022A1

公开(公告)日：2007-05-31

申请号：US11604028

申请日：2006-11-22

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L21/44

CPC分类号： H05K3/3478 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2203/041 ,  H05K2203/124 ,  H01L2224/13099 ,  H01L2924/00014

摘要： There is prepared a semiconductor construction in which a plurality of columnar electrodes are provided on an upper side of a semiconductor substrate and in which a sealing film is provided on the semiconductor substrate to cover outer peripheral surfaces of the columnar electrodes. Upper sides of the columnar electrodes are removed to form openings in the sealing film on the supper sides of the columnar electrodes. Adhesive coatings are formed on upper surfaces of the columnar electrodes in the openings of the sealing film, Solder balls are provided on upper surfaces of the adhesive coatings. Finally, the solder balls are deformed by a heat treatment to form solder bumps in and above the openings of the sealing film so that the solder bumps are connected to the upper surfaces of the columnar electrodes. Thus, a semiconductor device is manufactured.

摘要翻译： 制备半导体结构，其中多个柱状电极设置在半导体衬底的上侧，并且其中密封膜设置在半导体衬底上以覆盖柱状电极的外周表面。 柱状电极的上侧被去除，以在柱状电极的旁边的密封膜中形成开口。 粘合剂涂层形成在密封膜的开口中的柱状电极的上表面上，焊球设置在粘合剂涂层的上表面上。 最后，通过热处理使焊球变形，以在密封膜的开口内和上方形成焊料凸块，使得焊料凸块连接到柱状电极的上表面。 因此，制造半导体器件。

公开(公告)号：US20060125082A1

公开(公告)日：2006-06-15

申请号：US11302592

申请日：2005-12-12

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L21/50 ,  H01L23/04

CPC分类号： H01L23/5389 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/19 ,  H01L25/105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01074 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19043 ,  H01L2924/00014

摘要： A semiconductor device includes a base plate made of a material including at least a thermosetting resin, and having an opening, a vertical conductor filled and provided in the opening of the base plate, at least one semiconductor construct having a semiconductor substrate and a plurality of external connection electrodes provided on one side of the semiconductor substrate, and an insulating layer secured to and provided on a periphery of the semiconductor construct. The insulating layer is secured to the base plate, and the external connection electrodes of the semiconductor construct are bonded to the vertical conductor.

摘要翻译： 半导体器件包括由至少包含热固性树脂的材料制成的基板，并且具有开口，填充并设置在基板的开口中的垂直导体，至少一个具有半导体基板和多个半导体基板的半导体构造 设置在半导体衬底的一侧上的外部连接电极以及固定到半导体结构的周边并设置在该半导体构造的周围的绝缘层。 绝缘层固定在基板上，半导体结构的外部连接电极与垂直导体结合。

公开(公告)号：US20110291212A1

公开(公告)日：2011-12-01

申请号：US13115348

申请日：2011-05-25

申请人： Ichiro Mihara ,  Takeshi Wakabayashi

发明人： Ichiro Mihara ,  Takeshi Wakabayashi

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14683 ,  H01L27/14618 ,  H01L27/14687 ,  H01L2224/13

摘要： A photosensor comprises a photoelectric conversion device region and a connection pad on the lower surface of a semiconductor substrate, and also comprises a wiring line connected to the connection pad via insulating film under the semiconductor substrate, and a columnar electrode as an external connection electrode connected to the wiring line. As a result, as compared with the case where the photoelectric conversion device region and the connection pad connected to the photoelectric conversion device region are formed on the upper surface of the semiconductor substrate, a piercing electrode for connecting the connection pad and the wiring line does not have to be formed in the semiconductor substrate. Thus, the number of steps can be smaller, and a fabrication process can be less restricted.

摘要翻译： 光电传感器包括在半导体衬底的下表面上的光电转换器件区域和连接焊盘，并且还包括通过半导体衬底下的绝缘膜连接到连接焊盘的布线和连接到外部连接电极的柱状电极 到接线。 结果，与在半导体衬底的上表面上形成光电转换元件区域和与光电转换元件区域连接的连接焊盘的情况相比，用于连接连接焊盘和布线的穿孔电极 不必在半导体衬底中形成。 因此，步数可以更小，并且制造过程可以较少受限制。

公开(公告)号：US08067274B2

公开(公告)日：2011-11-29

申请号：US12506503

申请日：2009-07-21

申请人： Ichiro Mihara ,  Takeshi Wakabayashi

发明人： Ichiro Mihara ,  Takeshi Wakabayashi

IPC分类号： H01L21/00

CPC分类号： H01L23/3128 ,  H01L21/4846 ,  H01L21/561 ,  H01L23/142 ,  H01L23/5389 ,  H01L24/05 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/73204 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2224/83

摘要： In this manufacturing method of a semiconductor device, a metal plate having a plurality of projection electrodes in each of a plurality of semiconductor device formation areas is prepared. Next, the projection electrodes of each of the semiconductor formation areas are aligned corresponding to external connection electrodes of each semiconductor construction, and each semiconductor construction is separately arranged on the projection electrodes in the semiconductor device formation areas. Next, an insulating layer formation sheet is arranged on the metal plate, and the metal plate and the insulating layer formation sheet are joined by heat pressing. Then, the metal plate is patterned and a plurality of upper layer wirings that connect to the projection electrodes is formed.

摘要翻译： 在这种半导体装置的制造方法中，准备在多个半导体装置形成区域中具有多个突起电极的金属板。 接下来，每个半导体形成区域的突起电极对应于每个半导体结构的外部连接电极对准，并且每个半导体构造分别布置在半导体器件形成区域中的突出电极上。 接着，在金属板上配置绝缘层形成片，通过热压接合金属板和绝缘层形成片。 然后，对金属板进行构图，形成与突起电极连接的多个上层布线。

公开(公告)号：US07719116B2

公开(公告)日：2010-05-18

申请号：US11443858

申请日：2006-05-31

申请人： Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L23/5286 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05569 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device includes a semiconductor substrate having an integrated circuit, a first insulating film formed on the semiconductor substrate, at least one power source internal wiring line formed on the first insulating film, and a second insulating film formed on the first insulating film and on the internal wiring line and having a plurality of openings exposing parts of the internal wiring line. At least one wiring line is formed on an upper side of the second insulating film to correspond to the internal wiring line and electrically connected to the internal wiring line via the plurality of openings of the second insulating film. The wiring line has at least one external electrode pad portion whose number is smaller than the number of openings in the second insulating film.

摘要翻译： 半导体器件包括具有集成电路的半导体衬底，形成在半导体衬底上的第一绝缘膜，形成在第一绝缘膜上的至少一个电源内部布线和形成在第一绝缘膜上的第二绝缘膜， 内部布线并且具有暴露内部布线的部分的多个开口。 至少一条布线形成在第二绝缘膜的上侧，以对应于内部布线，并且经由第二绝缘膜的多个开口与内部布线相电连接。 布线具有数量小于第二绝缘膜中的开口数量的至少一个外部电极焊盘部分。

公开(公告)号：US07563640B2

公开(公告)日：2009-07-21

申请号：US11853683

申请日：2007-09-11

申请人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

发明人： Shinji Wakisaka ,  Hiroyasu Jobetto ,  Takeshi Wakabayashi ,  Ichiro Mihara

IPC分类号： H01L21/44

CPC分类号： H01L24/27 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/20 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/07025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A first semiconductor element is mounted on a base plate, and is in a sealed state by the periphery thereof being covered by an insulation member, and the upper surface thereof being covered by an upper insulation film. An upper wiring layer formed on the upper insulation film, and the lower wiring layer formed below the base plate via lower insulation films are connected by conductors. A second semiconductor element is mounted exposed, being connected to the lower wiring layer.

摘要翻译： 第一半导体元件安装在基板上，其周边处于密封状态，被绝缘构件覆盖，其上表面被上绝缘膜覆盖。 通过导体将形成在上绝缘膜上的上布线层和通过下绝缘膜形成在基板下方的下布线层连接。 第二半导体元件被暴露安装，连接到下布线层。