公开(公告)号：US07019402B2

公开(公告)日：2006-03-28

申请号：US10686640

申请日：2003-10-17

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Russell Alan Budd ,  Thomas Anthony Wassick

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Russell Alan Budd ,  Thomas Anthony Wassick

IPC分类号： H01L23/48

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

摘要： This disclosure teaches a method of filling deep vias or capping deep conducting paste filled vias in silicon or glass substrate using laser assisted chemical vapor deposition of metals. This method uses a continuous wave or pulsed laser to heat the via bottom and the growing metal fill selectively by selecting the laser wavelength such that silicon and/or glass do not absorb the energy of the laser in any appreciable manner to cause deposition in the field. Alternatively holographic mask or an array of micro lenses may be used to focus the laser beams to the vias to fill them with metal. The substrate is moved in a controlled manner in the z-direction away from the laser at about the rate of deposition thus causing the laser heating to be focused on the surface region of the growing metal fill.

摘要翻译： 该公开内容教导了使用金属的激光辅助化学气相沉积在硅或玻璃基板中填充深通孔或者封装深导电糊填充通孔的方法。 该方法使用连续波或脉冲激光器通过选择激光波长来选择性地加热通孔底部和生长金属填充物，使得硅和/或玻璃不以任何可察觉的方式吸收激光的能量以在场中沉积 。 或者，可以使用全息掩模或微透镜阵列来将激光束聚焦到通孔以用金属填充它们。 以大约的沉积速率，以z方向以受控方式远离激光器移动衬底，从而使激光加热聚焦在生长金属填充物的表面区域上。

公开(公告)号：US08187923B2

公开(公告)日：2012-05-29

申请号：US12167745

申请日：2008-07-03

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Matthew J. Farinelli ,  Sherif A. Goma ,  Raymond R. Horton ,  Edmund J. Sprogis

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L21/67092 ,  H01L21/67132 ,  H01L21/6835 ,  H01L21/6836 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/68354 ,  H01L2224/11003 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  Y10S414/139 ,  H01L2924/00 ,  H01L2224/0401

摘要： A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.

摘要翻译： 提供了用于避免载波边缘破裂的集成电路模块的激光释放和玻璃切屑去除工艺。

公开(公告)号：US07615405B2

公开(公告)日：2009-11-10

申请号：US11872331

申请日：2007-10-15

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

CPC分类号： H01L24/81 ,  H01L23/544 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/20109 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

摘要翻译： 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。

公开(公告)号：US20080182362A1

公开(公告)日：2008-07-31

申请号：US11872331

申请日：2007-10-15

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

IPC分类号： H01L21/00

CPC分类号： H01L24/81 ,  H01L23/544 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/20109 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

摘要翻译： 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。

公开(公告)号：US07276787B2

公开(公告)日：2007-10-02

申请号：US10729254

申请日：2003-12-05

申请人： Daniel Charles Edelstein ,  Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Jon Alfred Casey ,  Sherif A. Goma ,  Raymond R. Horton ,  Gareth Geoffrey Hougham ,  Michael Wayne Lane ,  Xiao Hu Liu ,  Chirag Suryakant Patel ,  Edmund Juris Sprogis ,  Michelle Leigh Steen ,  Brian Richard Sundlof ,  Cornelia K. Tsang ,  George Frederick Walker

发明人： Daniel Charles Edelstein ,  Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Jon Alfred Casey ,  Sherif A. Goma ,  Raymond R. Horton ,  Gareth Geoffrey Hougham ,  Michael Wayne Lane ,  Xiao Hu Liu ,  Chirag Suryakant Patel ,  Edmund Juris Sprogis ,  Michelle Leigh Steen ,  Brian Richard Sundlof ,  Cornelia K. Tsang ,  George Frederick Walker

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L21/4763 ,  H01L29/40 ,  H01L23/52

CPC分类号： H01L23/49883 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

摘要： A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches that of the substrate. The conductive structure may include concentric via fill areas having differing materials disposed concentrically therein, a core of the substrate material surrounded by an annular ring of conductive material, a core of CTE-matched non-conductive material surrounded by an annular ring of conductive material, a conductive via having an inner void with low CTE, or a full fill of a conductive composite material such as a metal-ceramic paste which has been sintered or fused.

摘要翻译： 一种载体结构和方法，用于制造具有通孔的载流子结构，每个导通孔具有导电结构，其有效热膨胀系数小于或接近于基板的热膨胀系数，并且具有小于或等于 或者与衬底的密切匹配。 导电结构可以包括同心的通孔填充区域，其具有同心设置的不同材料，由导电材料的环形环包围的衬底材料的芯，由导电材料的环形环包围的CTE匹配的非导电材料的芯， 具有低CTE的内部空隙的导电通孔，或已经烧结或熔合的诸如金属 - 陶瓷浆料的导电复合材料的完整填充物。

公开(公告)号：US07282391B1

公开(公告)日：2007-10-16

申请号：US11385121

申请日：2006-03-21

申请人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

发明人： Paul Stephen Andry ,  Leena Paivikki Buchwalter ,  Raymond R. Horton ,  John Ulrich Knickerbocker ,  Cornelia K. Tsang ,  Steven Lorenz Wright

IPC分类号： H01L21/00 ,  H01L23/48

CPC分类号： H01L24/81 ,  H01L23/544 ,  H01L24/48 ,  H01L24/97 ,  H01L25/50 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/81001 ,  H01L2224/81054 ,  H01L2224/81136 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/20109 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic dive and method of fabricating an electronic device. The method including placing a placement guide over a top surface of a module substrate, the placement guide having a guide opening, the guide opening extending from a top surface of the placement guide to a bottom surface of the placement guide; aligning the placement guide to an integrated circuit chip position on the module substrate; fixing the placement guide to the module substrate; placing an integrated circuit chip in the guide opening, sidewalls of the placement guide opening constraining electrically conductive bonding structures on bottom surface of the integrated circuit chip to self-align to an electrically conductive module substrate contact pad on the top surface of the module substrate in the integrated circuit chip position; and bonding the bonding structures to the module substrate contact pads, the bonding structures and the module substrate contact pads in direct physical and electrical contact after the bonding.

摘要翻译： 一种电子潜水及其制造方法。 所述方法包括将放置引导件放置在模块基板的顶表面上，所述放置引导件具有引导开口，所述引导开口从所述放置引导件的顶表面延伸到所述放置引导件的底表面; 将所述放置引导件对准所述模块基板上的集成电路芯片位置; 将所述放置引导件固定到所述模块基板; 将集成电路芯片放置在引导开口中，放置引导开口的侧壁约束集成电路芯片的底表面上的导电接合结构，以与模块基板的顶表面上的导电模块衬底接触焊盘自对准 集成电路芯片位置; 以及在接合之后将结合结构粘合到模块衬底接触焊盘，接合结构和模块衬底接触焊盘，直接物理和电接触。

公开(公告)号：US08637937B2

公开(公告)日：2014-01-28

申请号：US13364804

申请日：2012-02-02

申请人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Cornelia Kang-I Tsang

发明人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Cornelia Kang-I Tsang

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/19 ,  H01L21/76898 ,  H01L21/823871 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closest to the substrate contacting a top surface of the conductive core.

摘要翻译： 一种硅通孔结构和一种制造通硅通孔的方法。 该方法包括：（a）在硅衬底中形成沟槽，沟槽通向衬底的顶表面; （b）在所述沟槽的侧壁上形成二氧化硅层，所述二氧化硅层不填充所述沟槽; （c）用多晶硅填充沟槽中的剩余空间; （c）之后，（d）在衬底中制造至少一部分CMOS器件; （e）从所述沟槽去除所述多晶硅，所述电介质层残留在所述沟槽的侧壁上; （f）用导电芯重新填充沟槽; 在（f）之后，（g）在衬底的顶表面上形成一个或多个布线层，与接触导电芯的顶表面的最接近衬底的一个或多个布线层的布线层的布线。

公开(公告)号：US20120301977A1

公开(公告)日：2012-11-29

申请号：US13569872

申请日：2012-08-08

申请人： Paul Stephen Andry ,  Harm Peter Hofstee ,  George A. Katopis ,  John Ulrich Knickerbocker ,  Robert K. Montoye ,  Chirag S. Patel

发明人： Paul Stephen Andry ,  Harm Peter Hofstee ,  George A. Katopis ,  John Ulrich Knickerbocker ,  Robert K. Montoye ,  Chirag S. Patel

IPC分类号： H01L21/66 ,  G06F17/50

CPC分类号： H01L25/0655 ,  H01L23/147 ,  H01L23/60 ,  H01L25/0652 ,  H01L2224/16225 ,  H01L2924/10253 ,  H01L2924/157 ,  H01L2924/00

摘要： A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input/output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate.

摘要翻译： 一种用于电子封装的硅载体结构包括基底，设置在基底基板上的硅载体衬底，设置在硅载体衬底上的存储芯片，设置在硅载体衬底上的微处理器芯片，设置在硅衬底上的输入/输出芯片 硅载体衬底和设置在硅载体衬底上的时钟芯片。

公开(公告)号：US07741722B2

公开(公告)日：2010-06-22

申请号：US11690181

申请日：2007-03-23

申请人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Kenneth Jay Stein ,  Timothy Dooling Sullivan ,  Cornelia Kang-I Tsang ,  Ping-Chuan Wang ,  Bucknell C. Webb

发明人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Kenneth Jay Stein ,  Timothy Dooling Sullivan ,  Cornelia Kang-I Tsang ,  Ping-Chuan Wang ,  Bucknell C. Webb

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.

摘要翻译： 一种晶片通孔结构及其形成方法。 贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。 顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。 贯通晶片通孔结构还包括在开口中的通晶片通孔。 贯通晶片通孔具有矩形板的形状。 贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。 贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。 第一，第二和第三参考方向彼此垂直。

公开(公告)号：US20100032764A1

公开(公告)日：2010-02-11

申请号：US12188228

申请日：2008-08-08

申请人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Cornelia Kang-I Tsang

发明人： Paul Stephen Andry ,  Edmund Juris Sprogis ,  Cornelia Kang-I Tsang

IPC分类号： H01L27/08 ,  H01L21/76

CPC分类号： H01L24/19 ,  H01L21/76898 ,  H01L21/823871 ,  H01L23/481 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closet to the substrate contacting a top surface of the conductive core.

摘要翻译： 一种硅通孔结构和一种制造通硅通孔的方法。 该方法包括：（a）在硅衬底中形成沟槽，沟槽通向衬底的顶表面; （b）在所述沟槽的侧壁上形成二氧化硅层，所述二氧化硅层不填充所述沟槽; （c）用多晶硅填充沟槽中的剩余空间; （c）之后，（d）在衬底中制造至少一部分CMOS器件; （e）从所述沟槽去除所述多晶硅，所述电介质层残留在所述沟槽的侧壁上; （f）用导电芯重新填充沟槽; 在（f）之后，（g）在衬底的顶表面上形成一个或多个布线层，所述一个或多个布线层的布线层的布线层接触到所述导电芯的顶表面。