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公开(公告)号：US5418690A
公开(公告)日：1995-05-23
申请号：US309554
申请日：1994-09-20
CPC分类号： H05K1/0265 , H05K3/4641 , H05K1/0262 , H05K1/0289 , H05K2201/0191 , H05K2201/0352 , H05K2201/09327 , H05K2201/09336
摘要： Multiple circuit functions embodied in electrical circuit lines and areas are supported by a multilayered printed circuit board of various lengths and widths (defining "x" and "y" directions) and of various thicknesses (defining a "z" direction) all on a single board. Several ways of achieving such variations in thickness include providing two layer subassemblies arranged in an alternate and intermediate manner, one subassembly being adapted to support electrical circuit lines and areas, and the other subassembly being formed of thin film dielectric material of various precalculated thicknesses. Another way of achieving a variation in thickness is to limit the surface covered by circuit lines with a pre-calculated core thickness.
摘要翻译： 在电路线路和区域中实现的多电路功能由各种长度和宽度（定义“x”和“y”方向）和各种厚度（限定“z”方向）的多层印刷电路板支持， 板。 实现这种厚度变化的几种方式包括提供以交替和中间方式布置的两层子组件，一个子组件适于支撑电路线和区域，而另一子组件由各种预先计算厚度的薄膜电介质材料形成。 实现厚度变化的另一种方法是以预先计算的芯厚限制电路线覆盖的表面。
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公开(公告)号：US5539156A
公开(公告)日：1996-07-23
申请号：US340508
申请日：1994-11-16
CPC分类号： H05K3/0002 , H05K1/116 , H05K2201/09381 , H05K2201/09463 , H05K2203/056 , Y10T29/49165
摘要： The present invention increases real estate by providing non-annular lands which do not completely encircle the through holes. The non-annular lands are non-annular, that is they do not extend 360.degree. around the through hole. Preferably the non-annular lands contact no more than one side of the through holes thereby providing real estate not otherwise available using conventional lands. The present invention also relates to a method for producing such Non-annular lands.
摘要翻译： 本发明通过提供不完全环绕通孔的非环形平台来增加房地产。 非环形区域是非环形的，也就是说它们不会围绕通孔延伸360度。 优选地，非环形焊盘与通孔的不超过一侧接触，从而提供使用常规焊盘不可获得的不动产。 本发明还涉及一种用于生产这种非环形焊盘的方法。
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公开(公告)号：US06998290B2
公开(公告)日：2006-02-14
申请号：US10715736
申请日：2003-11-18
IPC分类号： H01L21/44
CPC分类号： H05K3/4069 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K1/113 , H05K3/061 , H05K3/062 , H05K3/247 , H05K3/3484 , H05K3/4038 , H05K3/4602 , H05K3/4652 , H05K2201/0305 , H05K2201/035 , H01L2224/0401
摘要： A method for forming a flip-chip joinable substrate having non-plated-on contact pads. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.
摘要翻译： 一种用于形成具有非电镀接触焊盘的倒装芯片可连接衬底的方法。 衬底在具有内部接触面积的图案化内部金属层上的介电层上具有外部金属箔层。 选择内部接触区域上方的外部金属箔层的区域。 延伸到内部接触区域的微孔腔在所选择的区域内中心穿孔，并且填充有形成外部接触焊盘的导电浆料块。 外部接触焊盘用作蚀刻掩模以去除相邻的外部金属箔。
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4.发明授权Methods of forming electronic multi-layer printed circuit boards and/or cards and electronic packages including said boards or cards 失效形成电子多层印刷电路板和/或包括所述板或卡的电子封装的方法
公开(公告)号：US5473813A
公开(公告)日：1995-12-12
申请号：US303711
申请日：1994-09-09
申请人： Ivan I. Chobot , John A. Covert , Randy L. Haight , Keith D. Mansfield , Donald W. Miller , Reinaldo A. Neira , Alexander Petrovich , Paul C. Sviedrys , Louise A. Tiemann , Gerald A. Valenta , Thurston B. Youngs, Jr.
发明人： Ivan I. Chobot , John A. Covert , Randy L. Haight , Keith D. Mansfield , Donald W. Miller , Reinaldo A. Neira , Alexander Petrovich , Paul C. Sviedrys , Louise A. Tiemann , Gerald A. Valenta , Thurston B. Youngs, Jr.
CPC分类号： H05K1/0201 , H05K1/116 , H05K3/3447 , H05K2201/062 , H05K2201/09309 , H05K2201/09454 , H05K2201/0969 , H05K3/429 , Y10T29/49126 , Y10T29/49139 , Y10T29/49165
摘要： A method of forming a multi-layer circuit board or card. The method includes the step of forming a plurality of conductive planes. The conductive planes include ground, signal, or power planes. At least one through hole is formed through at least one of the conductive planes. An electrically conductive material is deposited onto an inside surface of the at least one through hole to form a plated through hole. At least one thermal relief passage is formed at least in the at least one of the conductive planes for preventing the diffusion of heat throughout the circuit board or card during the securing or removal or chips or other components to the circuit board or card by heating the material deposited in the at least one through hole to a temperature above its melting point. The at least one thermal relief passage is located in the vicinity of the at least one through hole and is free from electrical connection therewith. An electrically insulating material is deposited on at least one side of each of the conductive planes. The planes are placed on top of each other such that a layer of electrically insulating material is located between each of the conductive planes. The conductive planes are joined together to form the multi-layer circuit board or card.
摘要翻译： 一种形成多层电路板或卡的方法。 该方法包括形成多个导电平面的步骤。 导电平面包括地面，信号或电力平面。 通过至少一个导电平面形成至少一个通孔。 将导电材料沉积在所述至少一个通孔的内表面上以形成电镀通孔。 至少一个热释放通道至少形成在所述至少一个导电平面中，用于防止在通过加热所述电路板或卡将固定或移除或切屑或其它部件中的热量扩散到整个电路板或卡 沉积在至少一个通孔中的材料到高于其熔点的温度。 所述至少一个热释放通道位于所述至少一个通孔的附近，并且与所述至少一个通孔没有电连接。 电绝缘材料沉积在每个导电平面的至少一侧上。 平面被放置在彼此的顶部，使得电绝缘材料层位于每个导电平面之间。 导电平面连接在一起以形成多层电路板或卡。
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公开(公告)号：US5889654A
公开(公告)日：1999-03-30
申请号：US826963
申请日：1997-04-09
IPC分类号： B42D15/10 , H01L23/538 , H01L25/065 , H01L25/07 , H01L25/18 , H05K5/02 , H05K7/20
CPC分类号： H05K5/0269 , H01L23/5388 , H05K7/20445 , H01L2224/48472 , H01L24/48 , H01L2924/00014 , H01L2924/12042 , H01L2924/14
摘要： Integrated circuit chips (18, 42, or 56) are packaged within openings formed in a substrate such as PCMCIA Card (20, 40, or 54), thus allowing compliance with overall width dimension requirements for standardized electronic components. The arrangement has the advantages that thermal coefficient of expansion of the chips and cards match, and that a sturdy, multilayer ceramic substrate is used for electrical connection to electronic devices such as laptops, palmtops, and the like. In addition, a second integrated circuit chip (68) can be connected directly to the embedded chip (56), thereby allowing two chips to be accommodated in a card (54) at the same location and allowing chip-to-chip electrical communication. A variety of electrical bonding methods joining the embedded chip to the card can be employed. In addition, a variety of thermal conduction arrangements can be used for cooling the embedded integrated circuit chip.
摘要翻译： 集成电路芯片（18,42或56）封装在诸如PCMCIA卡（20,40或54）的基板中形成的开口内，从而允许符合标准化电子元件的整体宽度尺寸要求。 该布置具有芯片和卡的热膨胀系数匹配的优点，并且使用坚固的多层陶瓷基板来电连接到诸如笔记本电脑，掌上电脑等的电子设备。 此外，第二集成电路芯片（68）可以直接连接到嵌入式芯片（56），从而允许两个芯片被容纳在相同位置的卡（54）中，并允许芯片间的电气通信。 可以采用将嵌入式芯片连接到卡的各种电接合方法。 此外，可以使用各种热传导布置来冷却嵌入式集成电路芯片。
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公开(公告)号：US06753612B2
公开(公告)日：2004-06-22
申请号：US09827014
申请日：2001-04-05
IPC分类号： H01L2940
CPC分类号： H05K3/4069 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K1/113 , H05K3/061 , H05K3/062 , H05K3/247 , H05K3/3484 , H05K3/4038 , H05K3/4602 , H05K3/4652 , H05K2201/0305 , H05K2201/035 , H01L2224/0401
摘要： A flip-chip joinable substrate having non-plated-on contact pads. The substrate has an external metal foil layer upon a dielectric layer upon a patterned internal metal layer having an internal contact area. An area of the external metal foil layer above the internal contact area is selected. A microvia cavity extending to the internal contact area is perforated centrally within the selected area and is filled with a mass of conductive paste forming an external contact pad. The external contact pad is used as an etch mask for removing the adjacent external metal foil.
摘要翻译： 具有非电镀接触焊盘的倒装芯片可连接衬底。 衬底在具有内部接触面积的图案化内部金属层上的介电层上具有外部金属箔层。 选择内部接触区域上方的外部金属箔层的区域。 延伸到内部接触区域的微孔腔在所选择的区域内中心穿孔，并且填充有形成外部接触焊盘的导电浆料块。 外部接触焊盘用作蚀刻掩模以去除相邻的外部金属箔。
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公开(公告)号：US5363280A
公开(公告)日：1994-11-08
申请号：US50589
申请日：1993-04-22
申请人： Ivan I. Chobot , John A. Covert , Randy L. Haight , Keith D. Mansfield , Donald W. Miller , Reinaldo A. Neira , Alexander Petrovich , Paul C. Sviedrys , Louise A. Tiemann , Gerald A. Valenta , Thurston B. Youngs, Jr.
发明人： Ivan I. Chobot , John A. Covert , Randy L. Haight , Keith D. Mansfield , Donald W. Miller , Reinaldo A. Neira , Alexander Petrovich , Paul C. Sviedrys , Louise A. Tiemann , Gerald A. Valenta , Thurston B. Youngs, Jr.
CPC分类号： H05K1/0201 , H05K1/116 , H05K3/3447 , H05K2201/062 , H05K2201/09309 , H05K2201/09454 , H05K2201/0969 , H05K3/429 , Y10T29/49126 , Y10T29/49139 , Y10T29/49165
摘要： A multi-layer printed circuit board or card including at least one passage in at least one of the layers of the circuit board or card for preventing the diffusion of heat throughout the circuit board or card during the securing or removal of components in plated through holes in the circuit board or card by the heating of the plating material to a temperature above a melting point of the plating material.
摘要翻译： 一种多层印刷电路板或卡，其包括在电路板或卡的至少一层中的至少一个通道，用于在固定或移除电镀通孔中的部件时防止热量扩散到整个电路板或卡 在电路板或卡中通过将电镀材料加热至高于电镀材料熔点的温度。
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