公开(公告)号：US20110155438A1

公开(公告)日：2011-06-30

申请号：US12978750

申请日：2010-12-27

申请人： Tatsuya ITO ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Shinnosuke MAEDA ,  Atsuhiko SUGIMOTO ,  Satoshi HIRANO

发明人： Tatsuya ITO ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Shinnosuke MAEDA ,  Atsuhiko SUGIMOTO ,  Satoshi HIRANO

IPC分类号： H05K1/11

CPC分类号： H05K3/4682 ,  H05K1/113 ,  H05K3/4007 ,  H05K2201/094 ,  H05K2201/09427 ,  H05K2201/09472

摘要： A multilayer wiring substrate has a multilayer wiring laminate portion in which a plurality of resin insulation layers made primarily of the same resin insulation material, and a plurality of conductive layers are laminated alternately. A plurality of first-main-surface-side connection terminals are disposed on one side of the laminate structure where a first main surface thereof is present, and a plurality of second-main-surface-side connection terminals being disposed on an other side of the laminate structure where a second main surface thereof is present. The plurality of conductive layers are formed in the plurality of resin insulation layers and interconnected by means of via conductors whose diameters increase toward the first main surface or the second main surface. The plurality of first-main-surface-side connection terminals comprising at least two types of terminals for connection of different articles-to-be-connected. Top surfaces of the plurality of first-main-surface-side connection terminals differ in height according to types of the articles-to-be-connected.

摘要翻译： 多层布线基板具有多层布线层叠部，其中主要由相同树脂绝缘材料制成的多个树脂绝缘层和多个导电层交替层叠。 多个第一主表面侧连接端子设置在层叠结构的存在第一主表面的一侧上，并且多个第二主表面侧连接端子设置在 其中存在第二主表面的层压结构。 多个导电层形成在多个树脂绝缘层中，并且通过直径朝向第一主表面或第二主表面增大的通孔导体互连。 多个第一主表面侧连接端子包括用于连接不同待连接物品的至少两种类型的端子。 多个第一主表面侧连接端子的顶表面根据要连接的物品的类型而不同。

公开(公告)号：US20110156272A1

公开(公告)日：2011-06-30

申请号：US12976427

申请日：2010-12-22

申请人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Atsuhiko SUGIMOTO ,  Tatsuya ITO ,  Takuya HANDO ,  Satoshi HIRANO

发明人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Atsuhiko SUGIMOTO ,  Tatsuya ITO ,  Takuya HANDO ,  Satoshi HIRANO

IPC分类号： H01L23/48

CPC分类号： H05K3/3452 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/205 ,  H05K3/383 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/09527 ,  H05K2201/099 ,  H05K2203/0346 ,  H05K2203/0369 ,  H01L2924/00

摘要： A multilayered wiring substrate, comprising: a plurality of first main surface side connecting terminals arranged in a first main surface of a stack structure; and a plurality of second main surface side connecting terminals being arranged in a second main surface of the stack structure; wherein a plurality of conductor layers are alternately formed in a plurality of stacked resin insulation layers and are operably connected to each other through via conductors tapered such that diameters thereof are widened toward the first or the second main surface, wherein a plurality of openings are formed in an exposed outermost resin insulation layer in the second main surface, and terminal outer surfaces of the second main surface side connecting terminals arranged to match with the plurality of the openings are positioned inwardly from an outer main surface of the exposed outermost resin insulation layer, and edges of terminal inner surfaces are rounded.

摘要翻译： 一种多层布线基板，包括：布置在堆叠结构的第一主表面中的多个第一主表面侧连接端子; 并且多个第二主表面侧连接端子布置在所述堆叠结构的第二主表面中; 其中多个导体层交替地形成在多个堆叠的树脂绝缘层中，并且通过锥形的通孔导体可操作地连接，使得其直径朝向第一或第二主表面加宽，其中形成多个开口 在第二主表面中暴露的最外层树脂绝缘层中，并且布置成与多个开口相匹配的第二主表面侧连接端子的端子外表面从暴露的最外层树脂绝缘层的外主表面位于内侧， 并且端子内表面的边缘是圆形的。

公开(公告)号：US20110155443A1

公开(公告)日：2011-06-30

申请号：US12979474

申请日：2010-12-28

申请人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Tatsuya ITO ,  Satoshi HIRANO ,  Atsuhiko SUGIMOTO

发明人： Shinnosuke MAEDA ,  Tetsuo SUZUKI ,  Takuya HANDO ,  Tatsuya ITO ,  Satoshi HIRANO ,  Atsuhiko SUGIMOTO

IPC分类号： H05K1/11 ,  H05K3/10

CPC分类号： H05K1/0298 ,  H01L21/4846 ,  H01L23/49822 ,  H01L2224/16225 ,  H05K1/09 ,  H05K1/111 ,  H05K1/113 ,  H05K3/0055 ,  H05K3/3452 ,  H05K3/4682 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2201/0989 ,  H05K2201/099

摘要： In a build-up step, a plurality of resin insulation layers and a plurality of conductive layers are alternately laminated in multilayer arrangement on a metal foil separably laminated on a side of a base material, thereby forming a wiring laminate portion. In a drilling step, a plurality of openings are formed in an outermost resin insulation layer through laser drilling so as to expose connection terminals. Subsequently, in a desmear step, smears from inside the openings are removed. In a base-material removing step performed after the build-up step, the base material is removed and the metal foil is exposed.

摘要翻译： 在堆积步骤中，将多个树脂绝缘层和多个导电层以多层布置交替层叠在可分离地层叠在基材侧上的金属箔上，从而形成布线层压体部分。 在钻井工序中，通过激光钻孔在最外层的树脂绝缘层上形成多个开口，露出连接端子。 随后，在去污步骤中，去除开口内部的污迹。 在堆积步骤之后执行的基材除去步骤中，除去基材并暴露金属箔。

公开(公告)号：US20120186863A1

公开(公告)日：2012-07-26

申请号：US13355916

申请日：2012-01-23

申请人： Masahiro INOUE ,  Hajime SAIKI ,  Atsuhiko SUGIMOTO ,  Takuya HANDO ,  Hidetoshi WADA

发明人： Masahiro INOUE ,  Hajime SAIKI ,  Atsuhiko SUGIMOTO ,  Takuya HANDO ,  Hidetoshi WADA

IPC分类号： H05K1/02

CPC分类号： H05K1/111 ,  H01L23/12 ,  H01L23/32 ,  H01L24/00 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81815 ,  H05K1/113 ,  H05K3/0097 ,  H05K3/244 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/09745 ,  Y02P70/611

摘要： A multilayer wiring board including a build-up layer comprising a conductor layer and a resin insulation layer that are alternately layered, conductive pads formed on a surface of a resin insulation layer so as to project from the surface, and a solder layer formed over an upper surface of each of the conductive pads is provided. The upper surface of the conductive pads may have a recess, and the entire surface of the solder layer may be situated at an elevated position with respect to an outer periphery portion of the upper surface. Embodiments make it possible to feed and hold a sufficient amount of solder paste on the upper surface of conductive pads, thereby minimizing or eliminating the occurrence of defective connections to a semiconductor element and damage to the solder layer caused by an insufficient thickness of the solder layer.

摘要翻译： 一种多层布线基板，包括：交替层叠导体层和树脂绝缘层的堆积层，形成在表面突出的树脂绝缘层的表面的导电性焊盘，以及形成在 提供每个导电焊盘的上表面。 导电焊盘的上表面可以具有凹部，并且焊料层的整个表面可以相对于上表面的外周部分位于升高位置。 实施例使得可以在导电焊盘的上表面上馈送和保持足够量的焊膏，从而最小化或消除与半导体元件的不良连接的发生以及由焊料层的厚度不足引起的焊料层的损坏 。

公开(公告)号：US20100208437A1

公开(公告)日：2010-08-19

申请号：US12706255

申请日：2010-02-16

申请人： Shinnosuke MAEDA ,  Toshiya ASANO ,  Takuya HANDO

发明人： Shinnosuke MAEDA ,  Toshiya ASANO ,  Takuya HANDO

IPC分类号： H05K7/00 ,  H05K1/09 ,  H05K3/10

CPC分类号： H05K3/243 ,  H01L21/4857 ,  H01L23/49822 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/30107 ,  H05K1/0269 ,  H05K1/113 ,  H05K3/0097 ,  H05K3/205 ,  H05K3/3436 ,  H05K3/4682 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/1184 ,  H05K2203/1476 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A multilayer wiring substrate of the present invention has a laminated structure composed of conductor layers and resin insulating layers stacked alternately. A plurality of surface connection terminals to which terminals of a chip component are to be surface-connected are formed on a main face of the laminated structure. A plurality of via conductors connected to the plurality of surface connection terminals are formed in the resin insulating layers. Each of the plurality of surface connection terminals has a structure in which a copper layer, a nickel layer, and a gold layer are stacked in this sequence. The gold layer is larger in diameter than at least the copper layer. The gold layer has an overhanging portion which extends radially outward from a circumference of the copper layer.

摘要翻译： 本发明的多层布线基板具有由交替堆叠的导体层和树脂绝缘层构成的层叠结构。 在层压结构的主面上形成有多个芯片部件的端子要被表面连接的表面连接端子。 连接到多个表面连接端子的多个通孔导体形成在树脂绝缘层中。 多个表面连接端子中的每一个具有这样的结构，其中铜层，镍层和金层以该顺序堆叠。 金层的直径比至少铜层大。 金层具有从铜层的圆周向外延伸的突出部分。

公开(公告)号：US20120211271A1

公开(公告)日：2012-08-23

申请号：US13399547

申请日：2012-02-17

申请人： Takuya HANDO ,  Masahiro INOUE ,  Hajime SAIKI ,  Atsuhiko SUGIMOTO ,  Hidetoshi WADA

发明人： Takuya HANDO ,  Masahiro INOUE ,  Hajime SAIKI ,  Atsuhiko SUGIMOTO ,  Hidetoshi WADA

IPC分类号： H05K1/02

CPC分类号： H05K3/4007 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/81192 ,  H01L2924/01084 ,  H05K3/0097 ,  H05K3/4682 ,  H05K2201/0367

摘要： A multilayer wiring board including a build-up layer, formed from one or more conductor and resin insulation layers that are layered one on top of the other, having conductive pads formed on a surface of at least one resin insulation layer so as to project from the surface are provided. The conductive pads may each include a columnar portion situated at a lower part thereof and a convex portion situated at a higher part thereof, wherein a surface of the convex portion may assume a continual curved shape. A solder layer may be formed over an upper surface of the conductive pads. Certain embodiments make it possible to minimize or eliminate the concentration of stress on the conductive pads, and may inhibit the occurrence of defective connections to a semiconductor element and infliction of damage to the conductive pads.

摘要翻译： 一种多层布线基板，包括由一层或多层导体和树脂绝缘层形成的堆积层，所述导体和树脂绝缘层层叠在另一层之上，具有形成在至少一层树脂绝缘层的表面上的导电焊盘，以便从 提供表面。 导电垫可以各自包括位于其下部的柱状部分和位于其较高部分的凸部，其中凸部的表面可以呈现连续的弯曲形状。 可以在导电焊盘的上表面上形成焊料层。 某些实施例使得可以最小化或消除导电焊盘上的应力集中，并且可以抑制对半导体元件的不良连接的发生以及对导电焊盘的损坏。

公开(公告)号：US20100132997A1

公开(公告)日：2010-06-03

申请号：US12629438

申请日：2009-12-02

申请人： Takuya HANDO

发明人： Takuya HANDO

IPC分类号： H01R12/00 ,  H05K3/10

CPC分类号： H05K3/4682 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/0097 ,  H05K3/205 ,  H05K3/244 ,  H05K3/4007 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2203/0369 ,  H05K2203/1536 ,  Y10T29/49155 ,  Y10T29/49162 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A multilayer wiring substrate is manufactured through a recess forming step, a gold-diffusion-prevention-layer forming step, a terminal forming step, resin-insulating-layer forming step, a conductor forming step, and a metal-layer removing step. In the recess forming step, a copper foil layer is half-etched so as to form recesses. In the gold-diffusion-prevention-layer forming step, a gold diffusion prevention layer is formed in each recess. In the terminal forming step, a gold layer, a nickel layer, and a copper layer are stacked in sequence on the gold diffusion prevention layer to thereby form a surface connection terminal. In the resin-insulating-layer forming step, a resin insulating layer is formed, and, in the conductor forming step, via conductors and conductor layers are formed. In the metal-layer removing step, the copper foil layer and the gold diffusion prevention layer are removed so that the gold layer projects from the main face of the laminated structure.

摘要翻译： 通过凹陷形成步骤，金扩散防止层形成步骤，端子形成步骤，树脂绝缘层形成步骤，导体形成步骤和金属层去除步骤制造多层布线基板。 在凹部形成工序中，铜箔层被半蚀刻形成凹部。 在金扩散防止层形成工序中，在各凹部中形成金扩散防止层。 在端子形成工序中，将金层，镍层和铜层依次层叠在金扩散防止层上，形成表面连接端子。 在树脂绝缘层形成工序中，形成树脂绝缘层，在导体形成工序中形成通孔导体和导体层。 在金属层除去工序中，除去铜箔层和金扩散防止层，使金层从层叠结构体的主面突出。