公开(公告)号：US4906823A

公开(公告)日：1990-03-06

申请号：US202027

申请日：1988-06-03

申请人： Tadao Kushima ,  Tasao Soga ,  Kazuji Yamada ,  Mitugu Shirai

发明人： Tadao Kushima ,  Tasao Soga ,  Kazuji Yamada ,  Mitugu Shirai

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/12 ,  H01L23/498 ,  H05K3/34

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L23/49827 ,  H05K3/3478 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/19042 ,  H05K2201/09827 ,  H05K2201/10734 ,  H05K2201/2081 ,  H05K2203/0113 ,  H05K2203/0143 ,  H05K2203/0278 ,  H05K2203/0338 ,  H05K2203/0405 ,  H05K2203/043 ,  Y10T29/49218

摘要： The invention relates to a solder carrier comprising a sheet of self-support type, made of a material which does not react to a solder when it is melted, a plurality of small through holes, and solder filling the through holes, each of the small through holes having an end, the area of which is larger than that of the other end. By using this solder carrier, a semiconductor device can be flip-chip-connected to a carrier substrate through a bump method, and solder balls can be formed for connecting the carrier substrate to a multilayer circuit board. The through holes of the solder carrier, each of which holes is to be filled with solder, is formed by etching, and the solder is inserted in the holes under pressure by a roll or the like.

摘要翻译： 本发明涉及一种焊料载体，它包括一种自支撑型材料，它由熔化时不与焊料反应的材料制成，多个小通孔和填充通孔的焊料，每个小型 具有端部的通孔，其面积大于另一端的面积。 通过使用该焊料载体，可以通过凸块法将半导体器件倒装芯片连接到载体基板，并且可以形成用于将载体基板连接到多层电路板的焊球。 通过蚀刻形成每个要填充有焊料的孔的焊料载体的通孔，并且通过辊等将焊料插入孔中。

公开(公告)号：US4825284A

公开(公告)日：1989-04-25

申请号：US940485

申请日：1986-12-10

申请人： Tasao Soga ,  Marahiro Goda ,  Fumio Nakano ,  Tadao Kushima ,  Nobuyuki Ushifusa ,  Fumiyuki Kobayashi ,  Mamoru Sawahata

发明人： Tasao Soga ,  Marahiro Goda ,  Fumio Nakano ,  Tadao Kushima ,  Nobuyuki Ushifusa ,  Fumiyuki Kobayashi ,  Mamoru Sawahata

IPC分类号： H01L23/52 ,  H01L21/56 ,  H01L21/60 ,  H01L23/433 ,  H01L23/473 ,  H01L23/498 ,  H01L23/538 ,  H01L25/11 ,  H01L39/02

CPC分类号： H01L24/81 ,  H01L21/563 ,  H01L23/4332 ,  H01L23/49827 ,  H01L23/5385 ,  H01L25/112 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/15787 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2924/351

摘要： A semiconductor resin package structure formed according to the flip-chip connection method and permitting to cool the rear surface of semiconductor chips, comprising semiconductor chip and carrier substrate which is soldered on one surface thereof to electrodes of the semiconductor chip according to the flip-chip connection method, the gap between the semiconductor chip and the carrier substrate being filled with resin having a thermal expansion coefficient, which is approximately equal to that of used solder, the electrodes of the semiconductor chip being electrically connected with terminals on the other surface of the carrier substrate through the soldered portions and a through-hole conductor disposed on the carrier substrate, the thermal expansion coefficient of the carrier substrate being approximately equal to that of a multi-layer substrate, with which the substrate is connected by soldering with the terminals.

摘要翻译： 根据倒装芯片连接方法形成的半导体树脂封装结构，并且允许冷却半导体芯片的背面，该半导体芯片包括半导体芯片和载体基板，该半导体芯片和载体基板在其一个表面上焊接到根据倒装芯片的半导体芯片的电极 连接方法中，半导体芯片和载体基板之间的间隙充满了热膨胀系数的树脂，其热膨胀系数近似等于使用的焊料的热膨胀系数，所述半导体芯片的电极与所述半导体芯片的另一表面上的端子电连接 通过焊接部分的载体衬底和布置在载体衬底上的通孔导体，载体衬底的热膨胀系数近似等于多层衬底的热膨胀系数，衬底通过与端子焊接而与其连接。

公开(公告)号：US4503597A

公开(公告)日：1985-03-12

申请号：US464379

申请日：1983-02-07

申请人： Tadao Kushima ,  Masahiro Gooda ,  Tasao Soga ,  Toshitaka Yamamoto

发明人： Tadao Kushima ,  Masahiro Gooda ,  Tasao Soga ,  Toshitaka Yamamoto

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L21/00

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/13099 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01061 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12036 ,  H01L2924/12042 ,  H01L2924/12043

摘要： A method of forming a number of discrete solder layers on a semiconductor wafer of a large area. A number of regions which are easy to be wetted with solder are formed on one of the major surfaces of the wafer. A solder foil is positioned on the one major surface and a plate-like jig including a plate and projections formed on one surface thereof is disposed on the solder foil with the projections facing the latter. By heating the stacked assembly at a sufficiently high temperature for the solder foil to be molten, a number of the discrete solder layers having a uniform thickness are formed on the semiconductor wafer.

摘要翻译： 在大面积的半导体晶片上形成多个分立焊料层的方法。 在晶片的一个主表面上形成许多容易被焊料润湿的区域。 焊锡箔位于一个主表面上，并且包括在其一个表面上形成的板和突起的板状夹具设置在焊料箔上，其中突起面向其上。 通过在足够高的温度下加热堆叠的组件以使焊料箔熔融，在半导体晶片上形成多个具有均匀厚度的分立焊料层。

公开(公告)号：US4562637A

公开(公告)日：1986-01-07

申请号：US622584

申请日：1984-06-20

申请人： Tadao Kushima ,  Tasao Soga ,  Takaya Suzuki

发明人： Tadao Kushima ,  Tasao Soga ,  Takaya Suzuki

IPC分类号： H01L31/042 ,  H01L31/05 ,  H05K3/36 ,  H01L31/18

CPC分类号： H01L31/1876 ,  H01L31/0512 ,  H05K3/363 ,  Y02E10/50 ,  Y02P70/521 ,  Y10T29/49169 ,  Y10T29/49179 ,  Y10T29/49181

摘要： A method of manufacturing a solar battery by serially connecting a plurality of solar battery elements arranged spaced from each other. A pair of flexible films are used to sandwich the arrangement of the solar battery elements, and each of the flexible films has a plurality of conductive members formed thereon at positions respectively corresponding to the solar battery elements. However, each conductive member has one end portion extended beyond the surface of the corresponding solar battery element in the direction of the alignment of the solar battery elements. Thus, when the pair of flexible films are disposed to sandwich the solar battery elements, the extended end portion of the conductive member on the side of the light receiving surface of one solar battery element is positioned in the space between adjacent solar battery elements opposite the end portion of the conductive member on the side of the back surface of the next solar battery element. By welding both end portions of the conductive members by, for example, a laser beam, the adjacent solar battery elements are successively connected in series.

摘要翻译： 通过串联连接彼此间隔布置的多个太阳能电池元件来制造太阳能电池的方法。 使用一对柔性膜来夹持太阳能电池元件的布置，并且每个柔性膜在分别对应于太阳能电池元件的位置处形成有多个导电构件。 然而，每个导电构件具有在太阳能电池元件的对准方向上延伸超过相应的太阳能电池元件的表面的一个端部。 因此，当一对柔性膜被设置成夹持太阳能电池元件时，导电构件的一个太阳能电池元件的光接收表面侧的延伸端部位于相邻的太阳能电池元件之间的空间中 导电构件的下一个太阳能电池元件的背面侧的端部。 通过例如通过激光束焊接导电部件的两端部，相邻的太阳能电池元件依次连续地连接。

公开(公告)号：US5956231A

公开(公告)日：1999-09-21

申请号：US539075

申请日：1995-10-04

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H01L23/049 ,  H01L23/495 ,  H01L25/065 ,  H02M7/00 ,  H05K7/02 ,  H05K7/04

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H02M7/003 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351

摘要： A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件被结合到绝缘体衬底上的至少一个电极图案上，所述绝缘体衬底在主表面上形成多个电极图案，所述半导体元件的每个电极电连接到所述电极图案， 绝缘体基板的另一表面被结合到散热基底上，散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件，将绝缘体基板上的电极与电极电连接的端子 设置在切断部件外侧，散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的线膨胀系数的3倍，导热系数 大于100 W / mK，半音 电感元件布置在至少一个电极表面上，并且在至少两个区域中被绝缘体基底上的另一个电极表面分隔。

公开(公告)号：US07141741B2

公开(公告)日：2006-11-28

申请号：US10665523

申请日：2003-09-22

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H05K1/03

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351 ,  H02M7/003 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件的电极被结合到绝缘体基板上的多个电极图案中的至少一个上，绝缘体基板的另一个表面被结合到散热基底。 散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件。 端子电连接所述绝缘体基板上的电极和放置在切断构件外部的电极。 散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的三倍，热导率大于100W / mK。 半导体元件布置在绝缘体基板上的至少一个电极表面和由另一个电极表面划分的至少两个区域中。

公开(公告)号：US06434008B1

公开(公告)日：2002-08-13

申请号：US09385632

申请日：1998-08-27

申请人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

发明人： Kazuji Yamada ,  Akira Tanaka ,  Ryuichi Saito ,  Yasutoshi Kurihara ,  Tadao Kushima ,  Takashi Haramaki ,  Yoshihiko Koike ,  Takashi Hosokawa ,  Mamoru Sawahata ,  Masahiro Koizumi ,  Jin Onuki ,  Kazuhiro Suzuki ,  Isao Kobayashi ,  Hideo Shimizu ,  Yutaka Higashimura ,  Shigeki Sekine ,  Nobuya Koike ,  Hideya Kokubun

IPC分类号： H05K702

CPC分类号： H01L23/49562 ,  H01L23/049 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49431 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/351 ,  H02M7/003 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

摘要翻译： 一种半导体器件，其中多个半导体元件被结合到绝缘体衬底上的至少一个电极图案上，所述绝缘体衬底在主表面上形成多个电极图案，所述半导体元件的每个电极电连接到所述电极图案， 绝缘体基板的另一表面被结合到散热基底上，散热基座的上表面覆盖有用于从外部环境切断半导体元件的构件，将绝缘体基板上的电极与电极电连接的端子 设置在切断部件外侧，散热基体的材料的线膨胀系数大于半导体元件的线膨胀系数，小于半导体元件的线膨胀系数的3倍，导热系数 大于100 W / mK，半音 电感元件布置在至少一个电极表面上，并且在至少两个区域中被绝缘体基底上的另一个电极表面分隔。

公开(公告)号：US06441317B1

公开(公告)日：2002-08-27

申请号：US09654085

申请日：2000-09-01

申请人： Akira Tanaka ,  Ryuichi Saito ,  Tadao Kushima ,  Yoshihiko Koike ,  Hideo Shimizu ,  Shigeharu Nonoyama

发明人： Akira Tanaka ,  Ryuichi Saito ,  Tadao Kushima ,  Yoshihiko Koike ,  Hideo Shimizu ,  Shigeharu Nonoyama

IPC分类号： H05K116

CPC分类号： H01L25/072 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01019 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/30107 ,  H01L2924/00

摘要： In a semiconductor module comprising, a semiconductor element, an electrically insulating base having an outer surface to be connected to an electrically grounded surface, and an inner surface on which the semiconductor element is arranged, an electrically insulating cover covering the semiconductor element on the inner surface, and first and second electrically conductive members each of which is connected to the semiconductor element and extends to the exterior of the semiconductor module through the electrically insulating cover, a part of each of the first and second electrically conductive members on the exterior of the semiconductor module is arranged away from the outer surface to electrically isolate the part of the each of the first and second electrically conductive members from the electrically grounded surface.

摘要翻译： 在半导体模块中，包括半导体元件，具有要连接到电接地表面的外表面的电绝缘基底和布置有半导体元件的内表面，覆盖在内部的半导体元件的电绝缘盖 表面以及第一和第二导电构件，每个导电构件连接到半导体元件并且通过电绝缘盖延伸到半导体模块的外部，第一和第二导电构件中的每一个的外部的一部分 半导体模块远离外表面布置，以将第一和第二导电构件中的每一个的一部分与电接地表面电隔离。