公开(公告)号：US06525406B1

公开(公告)日：2003-02-25

申请号：US09687049

申请日：2000-10-13

申请人： Young Suk Chung ,  Sung Sik Jang ,  Jae Jin Lee ,  Tae Heon Lee ,  Hyung Ju Lee ,  Jung Woo Lee ,  Mu Hwan Seo ,  Jae Hak Yee ,  Ku Sun Hong

发明人： Young Suk Chung ,  Sung Sik Jang ,  Jae Jin Lee ,  Tae Heon Lee ,  Hyung Ju Lee ,  Jung Woo Lee ,  Mu Hwan Seo ,  Jae Hak Yee ,  Ku Sun Hong

IPC分类号： H01L23495

CPC分类号： H01L23/544 ,  H01L21/4842 ,  H01L23/3114 ,  H01L23/49548 ,  H01L23/49582 ,  H01L24/28 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18301 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2224/45015 ,  H01L2924/207

摘要： Disclosed is a semiconductor package and a method for manufacturing the same. A planar or substantially planar die pad is disposed within a leadframe and is connected to the leadframe by a plurality of tie bars. An perimeter of an upper and lower surface of the die pad is half-etched to increase the moisture-permeation path of the finished package. A plurality of rectangular leads extends from the leadframe toward the die pad without contacting the die pad. A silver-plating layer may be formed on the upper surface of the leadframe. A semiconductor chip is mounted on the upper surface of the die pad in the leadframe. After deflashing, the package is treated with a sulfuric (H2SO4)-based solution to restore the internal leads to their original color. Prior to singulation, the externally exposed bottom surfaces of the leads are plated with copper, gold, solder, tin, nickel, palladium, or an alloy thereof to form a predetermined thickness of a plating layer. The singulation step comprises forming a burr at a peripheral side surface of the leads in the upward direction. The finished package may be marked with a recognition mark to enable a user to more easily identify the first lead.

摘要翻译： 公开了一种半导体封装及其制造方法。 平面或基本上平面的管芯焊盘设置在引线框架内，并且通过多个连接条连接到引线框架。 芯片焊盘的上表面和下表面的周边被半蚀刻以增加成品封装的透湿路径。 多个矩形引线从引线框架朝向管芯焊盘延伸，而不接触管芯焊盘。 可以在引线框架的上表面上形成镀银层。 半导体芯片安装在引线框架中的管芯焊盘的上表面上。 在消融后，将包装用硫酸（H 2 SO 4）的溶液处理，以将内部引线恢复到其原始颜色。 在分割之前，引线的外露的底表面镀有铜，金，焊料，锡，镍，钯或其合金，以形成预定厚度的镀层。 分割步骤包括在引线的周向侧表面沿向上方向形成毛刺。 完成的包装可以标记有识别标记，以使用户能够更容易地识别第一个引线。

公开(公告)号：US07102208B1

公开(公告)日：2006-09-05

申请号：US09687048

申请日：2000-10-13

申请人： Tae Heon Lee ,  Young Suk Chung ,  Mu Hwan Seo

发明人： Tae Heon Lee ,  Young Suk Chung ,  Mu Hwan Seo

IPC分类号： H01L23/495

CPC分类号： H01L21/4828 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor leadframe and a semiconductor package using same. More particularly, a semiconductor leadframe offering improved solder joint strength between a semiconductor package and a motherboard is disclosed. The leadframe comprises a plate-type frame body; a chip paddle on which a semiconductor chip may be mounted; a plurality of internal leads located radially and spaced at regular intervals about the perimeter of the chip paddle; external leads extending outward from the internal leads and with their terminals connecting to the frame body; and dam bars at the juncture of each external and internal lead for additional support and to ensure that the external leads remain exposed during subsequent encapsulation processes. The leadframe of the present invention providing additional solder joint strength through the use of internal leads having different lengths or surface areas.

摘要翻译： 半导体引线框和使用其的半导体封装。 更具体地，公开了一种提供半导体封装和母板之间的焊接强度提高的半导体引线框架。 引线框架包括板型框体; 可安装半导体芯片的芯片桨; 多个内部引线，围绕芯片桨的周边以规则的间隔径向地间隔开; 外部引线从内部引线向外延伸并且其端子连接到框架体; 并在每个外部和内部引线的接合处设有防水条，用于额外的支持，并确保外部引线在后续封装过程中保持暴露。 本发明的引线框架通过使用具有不同长度或表面积的内部引线提供额外的焊接接合强度。

公开(公告)号：US08410585B2

公开(公告)日：2013-04-02

申请号：US11372597

申请日：2006-03-10

申请人： Byung Hoon Ahn ,  Jae Hun Ku ,  Young Suk Chung ,  Suk Gu Ko ,  Sung Sik Jang ,  Young Nam Choi ,  Won Chul Do

发明人： Byung Hoon Ahn ,  Jae Hun Ku ,  Young Suk Chung ,  Suk Gu Ko ,  Sung Sik Jang ,  Young Nam Choi ,  Won Chul Do

IPC分类号： H01L23/495

CPC分类号： H01L23/495 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.

摘要翻译： 公开了使用引线框制造的金属引线框，半导体封装以及制造引线框和封装的方法。 在一个实施例中，引线框架包括矩形框架。 芯片焊盘和多个引线在框架内。 芯片焊盘的下侧和引线包括一个或多个垂直凹入的水平表面。 芯片焊盘的上侧可以包括围绕芯片安装区域的凹槽。 在封装中，芯片焊盘支撑与引线电连接的半导体芯片。 芯片焊盘的下侧和引线在封装体的外表面露出。 封装材料底部填充芯片焊盘和引线的凹陷的下表面，从而将它们锁定到密封材料上。 电线可以可靠地结合到在其上侧形成的槽内的芯片焊盘。

公开(公告)号：US07353624B2

公开(公告)日：2008-04-08

申请号：US11223965

申请日：2005-09-13

申请人： Young Suk Chung ,  Su Young Byun

发明人： Young Suk Chung ,  Su Young Byun

IPC分类号： F26B3/00

CPC分类号： D06F58/28

摘要： A clothing drying machine, which terminates drying operation when a dryness level of the drying machine reaches a target level desired by a user, and a method for sensing the dryness level using the same. The method includes counting the frequency of a case, in which voltage sensed by an electrode sensor, in which the voltage varies according to moisture content of clothing, is more than a predetermined reference voltage; and terminating drying operation when the frequency counted by the counting unit for a predetermined reference time is in the range of one of predetermined dryness levels.

摘要翻译： 一种衣物干燥机，其在干燥机的干燥程度达到使用者期望的目标水平时终止干燥操作，以及使用其进行干燥度检测的方法。 该方法包括对由电极传感器感测到的电压的频率进行计数，其中电压根据衣物的水分含量而变化，大于预定的参考电压; 以及当由所述计数单元计数预定参考时间的频率在预定干燥度之一的范围内时终止干燥操作。

公开(公告)号：US06825062B2

公开(公告)日：2004-11-30

申请号：US10152945

申请日：2002-05-22

申请人： Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

发明人： Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

IPC分类号： H01L2144

CPC分类号： H01L23/3107 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed. The lead frame includes a paddle, a plurality of tie bars for supporting the corners of the paddle, a plurality of leads arranged at each of four sides or two facing sides of the paddle in such a fashion that they are spaced apart from an adjacent side of the paddle while extending perpendicularly to the associated side of the paddle, each of the leads having lead separation preventing means adapted to increase a bonding force of the lead to a resin encapsulate subsequently molded to encapsulate the lead frame for fabrication of the semiconductor package, and dam bars for supporting the leads and the tie bars. Additional package embodiments include exposed protrusions extending downward from the leads. The exposed protrusions are irradiated with a laser to remove set resin prior to a solder ball attachment step.

摘要翻译： 公开了一种用于制造半导体封装的引线框架。 引线框架的引线包括提供在每个内引线的自由端处的引线锁，其适于增加内引线与树脂封装件的结合力，从而有效地防止内引线的分离在所涉及的单个加工过程中发生 制造半导体封装。 还公开了使用引线框制造的半导体封装和用于半导体封装的制造方法。 引线框架包括桨，用于支撑桨的角的多个连杆，多个引线，其布置在桨的四个侧面或两个相对的侧面中，使得它们与相邻侧面间隔开 的叶片，同时垂直于桨叶的相关侧延伸，每个引线具有引线分离防止装置，其适于增加引线与随后模制的树脂封装件的结合力，以封装引线框架以制造半导体封装， 和用于支撑引线和连接条的阻挡条。 另外的封装实施例包括从引线向下延伸的暴露突起。 在焊球附着步骤之前，用激光照射暴露的突起以去除固化树脂。

公开(公告)号：US06627976B1

公开(公告)日：2003-09-30

申请号：US09687331

申请日：2000-10-13

申请人： Young Suk Chung ,  Hyung Ju Lee ,  Jae Hak Yee

发明人： Young Suk Chung ,  Hyung Ju Lee ,  Jae Hak Yee

IPC分类号： H01L23495

CPC分类号： H01L23/49548 ,  H01L21/565 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The invention relates to a leadframe for semiconductor packages and a mold for molding the semiconductor package. The leadframe of the invention reduces occurrences of chip-out and floating of a chip paddle upon singulation after encapsulation. The leadframe inner voids define a chip paddle. At least one end of an inner void extends outwardly beyond a dam bar to provide a flow under pathway for encapsulating material when the leadframe is engaged by a top mold. The top mold has a sill that is continuous, e.g. tetragonal in shape, such that encapsulating material must flow under the sill when the top mold is clamping the leadframe. Encapsulating material is flowed into a mold gate of the leadframe and under a portion of the sill to engulf the semiconductor chip within the cavity formed by the top mold and the leadframe.

摘要翻译： 本发明涉及用于半导体封装的引线框和用于模制半导体封装的模具。 本发明的引线框架在封装之后可以减少芯片划片片的划分和漂浮。 引线框内部空隙定义了芯片桨。 内部空隙的至少一个端部向外延伸超过坝条，以在引线框架由顶部模具接合时提供用于封装材料的路径下的流动。 顶模具有连续的门槛，例如 四边形形状，使得当顶模夹紧引线框时，封装材料必须在基台下方流动。 封装材料流入引线框架的模具浇口并且在基底的一部分下方，以将由半模和引线框架形成的空腔中的半导体芯片填充。

公开(公告)号：US06448633B1

公开(公告)日：2002-09-10

申请号：US09444035

申请日：1999-11-19

申请人： Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

发明人： Jae Hak Yee ,  Young Suk Chung ,  Jae Jin Lee ,  Terry Davis ,  Chung Suk Han ,  Jae Hun Ku ,  Jae Sung Kwak ,  Sang Hyun Ryu

IPC分类号： H01L23495

CPC分类号： H01L23/3107 ,  H01L23/4951 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0106 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A lead frame for making a semiconductor package is disclosed. The leadframe's leads include a lead lock provided at a free end of each inner lead that is adapted to increase a bonding force of the inner lead to a resin encapsulate, thereby effectively preventing a separation of the inner lead from occurring in a singulation process involved in the fabrication of the semiconductor package. A semiconductor package fabricated using the lead frame and a fabrication method for the semiconductor package are also disclosed. The lead frame includes a paddle, a plurality of tie bars for supporting the comers of the paddle, a plurality of leads arranged at each of four sides or two facing sides of the paddle in such a fashion that they are spaced apart from an adjacent side of the paddle while extending perpendicularly to the associated side of the paddle, each of the leads having lead separation preventing means adapted to increase a bonding force of the lead to a resin encapsulate subsequently molded to encapsulate the lead frame for fabrication of the semiconductor package, and dam bars for supporting the leads and the tie bars. Additional package embodiments include exposed protrusions extending downward from the leads. The exposed protrusions are irradiated with a laser to remove set resin prior to a solder ball attachment step.

摘要翻译： 公开了一种用于制造半导体封装的引线框架。 引线框架的引线包括提供在每个内引线的自由端处的引线锁，其适于增加内引线与树脂封装件的结合力，从而有效地防止内引线的分离在所涉及的单个加工过程中发生 制造半导体封装。 还公开了使用引线框制造的半导体封装和用于半导体封装的制造方法。 引线框架包括桨，用于支撑桨的角的多个连杆，多个引线布置在桨的四个侧面或两个相对的侧面中，使得它们与相邻侧面间隔开 的叶片，同时垂直于桨叶的相关侧延伸，每个引线具有引线分离防止装置，其适于增加引线与随后模制的树脂封装件的结合力，以封装引线框架以制造半导体封装， 和用于支撑引线和连接条的阻挡条。 另外的封装实施例包括从引线向下延伸的暴露突起。 在焊球附着步骤之前，用激光照射暴露的突起以去除固化树脂。

公开(公告)号：US07977783B1

公开(公告)日：2011-07-12

申请号：US12549083

申请日：2009-08-27

申请人： No Sun Park ,  Young Suk Chung ,  Jae Beom Shim

发明人： No Sun Park ,  Young Suk Chung ,  Jae Beom Shim

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L23/552 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/11334 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/01083

摘要： A wafer level chip size package (WLCSP) and a method of manufacturing the same are disclosed. Lands are formed at the ends of redistribution layers. The redistribution layers excluding the lands and a first dielectric layer are covered with a second dielectric layer. After forming a first under bump metallurgy (UBM) layer on the land, a solder ball is reflowed to the first UBM layer. A second UBM layer is widely formed on the entire second dielectric layer that is the outer circumference of the first UBM layer and is connected to the redistribution layer through a via-hole. Therefore, the second UBM layer having a large area can be used as a ground plane or a power plane. In addition, the second UBM layer can electrically connect the redistribution layers physically separated from each other. Therefore, the plurality of redistribution layers can cross each other without being electrically shorted with each other.

摘要翻译： 公开了一种晶片级芯片尺寸封装（WLCSP）及其制造方法。 地面在再分布层的末端形成。 除了焊盘之外的再分配层和第一介电层被第二介电层覆盖。 在焊盘上形成第一下凸块冶金（UBM）层之后，将焊球回流到第一UBM层。 第二UBM层被广泛地形成在作为第一UBM层的外周的整个第二电介质层上，并且通过通孔连接到再分配层。 因此，具有大面积的第二UBM层可以用作接地层或电源层。 此外，第二UBM层可以将再分布层彼此物理分离地电连接。 因此，多个再分配层可以彼此交叉而不彼此电短路。

公开(公告)号：US20080216517A1

公开(公告)日：2008-09-11

申请号：US12000333

申请日：2007-12-11

申请人： Young Suk Chung

发明人： Young Suk Chung

IPC分类号： D06F25/00 ,  D06F33/02

CPC分类号： D06F25/00 ,  D06F58/28 ,  D06F2058/2832 ,  D06F2058/2861 ,  D06F2058/2896

摘要： Disclosed herein are a washing machine with a drying unit and a drying control method of the same that is capable of controlling a drying time based on a temperature of condensed water used during a drying operation to accomplish optimum drying efficiency. The drying control method includes detecting the temperature of condensed water supplied during drying the laundry, setting the drying time based on the detected temperature of the condensed water, and operating the drying unit according to the set drying time to perform a drying operation.

摘要翻译： 本发明公开了一种具有干燥单元和干燥控制方法的洗衣机，其能够基于在干燥操作期间使用的冷凝水的温度来控制干燥时间以实现最佳干燥效率。 干燥控制方法包括检测在干燥衣物期间供应的冷凝水的温度，基于所检测的冷凝水的温度设定干燥时间，并根据设定的干燥时间操作干燥单元以进行干燥操作。

公开(公告)号：US07944043B1

公开(公告)日：2011-05-17

申请号：US12169151

申请日：2008-07-08

申请人： Young Suk Chung ,  Jae Yoon Kim ,  Tae Yong Lee

发明人： Young Suk Chung ,  Jae Yoon Kim ,  Tae Yong Lee

IPC分类号： H01L23/04

CPC分类号： H01L23/3128 ,  H01L21/4832 ,  H01L21/486 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49582 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2224/32225 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/85001 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package has an insulative layer having at least one channel formed on a first surface thereof. A conductive pattern conforming to the at least one channel and exposed to a bottom surface of the semiconductor package is formed. A semiconductor die is electrically connected to the conductive patterns. An encapsulant is used to at least partially filling the at least one channel.

摘要翻译： 半导体封装具有在其第一表面上形成有至少一个沟道的绝缘层。 形成符合至少一个通道并暴露于半导体封装的底表面的导电图案。 半导体管芯电连接到导电图案。 密封剂用于至少部分填充至少一个通道。