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公开(公告)号：US07989707B2
公开(公告)日：2011-08-02
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K1/16
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US08793868B2
公开(公告)日：2014-08-05
申请号：US13167203
申请日：2011-06-23
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
IPC分类号： H05K3/30
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US20090008765A1
公开(公告)日：2009-01-08
申请号：US11815580
申请日：2006-12-12
申请人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
发明人： Takaharu Yamano , Hajime Iizuka , Hideaki Sakaguchi , Toshio Kobayashi , Tadashi Arai , Tsuyoshi Kobayashi , Tetsuya Koyama , Kiyoaki Iida , Tomoaki Mashima , Koichi Tanaka , Yuji Kunimoto , Takashi Yanagisawa
CPC分类号： H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L23/3114 , H01L23/3121 , H01L23/3128 , H01L23/49822 , H01L23/49833 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L25/105 , H01L25/16 , H01L25/162 , H01L2221/68345 , H01L2224/0401 , H01L2224/1134 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/81005 , H01L2224/81193 , H01L2224/81801 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/85 , H01L2224/92125 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07811 , H01L2924/12042 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19104 , H01L2924/19105 , H01L2924/207 , H01L2924/3025 , H01L2924/3511 , H05K1/185 , H05K1/186 , H05K3/20 , H05K3/4614 , H05K3/462 , H05K3/4644 , H05K2201/10007 , H05K2201/10378 , H05K2201/10674 , H05K2201/10977 , Y10T29/4913 , Y10T29/49144 , Y10T29/49146 , H01L2924/00
摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.
摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。
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公开(公告)号：US07772689B2
公开(公告)日：2010-08-10
申请号：US11470432
申请日：2006-09-06
CPC分类号： H01L23/49827 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2924/01049
摘要： It is configured to comprise a semiconductor chip 110, a resin member 106 for forming a cavity 109 in which this semiconductor chip 110 is installed, and wiring 105 constructed of pattern wiring 105b formed so as to be exposed to an upper surface 106b of this resin member 106 and also connected to the semiconductor chip 110 and a post part 105a in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to a lower surface 106a of the resin member 106.
摘要翻译： 其构造为包括半导体芯片110，用于形成其中安装该半导体芯片110的空腔109的树脂构件106和由图案布线105b构成的布线105，其形成为暴露于该树脂的上表面106b 构件106，并且还连接到半导体芯片110和其中一端连接到图案布线105b的后部105a，并且另一端形成为暴露于树脂构件106的下表面106a。
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公开(公告)号：US20070052071A1
公开(公告)日：2007-03-08
申请号：US11470432
申请日：2006-09-06
IPC分类号： H01L23/495
CPC分类号： H01L23/49827 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2924/01049
摘要： It is configured to comprise a semiconductor chip 110, a resin member 106 for forming a cavity 109 in which this semiconductor chip 110 is installed, and wiring 105 constructed of pattern wiring 105b formed so as to be exposed to a lower surface 106a of this resin member 106 and also connected to the semiconductor chip 110 and a post part 105a in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to a front surface 106b of the resin member 106.
摘要翻译： 其构造为包括半导体芯片110，用于形成其中安装该半导体芯片110的空腔109的树脂构件106和由图案布线105b构成的布线105，其形成为暴露于下表面106a 该树脂构件106还连接到半导体芯片110和其一端连接到图案布线105b的后部105a，并且另一端形成为暴露于前部表面106b 树脂构件106。
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公开(公告)号：US07847384B2
公开(公告)日：2010-12-07
申请号：US11465284
申请日：2006-08-17
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/4846 , H01L23/3107 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2221/68345 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83191 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/01049
摘要： A semiconductor package 100 is constructed of a semiconductor chip 110, a sealing resin 106 for sealing this semiconductor chip 110, and wiring 105 formed inside the sealing resin 106. And, the wiring 105 is constructed of pattern wiring 105b connected to the semiconductor chip 110 and also formed so as to be exposed to a lower surface 106b of the sealing resin 106, and a post part 105a formed so as to extend in a thickness direction of the sealing resin 106, the post part in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to an upper surface 106a of the sealing resin 106.
摘要翻译： 半导体封装100由半导体芯片110，用于密封该半导体芯片110的密封树脂106和形成在密封树脂106内部的布线105构成。布线105由连接到半导体芯片110的图案布线105b构成 并且还形成为暴露于密封树脂106的下表面106b，以及沿密封树脂106的厚度方向延伸形成的柱部105a，其一端连接到密封树脂106的后部 图案布线105b，另一端形成为暴露于密封树脂106的上表面106a。
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公开(公告)号：US20070052083A1
公开(公告)日：2007-03-08
申请号：US11465284
申请日：2006-08-17
CPC分类号： H01L21/6835 , H01L21/4846 , H01L23/3107 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2221/68345 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83191 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/01049
摘要： A semiconductor package 100 is constructed of a semiconductor chip 110, a sealing resin 106 for sealing this semiconductor chip 110, and wiring 105 formed inside the sealing resin 106. And, the wiring 105 is constructed of pattern wiring 105b connected to the semiconductor chip 110 and also formed so as to be exposed to a lower surface 106b of the sealing resin 106, and a post part 105a formed so as to extend in a thickness direction of the sealing resin 106, the post part in which one end is connected to the pattern wiring 105b and also the other end is formed so as to be exposed to an upper surface 106a of the sealing resin 106.
摘要翻译： 半导体封装100由半导体芯片110，用于密封该半导体芯片110的密封树脂106和形成在密封树脂106内部的布线105构成。 并且，布线105由连接到半导体芯片110的图案布线105b构成，并且还形成为暴露于密封树脂106的下表面106b，以及形成为在 密封树脂106的厚度方向，其一端连接到图案布线105b的另一端形成为暴露于密封树脂106的上表面106a。
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公开(公告)号：US08253229B2
公开(公告)日：2012-08-28
申请号：US11976249
申请日：2007-10-23
IPC分类号： H01L23/02
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/06568 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/15331 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： In a stacked layer type semiconductor package constructed by stacking a plurality of packages with each other, the plurality of packages include a semiconductor package including: a semiconductor chip; a substrate in which a concave portion has been formed, the semiconductor chip being mounted in the concave portion; and a wiring line structure constructed in such a manner that the wiring line structure can be externally connected to the semiconductor chip at least just above and just under the semiconductor chip.
摘要翻译： 在通过将多个封装彼此堆叠而构成的堆叠层型半导体封装中，所述多个封装包括半导体封装，包括：半导体芯片; 形成有凹部的基板，将半导体芯片安装在凹部内; 以及以这样的方式构成的布线线路结构，使得布线线结构可以至少刚好在半导体芯片的正上方和外部连接到半导体芯片。
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公开(公告)号：US20080290491A1
公开(公告)日：2008-11-27
申请号：US11976249
申请日：2007-10-23
IPC分类号： H01L23/48
CPC分类号： H01L25/105 , H01L23/3128 , H01L24/73 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2225/06568 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/10253 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/15331 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： In a stacked layer type semiconductor package constructed by stacking a plurality of packages with each other, the plurality of packages include a semiconductor package including: a semiconductor chip; a substrate in which a concave portion has been formed, the semiconductor chip being mounted in the concave portion; and a wiring line structure constructed in such a manner that the wiring line structure can be externally connected to the semiconductor chip at least just above and just under the semiconductor chip.
摘要翻译： 在通过将多个封装彼此堆叠而构成的堆叠层型半导体封装中，所述多个封装包括半导体封装，包括：半导体芯片; 形成有凹部的基板，将半导体芯片安装在凹部内; 以及以这样的方式构成的布线线路结构，使得布线线结构可以至少刚好在半导体芯片的正上方和外部连接到半导体芯片。
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公开(公告)号：US06420787B1
公开(公告)日：2002-07-16
申请号：US09591785
申请日：2000-06-12
IPC分类号： H01L2348
CPC分类号： H01L24/73 , H01L23/3128 , H01L24/11 , H01L24/13 , H01L24/45 , H01L24/48 , H01L25/03 , H01L25/0657 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/131 , H01L2224/16145 , H01L2224/32145 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73257 , H01L2225/06513 , H01L2225/06527 , H01L2225/06575 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/15311 , H01L2924/15312 , H01L2924/1532 , H01L2924/181 , H01L2924/18161 , H01L2924/19041 , H01L2924/19043 , H01L2924/19107 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2224/13099 , H01L2924/00 , H01L2224/05647 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device having a first electronic part and a second electronic part, the first electronic part being larger than the second electronic part in area and in the number of connection terminal pads including pad form electrode terminals, and external connection terminals or other connection terminals bonded to the connection terminal pads, wherein the first and second electronic parts are disposed one upon the other with respective pad forming surfaces facing each other and are electrically connected to each other by flip-chip bonding; and springy wire form connection terminals stand on, and are bonded to, the connection terminal pads of the first electronic part other than those electrically connected to the connection terminal pads of the second electronic part.
摘要翻译： 一种具有第一电子部件和第二电子部件的半导体器件，所述第一电子部件大于所述第二电子部件的面积，并且所述多个连接端子焊盘包括焊盘形电极端子，以及外部连接端子或其它连接端子 连接端子焊盘，其中第一和第二电子部件彼此相对设置，相应的焊盘形成表面彼此面对并且通过倒装芯片焊接彼此电连接; 并且弹性线形连接端子固定在第一电子部件的连接端子焊盘上，而不是连接到第二电子部件的连接端子焊盘的连接端子焊盘。
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