公开(公告)号：US20080258293A1

公开(公告)日：2008-10-23

申请号：US11736461

申请日：2007-04-17

申请人： Wen-Kun YANG ,  Diann-Fang LIN

发明人： Wen-Kun YANG ,  Diann-Fang LIN

IPC分类号： H01L23/12 ,  H01L21/00

CPC分类号： H01L23/552 ,  H01L23/3677 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L25/105 ,  H01L2223/6677 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00

摘要： The present invention provides a package structure and a method for forming the same. The structure comprises a substrate with contact pads and through holes filled with conducting metals for performing heat dissipation and ground shielding A chip with bonding pads is attached on the contact pad by an adhesive with high thermal conductivity to achieve heat dissipation. A RDL is formed on the substrate and the chip to couple the bonding pad and the contact pad formed on the substrate. The structure of present invention can improve the thickness thereof, and the heat dissipation and ground shielding of the structure are enhanced. Furthermore, the structure can achieve package on package (PoP) structure.

摘要翻译： 本发明提供一种封装结构及其形成方法。 该结构包括具有接触焊盘的基板和填充有用于进行散热和接地屏蔽的导电金属的通孔。具有接合焊盘的芯片通过具有高导热性的粘合剂附接在接触焊盘上以实现散热。 在衬底和芯片上形成RDL以耦合形成在衬底上的接合焊盘和接触焊盘。 本发明的结构可以提高其结构的厚度，提高结构的散热和接地屏蔽。 此外，该结构可以实现封装封装（PoP）结构。

公开(公告)号：US20110256714A1

公开(公告)日：2011-10-20

申请号：US13170589

申请日：2011-06-28

申请人： Wen-Kun YANG

发明人： Wen-Kun YANG

IPC分类号： H01L21/283

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/49816 ,  H01L23/5384 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05024 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014

摘要： The present invention comprises a first substrate with a die formed on a die metal pad, a first and a second wiring circuits formed on the surfaces of the first substrate. A second substrate has a die opening window for receiving the die, a third wiring circuit is formed on top surface of the second substrate and a fourth wiring circuit on bottom surface of the second substrate. An adhesive material is filled into the gap between back side of the die and top surface of the first substrate and between the side wall of the die and the side wall of the die receiving through hole and the bottom side of the second substrate. During the formation, laser is introduced to cut the backside of the first substrate and an opening hole is formed in the first substrate to expose a part of the backside of the Au or Au/Ag metal layer of chip/die.

摘要翻译： 本发明包括具有在模具金属焊盘上形成的管芯的第一衬底，形成在第一衬底的表面上的第一和第二布线电路。 第二基板具有用于接收管芯的开口窗口，在第二基板的顶表面上形成第三布线电路，在第二基板的底表面上形成第四布线电路。 将粘合剂材料填充到模具的背面和第一基板的顶表面之间以及模具的侧壁和模具的侧壁之间的间隙中，模具的通孔和第二基板的底侧。 在形成期间，引入激光以切割第一基板的背面，并且在第一基板中形成开孔以暴露芯片/管芯的Au或Au / Ag金属层的背面的一部分。

公开(公告)号：US20080224306A1

公开(公告)日：2008-09-18

申请号：US12130357

申请日：2008-05-30

申请人： Wen-Kun YANG

发明人： Wen-Kun YANG

IPC分类号： H01L23/538

CPC分类号： H01L25/0657 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05026 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/056 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/013

摘要： The present invention provides a structure of multi-chips package comprising: a substrate with a die receiving cavity formed within an upper surface of the substrate and a first through holes structure, wherein terminal pads are formed under the first through holes structure. A first die is disposed within the die receiving cavity and a first dielectric layer is formed on the first die and the substrate. A first re-distribution conductive layer (RDL) is formed on the first dielectric layer. A second dielectric layer is formed over the first RDL. A third dielectric layer is formed under a second die. A second re-distribution conductive layer (RDL) is formed under the third dielectric layer. A fourth dielectric layer is formed under the second RDL. Conductive bumps are coupled to the first RDL and the second RDL. A surrounding material surrounds the second die. The second die is coupled to the first die through the first RDL, second RDL and the conductive bumps.

摘要翻译： 本发明提供了一种多芯片封装的结构，包括：具有形成在基板的上表面内的模具容纳空腔的基板和第一通孔结构，其中在第一通孔结构下方形成端子焊盘。 第一管芯设置在管芯接收腔内，并且在第一管芯和衬底上形成第一介电层。 在第一电介质层上形成第一再分配导电层（RDL）。 在第一RDL上形成第二介电层。 在第二模具下方形成第三电介质层。 第二再分配导电层（RDL）形成在第三介电层下面。 在第二RDL下方形成第四电介质层。 导电凸块耦合到第一RDL和第二RDL。 周围的材料围绕第二模具。 第二裸片通过第一RDL，第二RDL和导电凸块耦合到第一裸片。

公开(公告)号：US20080237828A1

公开(公告)日：2008-10-02

申请号：US11936596

申请日：2007-11-07

申请人： Wen-Kun YANG

发明人： Wen-Kun YANG

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/6835 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00

摘要： The present invention discloses a structure of package comprising a substrate with at least one die receiving through holes, a conductive connecting through holes structure and a contact pads on both side of substrate. At least one die is disposed within the die receiving through holes. A first material is formed under the die and second material is formed filled in the gap between the die and sidewall of the die receiving though holes. Dielectric layers are formed on the surface of both side of the die and the substrate. Redistribution layers (RDL) are formed on the both sides and coupled to the contact pads. A protection bases are formed over the RDLs.

摘要翻译： 本发明公开了一种包装体的结构，该结构包括具有至少一个模头的基板，该基板具有通孔，导电连接通孔结构和基板两侧的接触焊盘。 至少一个模具设置在模具内，接收通孔。 第一材料形成在模具下方，并且第二材料形成为填充在模具和接收通孔的模具的侧壁之间的间隙中。 电介质层形成在管芯和衬底两侧的表面上。 再分布层（RDL）形成在两侧并耦合到接触焊盘。 在RDL上形成保护基。

公开(公告)号：US20120043635A1

公开(公告)日：2012-02-23

申请号：US13289864

申请日：2011-11-04

申请人： Wen-Kun YANG

发明人： Wen-Kun YANG

IPC分类号： H01L31/0232

CPC分类号： H01L27/14618 ,  H01L24/16 ,  H01L24/24 ,  H01L24/82 ,  H01L27/14625 ,  H01L2224/24225 ,  H01L2224/82039 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/351 ,  H01L2924/00

摘要： The image sensor package with dual substrates comprises a first substrate with a die receiving opening and a plurality of first through hole penetrated through the first substrate; a second substrate with a die opening window and a plurality of second through hole penetrated through the second substrate, formed on the first substrate. A part of the second wiring pattern is coupled to a part of the third wiring pattern; an image die having conductive pads and sensing array received within the die receiving opening and the sensing array being exposed by the die opening window; and a through hole conductive material refilled into the plurality of second through hole, some of the plurality of second through hole coupling to the conductive pads of the image sensor.

摘要翻译： 具有双基板的图像传感器封装包括具有裸片接收开口的第一基板和穿过第一基板的多个第一通孔; 具有开口窗口的第二基板和穿过第二基板的多个第二通孔，形成在第一基板上。 第二布线图案的一部分耦合到第三布线图案的一部分; 具有接收在所述管芯接收开口内的导电焊盘和感测阵列的图像裸片，并且所述感测阵列被所述裸片开口窗露出; 并且通孔导电材料被再填充到多个第二通孔中，多个第二通孔中的一些耦合到图像传感器的导电焊盘。

公开(公告)号：US20100072606A1

公开(公告)日：2010-03-25

申请号：US12385358

申请日：2009-04-06

申请人： Wen-Kun YANG

发明人： Wen-Kun YANG

IPC分类号： H01L23/498 ,  H01L21/58

CPC分类号： H01L23/481 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/03 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2224/82 ,  H01L2924/00

摘要： The semiconductor device package structure includes a first die with a through silicon via (TSV) open from back side of the first die to expose bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via (TSV); a substrate with a second die embedded inside and top circuit wiring and bottom circuit wiring on top and bottom side of the substrate respectively; and a conductive through hole structure coupled between the terminal metal pads to the top circuit wiring and the bottom circuit wiring.

摘要翻译： 半导体器件封装结构包括具有从第一管芯的背面开口的通硅通孔（TSV）的第一管芯，以暴露焊盘; 通过硅通孔（TSV）将接合焊盘耦合到端子金属焊盘的堆积层; 分别嵌入第二芯片的基板和分别在基板的顶部和底部的顶部电路布线和底部电路布线; 以及耦合在端子金属焊盘与顶部电路布线和底部电路布线之间的导电通孔结构。