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16 条记录 (耗时 0.017 秒)

    Compound semiconductor integrated circuit having improved electrode bonding arrangements
    1.
    发明授权
    Compound semiconductor integrated circuit having improved electrode bonding arrangements 失效
    具有改进的电极接合装置的复合半导体集成电路

    公开(公告)号：US5329154A

    公开(公告)日：1994-07-12

    申请号：US32278

    申请日：1993-03-17

    申请人： Yoshihiro Kishita ,  Toshikazu Fukuda ,  Yuji Minami

    发明人： Yoshihiro Kishita ,  Toshikazu Fukuda ,  Yuji Minami

    IPC分类号： H01L23/48 ,  H01L27/06 ,  H01L29/784 ,  H01L31/0224

    CPC分类号： H01L27/0605 ,  H01L23/481 ,  H01L2924/0002

    摘要： An integrated circuit including a wafer having a GaAs substrate, an un-doped GaAs layer, and a GaAs active layer. This active layer may have an HEMT structure to improve its operation speed. Also, the substrate may a multi-layer structure to form a three dimensional capacitor. At least one mesa portion is formed on the substrate by removing a portion of the un-doped GaAs layer and GaAs active layer. A source electrode, for example, is formed on the mesa portion, and a ground electrode is formed on an exposed surface of the substrate. These electrodes are connected to each other by means of a wiring metal layer. As a result, the source electrode is easily grounded without using a long bonding wire.

    摘要翻译： 一种集成电路，包括具有GaAs衬底，未掺杂GaAs层和GaAs活性层的晶片。 该活性层可具有HEMT结构以改善其操作速度。 此外，基板可以是多层结构以形成三维电容器。 通过去除一部分未掺杂的GaAs层和GaAs活性层，在衬底上形成至少一个台面部分。 源极电极例如形成在台面部分上，接地电极形成在基板的露出面上。 这些电极通过布线金属层彼此连接。 结果，源电极容易接地而不使用长的接合线。

    Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes
    2.
    发明授权
    Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes 失效
    具有栅电极与源电极和漏电极自对准的化合物半导体器件的制造方法

    公开(公告)号：US5409849A

    公开(公告)日：1995-04-25

    申请号：US58684

    申请日：1993-05-07

    申请人： Yoshihiro Kishita ,  Masanori Ochi ,  Souichi Imamura ,  Toshikazu Fukuda

    发明人： Yoshihiro Kishita ,  Masanori Ochi ,  Souichi Imamura ,  Toshikazu Fukuda

    IPC分类号： H01L29/812 ,  H01L21/285 ,  H01L21/335 ,  H01L21/338 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L21/265

    CPC分类号： H01L29/66863 ,  H01L21/28587 ,  H01L29/42316 ,  H01L29/66462

    摘要： According to this invention, there is provided a method of manufacturing a compound semiconductor which can be formed at a high yield and in which variations in characteristics of elements caused by variations in distances between a source and a gate and between a drain and the gate can be minimized. In addition, there is provided a compound semiconductor device having a structure capable of increasing a power gain and obtaining a high-speed operation. According to this invention, an active layer is formed on a compound semi-conductor substrate, and source/drain electrodes are formed on the active layer to be separated from each other. The wall insulating films are respectively formed on side walls of the electrodes, and a gate electrode is formed between the side wall insulating films to be respectively in contact therewith.

    摘要翻译： 根据本发明，提供一种制造化合物半导体的方法，该化合物半导体可以以高产率形成，并且由源极和栅极之间以及漏极和栅极之间的距离变化引起的元件的特性的变化可以 最小化 此外，提供了具有能够增加功率增益并获得高速操作的结构的化合物半导体器件。 根据本发明，在复合半导体基板上形成有源层，在有源层上形成源极/漏极，以分离。 壁绝缘膜分别形成在电极的侧壁上，并且在侧壁绝缘膜之间形成分别与其接触的栅电极。

    Magnetic force detecting semiconductor device and method for manufacturing the same
    3.
    发明授权
    Magnetic force detecting semiconductor device and method for manufacturing the same 失效
    磁力检测用半导体装置及其制造方法

    公开(公告)号：US4972241A

    公开(公告)日：1990-11-20

    申请号：US234652

    申请日：1988-08-22

    申请人： Toshikazu Fukuda ,  Toru Suga ,  Yutaka Tomisawa

    发明人： Toshikazu Fukuda ,  Toru Suga ,  Yutaka Tomisawa

    IPC分类号： H01L43/02 ,  H01L43/00 ,  H01L43/06 ,  H01L43/14

    CPC分类号： H01L43/14 ,  H01L43/06 ,  H01L43/065

    摘要： A chip including a Hall element for detecting a magnetic force is p repared. On the chip is formed an unhardened magnetic resin layer, which is formed of a mixture of soft magnetic powder an dsilicone rubber. The unhardened magnetic resin layer is applied with a magnetic field and is stretched in a direction perpendicular to one face of the chip, so that its top portion is formed in a substantially conical shape and its bottom portion is formed in a substantially rectangular block, the ratio of the length Wa of its base to its height Wb, Wb/Wa, being equal to or greater than 1. The magnetic resin layer is then hardened. As a result, a magnetic force detecting semiconductor device is provided, which has a magnetic resin layer with a high magnetic force convergence that has its top portion formed in a conical shape and its bottom portion formed in a rectangular block, the ratio of the length of its base to its height being equal to and greater than 1.

    Method for manufacturing semiconductor device
    4.
    发明授权
    Method for manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US4784718A

    公开(公告)日：1988-11-15

    申请号：US16770

    申请日：1987-02-19

    申请人： Tatsuro Mitani ,  Toshikazu Fukuda

    发明人： Tatsuro Mitani ,  Toshikazu Fukuda

    IPC分类号： H01L29/872 ,  H01L21/338 ,  H01L29/47 ,  H01L29/812 ,  H01L21/00 ,  B44C1/22 ,  C03C15/00 ,  H01L21/306

    CPC分类号： H01L29/66871

    摘要： Disclosed is a semiconductor device with its gate electrode and source/drain extraction electrodes being made of the same material on a GaAs substrate, and with its source/drain heavily doped regions, which are formed by doping Se in a lightly doped semiconductor layer on the GaAs substrate, self-aligned with both gate electrode and source/drain extraction electrodes.

    摘要翻译： 公开了一种半导体器件，其栅电极和源极/漏极引出电极由GaAs衬底上的相同材料制成，并且其源极/漏极重掺杂区域通过将掺杂Se掺入到轻掺杂半导体层中而形成 GaAs衬底，与栅极电极和源极/漏极引出电极自对准。

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08030713B2

    公开(公告)日：2011-10-04

    申请号：US12401698

    申请日：2009-03-11

    申请人： Takayuki Hiraoka ,  Toshikazu Fukuda

    发明人： Takayuki Hiraoka ,  Toshikazu Fukuda

    IPC分类号： H01L27/088

    CPC分类号： H01L21/823418 ,  H01L21/823412 ,  H01L27/0251 ,  H01L27/088 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/11 ,  H01L27/1116 ,  H01L29/7848

    摘要： A silicon-germanium non-formation region not formed with a silicon germanium layer and a silicon-germanium formation region formed with a silicon germanium layer are provided in a silicon chip, an internal circuit and an input/output buffer are arranged in the silicon-germanium formation region, and a pad electrode and an electrostatic protection element are arranged in the silicon-germanium non-formation region.

    摘要翻译： 未形成硅锗层的硅锗非形成区域和形成有硅锗层的硅锗形成区域设置在硅芯片中，内部电路和输入/输出缓冲器布置在硅 - 锗形成区域，以及焊盘电极和静电保护元件布置在硅 - 锗非形成区域中。

    SEMICONDUCTOR STORAGE DEVICE
    8.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 失效
    半导体存储设备

    公开(公告)号：US20120236661A1

    公开(公告)日：2012-09-20

    申请号：US13237269

    申请日：2011-09-20

    申请人： Toshikazu Fukuda

    发明人： Toshikazu Fukuda

    IPC分类号： G11C8/16 ,  G11C7/06

    CPC分类号： G11C7/222 ,  G11C11/412

    摘要： According to one embodiment, when a row address of a port A matches a row address of a port B, a memory cell is accessed only from the port A by controlling a word line potential of the port A based on a third clock, and data is exchanged between a bit line of the port A and the port A based on a first clock and data is exchanged between the bit line of the port A and the port B based on a second clock.

    摘要翻译： 根据一个实施例，当端口A的行地址与端口B的行地址匹配时，仅通过基于第三时钟控制端口A的字线电位而仅从端口A访问存储器单元，并且数据 基于第一时钟在端口A的位线和端口A之间交换数据，并且基于第二时钟在端口A的位线和端口B之间交换数据。