ELECTRICAL ASSEMBLY COMPRISING A METAL BODY ARRANGED ON A SEMICONDUCTOR CHIP AND A CONNECTING MATERIAL ARRANGED BETWEEN THE SEMICONDUCTOR CHIP AND THE METAL BODY AND CONNECTING THEM
    12.
    发明申请
    ELECTRICAL ASSEMBLY COMPRISING A METAL BODY ARRANGED ON A SEMICONDUCTOR CHIP AND A CONNECTING MATERIAL ARRANGED BETWEEN THE SEMICONDUCTOR CHIP AND THE METAL BODY AND CONNECTING THEM 审中-公开
    包括设置在半导体芯片上的金属体和在半导体芯片和金属体之间设置的连接材料并连接它们的电气组件

    公开(公告)号:WO2018015156A1

    公开(公告)日:2018-01-25

    申请号:PCT/EP2017/066786

    申请日:2017-07-05

    摘要: Electrical assembly (10) comprising a semiconductor chip (20), a metal body (30) arranged on the semiconductor chip (20), and a connecting material (40) (in particular, a sintering material) arranged between the semiconductor chip (20) and the metal body (30) and serving for connecting the semiconductor chip (20) to the metal body (30), wherein the metal body (30) has a first section (30a) arranged above the connecting material (40), a second section (30b) arranged in a manner surrounding the connecting material (40) and touching the semiconductor chip (20), and a third section (30c) connecting the first section (30a) to the second section (30b). In particular, a portion (40a) of the sintering material (40) which is arranged adjacent to the second section (30b), and in particular in the region of the third section (30c) of the metal body (30), is more compressed than the portion (40b) of the sintering material (40) arranged centrally below the first section (30a) of the metal body (30). The connecting layer (40), that is sensitive to crack initiations against environmental influences, is thus shielded by virtue of the fact that the metal body (30) covering the connecting layer (40) is pressed onto the semiconductor chip (20) with its sections extending beyond the area of the connecting layer (40). The metal body (30) additionally acts as a barrier to environmental influences otherwise acting in the direction of the connecting layer (40). Crack initiation or a corrosive attack by external influences is effectively minimized by this design.

    摘要翻译: 包括半导体芯片(20),布置在半导体芯片(20)上的金属体(30)以及布置在半导体芯片(20)之间的连接材料(40)(特别是烧结材料)的电气组件(10) )和金属体(30)之间并用于将半导体芯片(20)连接到金属体(30),其中金属体(30)具有布置在连接材料(40)上方的第一部分(30a) 以包围连接材料40并接触半导体芯片20的方式布置的第二部分30b以及将第一部分30a连接到第二部分30b的第三部分30c。 特别地,与金属体(30)的第二部分(30b)相邻并且特别是在第三部分(30c)的区域中布置的烧结材料(40)的一部分(40a)更多 (30)的第一部分(30a)下方中央的烧结材料(40)的部分(40b)被压缩。 因此,由于覆盖连接层(40)的金属体(30)以其覆盖半导体芯片(20)的方式被压在半导体芯片(20)上,因此屏蔽了对抗环境影响的开裂引发的连接层 延伸超出连接层(40)的区域。 金属体(30)另外用作对环境影响的屏障,否则沿连接层(40)的方向作用。 这种设计有效降低了裂纹萌生或外部影响的腐蚀性攻击。

    METHOD FOR MANUFACTURING A CIRCUIT CARRIER
    14.
    发明申请
    METHOD FOR MANUFACTURING A CIRCUIT CARRIER 审中-公开
    制造电路载体的方法

    公开(公告)号:WO2016184645A1

    公开(公告)日:2016-11-24

    申请号:PCT/EP2016/059236

    申请日:2016-04-26

    IPC分类号: H01L21/48

    CPC分类号: H01L21/4846 H01L23/142

    摘要: A method for manufacturing a circuit carrier (100') having a base plate (10), an organic insulating foil (20) arranged on the base plate (10) and a metal shaped body (30) arranged on the insulating foil (20), wherein the base plate (10), insulating foil (20) and metal shaped body (30) are connected to each other by applying a quasi-hydrostatic pressure acting from the top while maintaining an even insulating foil layer thickness.

    摘要翻译: 一种制造具有基板(10),布置在基板(10)上的有机绝缘箔(20)和布置在绝缘箔(20)上的金属体)的电路载体(100')的方法, 其特征在于,所述基板(10),绝缘箔(20)和金属成形体(30)通过施加从顶部起作用的准静水压力相互连接,同时保持均匀的绝缘箔层厚度。

    POWER MODULE
    15.
    发明申请
    POWER MODULE 审中-公开
    电源模块

    公开(公告)号:WO2016128231A1

    公开(公告)日:2016-08-18

    申请号:PCT/EP2016/051875

    申请日:2016-01-29

    摘要: A power module (10) having a leadframe (20), a power semiconductor (30) arranged on the leadframe (20), a base plate (40) for dispersing heat generated by the power semiconductor (30) and a potting compound (50) surrounding the leadframe (20) and the power semiconductor (30), that physically connects the power semiconductor (30) and/or the leadframe (20) to the base plate (40).

    摘要翻译: 具有引线框架(20)的功率模块(10),布置在引线框架(20)上的功率半导体(30)),用于分散由功率半导体(30)产生的热量的基板(40)和灌封化合物 )包围引线框架(20)和功率半导体(30),其将功率半导体(30)和/或引线框(20)物理连接到基板(40)。

    SINTERING DEVICE
    16.
    发明申请
    SINTERING DEVICE 审中-公开
    烧结装置

    公开(公告)号:WO2016050466A1

    公开(公告)日:2016-04-07

    申请号:PCT/EP2015/070617

    申请日:2015-09-09

    IPC分类号: H01L21/67 H01L21/60

    摘要: Sintering device (10) for sintering at least one electronic assembly (BG), having a lower die (20) and an upper die (30) which is slidable towards the lower die (20), or a lower die (20) which is slidable towards the upper die (30), wherein the lower die (20) forms a support for the assembly (BG) to be sintered and the upper die (30) comprises a receptacle which receives a pressure pad (32) for exerting pressure directed towards the lower die (20) and which comprises a delimitation wall (34) which laterally surrounds the pressure pad (32), and wherein the delimitation wall (34) has an outer delimitation wall (34a) and an inner delimitation wall (34b) which is surrounded in an adjacent manner by the outer delimitation wall (34a), and wherein the inner delimitation wall (34b) is mounted so as to be slidable towards the outer delimitation wall (34a) and, when pressure in the direction of the upper die (30) is exerted on the pressure pad (32), is mounted so as to be slid in the direction of the lower die (20), whereby, following the placing of the inner delimitation wall (34b) on the lower die (20), the pressure pad (32) is displaceable in the direction of the lower die (20).

    摘要翻译: 一种用于烧结至少一个电子组件(BG)的烧结装置(10),具有可向下模具(20)滑动的下模具(20)和上模具(30),或下模具(20) 可向上模具(30)滑动,其中下模具(20)形成用于要烧结的组件(BG)的支撑件,并且上模具(30)包括接收压力垫(32)的容器,用于施加压力 朝向下模具(20)并且其包括侧向围绕压力垫(32)的分隔壁(34),并且其中定界壁(34)具有外部限定壁(34a)和内部限定壁(34b) 其被外部限定壁(34a)相邻地包围,并且其中内部限定壁(34b)被安装成能够朝向外部限定壁(34a)滑动,并且当在上部方向上的压力 模具(30)被施加在压力垫(32)上,安装成沿着方向o滑动 在下模具(20)上,由此,在将内部定界壁(34b)放置在下模具(20)上之后,压力垫(32)能够在下模具(20)的方向上移动。

    METHOD FOR CONNECTING A FIRST ELECTRONIC COMPONENT WITH A SECOND ELECTRONIC COMPONENT

    公开(公告)号:WO2021052752A1

    公开(公告)日:2021-03-25

    申请号:PCT/EP2020/074397

    申请日:2020-09-02

    IPC分类号: B22F7/06 H01L23/00

    摘要: A method for connecting a first electronic component with a second electronic component, whereby an electrically conducting bond is formed between the first and the second electronic components by means of sintering a metallic sinter material that is disposed between the first electronic component and the second electronic component and which is characterized by these steps: fastening at least a plurality of metal bodies that are distributed across the area of the surface of one of the electronic components while maintaining the clearances that are disposed between the metal bodies on the electronic component, or fastening a metal body that extends in one plane on the electronic component, wherein the metal body includes sections thereon that are disposed opposite each other while maintaining at least one of the clearances disposed between the sections, application of the sinter material across the area of at least one of the electronic components, and forming an electrically conducting bond between the surface of the electronic component with the plurality of metal bodies thereon and the other electronic component by means of sintering the sinter material.