SEALED LIQUID-FILLED MODULE AND METHOD OF FORMING SAME
    41.
    发明申请
    SEALED LIQUID-FILLED MODULE AND METHOD OF FORMING SAME 审中-公开
    密封液体填充模块及其形成方法

    公开(公告)号:WO00060914A1

    公开(公告)日:2000-10-12

    申请号:PCT/US1999/007275

    申请日:1999-04-01

    Abstract: Cooling liquids such as fluorocarbons are enclosed within a module containing electronic components (12) on a printed wiring board (11). Preferably top and bottom covers (26, 16) are applied to the top and bottom of the board (11) and liquid-sealed thereto. Hot-melt adhesive (34, 34a) is used for the seal. Each edge of a cover has an outward-extending flange (19, 19a) formed with a peripheral downward turned lip. Heated adhesive (34, 34a) is applied to the board in a continuous bead around the flange (19, 19a), the thickness of the bead being greater than the height of the lip (21).

    Abstract translation: 诸如碳氟化合物之类的冷却液被封装在包含印刷线路板(11)上的电子部件(12)的模块内。 优选地,顶盖和底盖(26,16)施加到板(11)的顶部和底部并液体密封到其上。 热熔胶(34,34a)用于密封。 盖的每个边缘具有形成有外围向下转动的唇缘的向外延伸的凸缘(19,19a)。 加热粘合剂(34,34a)以围绕凸缘(19,19a)的连续的胎圈施加到板上,胎圈的厚度大于唇缘(21)的高度。

    SEMICONDUCTOR PACKAGES INTERCONNECTABLY MOUNTED ON UNDERLYING SUBSTRATES AND METHODS OF PRODUCING SAME
    43.
    发明申请
    SEMICONDUCTOR PACKAGES INTERCONNECTABLY MOUNTED ON UNDERLYING SUBSTRATES AND METHODS OF PRODUCING SAME 审中-公开
    半导体封装在不同的基板上相互连接和生产的方法

    公开(公告)号:WO9828954A3

    公开(公告)日:1998-10-15

    申请号:PCT/US9722446

    申请日:1997-12-09

    Applicant: LSI LOGIC CORP

    CPC classification number: H01L23/04 H01L23/055 H01L2224/16 H01L2924/15311

    Abstract: This invention relates to a method and system for producing a secmiconductor package interconnectably mounted on a semiconductor package substrate (14) without substantial package warpage, and to a method for using a stiffener member (20) to reliably overcome such substantial package warpage. The subject method comprises providing a semiconductor package and a semiconductor package substrate having respective first and second major sides. A stiffener member (20) is attached to the semiconductor package substrate to provide the requisite support for the semiconductor package substrate during the assembly process and thereby counteract the sources of the package warpage problem. A protective outer layer can be optionally added to the subject system.

    ARRANGEMENT FOR ENCASING A FUNCTIONAL DEVICE, AND A PROCESS FOR THE PRODUCTION OF SAME
    46.
    发明申请
    ARRANGEMENT FOR ENCASING A FUNCTIONAL DEVICE, AND A PROCESS FOR THE PRODUCTION OF SAME 审中-公开
    用于加强功能装置的装置及其制造方法

    公开(公告)号:WO1992020096A1

    公开(公告)日:1992-11-12

    申请号:PCT/NO1992000085

    申请日:1992-05-05

    Inventor: SENSONOR A.S

    Abstract: The invention relates to an arrangement for the encasing of a functional device, e.g., a semiconductor element, a semiconductor-based element, a sensor element, a microactuator, or an electronic circuit consisting of one or more integrated circuits and other electronic components, and a process for preparing an arrangement of this kind. Around the functional device (47) is arranged a casing (43, 45) which forms a closed cavity (51) which completely or partly surrounds the functional device (47). The casing is made of a plastic material or another polymer material. The casing consists of two or more joined components (43, 45). Metal parts which form wire bonds (46) with said functional device (47) in the casing pass through the walls of said casing. At least one of the casing pass through the walls of said casing. At least one of the casing components has filling holes or filling ducts (52, 53) for the introduction of liquid and/or gel material (56) into said cavity, and the filling holes or filling canals are sealed (54, 55) after the volume of the cavity has been filled with said liquid or gel.

    Abstract translation: 本发明涉及一种用于封装诸如半导体元件,基于半导体的元件,传感器元件,微致动器或由一个或多个集成电路和其他电子元件组成的电子电路的功能器件的布置,以及 准备这种安排的过程。 在功能装置(47)周围设置有形成完全或部分围绕功能装置(47)的闭合腔(51)的壳体(43,45)。 外壳由塑料材料或另一种聚合物材料制成。 壳体由两个或更多个连接的部件(43,45)组成。 与壳体中的功能装置(47)形成线接合(46)的金属部件穿过所述壳体的壁。 壳体中的至少一个穿过所述壳体的壁。 至少一个壳体部件具有用于将液体和/或凝胶材料(56)引入所述空腔中的填充孔或填充管道(52,53),并且填充孔或填充通道在之后密封(54,55) 空腔的体积已经用所述液体或凝胶填充。

    半導体素子収納用パッケージおよび半導体装置
    50.
    发明申请
    半導体素子収納用パッケージおよび半導体装置 审中-公开
    外壳半导体元件和半导体器件封装

    公开(公告)号:WO2017038582A1

    公开(公告)日:2017-03-09

    申请号:PCT/JP2016/074664

    申请日:2016-08-24

    Inventor: 浅野 稔弘

    CPC classification number: H01L23/02 H01L23/04 H01L31/02 H01S5/022

    Abstract: 半導体素子収納用パッケージにおいて周壁体は、第1壁体と、第2壁体と、第3壁体と、第4壁体とから成る。第1壁体は、第1嵌合部、第2嵌合部および貫通開口が設けられている。第2壁体は、該第1壁体に対向する。第3壁体は、第1壁体および第2壁体に隣接する。第3壁体は、第3端部に第1嵌合部と嵌合する第3嵌合部が設けられ、第4端部が第2壁体に一体的に連なり、第4壁体は、第5端部に第2嵌合部と嵌合する第4嵌合部が設けられ、第6端部が第2壁体に一体的に連なる。

    Abstract translation: 用于容纳半导体元件的该封装的周壁由第一壁,第二壁,第三壁和第四壁组成。 第一壁设有第一装配部分,第二装配部分和通孔。 第二个墙面向第一个墙。 第三壁与第一壁和第二壁相邻。 在第三壁上,与第一装配部配合的第三装配部设置在第三端部,第四端部与第二壁一体地连接。 在第四壁上,与第二配合部配合的第四嵌合部设置在第五端部,第六端部与第二壁一体地连接。

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