公开(公告)号：WO2004077546A3

公开(公告)日：2005-05-19

申请号：PCT/EP2004000263

申请日：2004-01-15

Applicant: SIEMENS AG ,  WEIDNER KARL ,  WOLFGANG ECKHARD ,  ZAPF JOERG

Inventor： WEIDNER KARL ,  WOLFGANG ECKHARD ,  ZAPF JOERG

IPC: H01L21/60 ,  H01L21/68 ,  H01L23/482

CPC classification number: H01L23/4822 ,  H01L21/568 ,  H01L21/6835 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/82001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01061 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: A self-supporting contacting structure is directly produced on a component that does not have a housing by applying a layer made of nonconducting material and a layer made of an electrically conductive material to the component and to a support and by subsequently removing these layers from said support.

Abstract translation: 制造（2）具有Kontaktierstruktur，一个装置的方法，其中所述组分（2）具有电接触表面（210），其特征在于， - 层（3）的组件上的电绝缘材料（2）和一个在和/ 布置或分量载波（1）被施加， - 电接触表面（210）的组件的层的应用过程中至少部分地保持无（3）电绝缘材料和/或所述层（3）的施加之后的电绝缘 材料暴露， - 导电材料的层（4）的层上的电绝缘材料和所述部件的电接触表面（210）的（3）被施加， - 其中，所述层（3）的从载体电绝缘材料 （1）被分离。

公开(公告)号：WO2004077547A3

公开(公告)日：2005-05-19

申请号：PCT/EP2004000574

申请日：2004-01-23

Applicant: SIEMENS AG ,  SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG

Inventor： SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG

IPC: H01L21/60 ,  H01L23/373 ,  H01L23/538

CPC classification number: H01L23/3735 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24011 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15798 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/48

Abstract: According to the invention, a layer made of an electrically insulating material (3) is applied to a substrate (1) and a component (2) that is arranged thereupon in such way that said layer follows the surface contour formed by the substrate and the component.

Abstract translation: 在基板（1）和设置在其上的装置（2），电绝缘材料（3）被施加，使得它们连接到由基板和元件形成如下所述表面轮廓的层。

公开(公告)号：WO03030247A3

公开(公告)日：2003-10-09

申请号：PCT/DE0203615

申请日：2002-09-25

Applicant: SIEMENS AG ,  HAESE KERSTIN ,  AMIGUES LAURENCE ,  SCHWARZBAUER HERBERT ,  SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG ,  REBHAN MATTHIAS

Inventor： HAESE KERSTIN ,  AMIGUES LAURENCE ,  SCHWARZBAUER HERBERT ,  SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG ,  REBHAN MATTHIAS

IPC: H01L23/051 ,  H01L23/373 ,  H01L23/482 ,  H01L25/07 ,  H01L25/18 ,  H05K1/03 ,  H05K3/10 ,  H05K3/32 ,  H05K3/46 ,  H01L21/60 ,  H01L23/538

CPC classification number: H05K3/4605 ,  H01L23/051 ,  H01L23/3735 ,  H01L23/482 ,  H01L24/24 ,  H01L24/82 ,  H01L25/072 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K3/108 ,  H05K3/32 ,  H05K3/4632 ,  H05K2201/0129 ,  H05K2201/0154 ,  H05K2203/068 ,  H05K2203/085 ,  H05K2203/1469 ,  H01L2924/00 ,  H01L2224/48

Abstract: The invention relates to a method for contacting electrical contact surfaces (21, 112) on a surface (20) of a substrate (1). According to said method, a film (3) based on polyimide or epoxy is laminated onto the surface, under a vacuum, in such a way that the film closely covers the surface comprising the contact surfaces and adheres to the same. Each contact surface to be contacted on the surface is uncovered by opening respective windows (31) in the film, and a contact is established in a plane manner between each uncovered contact surface and a layer (4) of metal. The inventive method is used to establish a large-surface contact for power semiconductor chips, enabling a high current density.

Abstract translation: 在用于在基板的一个表面（20）上接触的电接触表面（21，112）的方法（1）在真空下在聚酰亚胺或环氧树脂层压的薄膜（3）的表面上，使得与接触表面的薄膜表面 紧紧覆盖并粘附到该表面上，各接触面以在表面上通过在露出的箔打开相应窗口（31）相接触，并且每个暴露的接触表面用由金属制成的表面层（4）接触。 应用：功率半导体芯片的大面积接触，这允许高电流密度。

公开(公告)号：WO2005050746A3

公开(公告)日：2005-07-28

申请号：PCT/EP2004052676

申请日：2004-10-27

Applicant: SIEMENS AG ,  OSRAM OPTO SEMICONDUCTORS GMBH ,  GUENTHER EWALD ,  SORG JOERG-ERICH ,  WEIDNER KARL ,  ZAPF JOERG

Inventor： GUENTHER EWALD ,  SORG JOERG-ERICH ,  WEIDNER KARL ,  ZAPF JOERG

IPC: H01L33/44 ,  H01L33/46 ,  H01L33/48 ,  H01L33/62 ,  H01L33/00 ,  H01L31/02 ,  H01L31/0203 ,  H01S5/02 ,  H01S5/042

CPC classification number: H01L33/486 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L31/0203 ,  H01L33/44 ,  H01L33/46 ,  H01L33/62 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/76155 ,  H01L2224/82039 ,  H01L2224/82102 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/15747 ,  H01L2924/181 ,  Y10T428/24331 ,  H01L2224/82 ,  H01L2924/00

Abstract: The invention relates to a product comprising a substrate with an opto-electronic component which is contacted in a planar manner.

Abstract translation: 一种制品，包括具有接触平面的光电元件的基板。

公开(公告)号：WO2004077548A3

公开(公告)日：2005-05-12

申请号：PCT/EP2004000629

申请日：2004-01-26

Applicant: SIEMENS AG ,  SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG

Inventor： SELIGER NORBERT ,  WEIDNER KARL ,  ZAPF JOERG

IPC: H01L21/60 ,  H01L23/538 ,  H01L25/07 ,  H01L23/60

CPC classification number: H01L24/82 ,  H01L23/5389 ,  H01L24/24 ,  H01L25/072 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2224/48 ,  H01L2924/00 ,  H01L2924/2076 ,  H01L2924/01004 ,  H01L2924/00015

Abstract: The invention relates to a method for producing a device comprising a component (2) that is located on a substrate (1). The substrate (1) and component (2) form a surface contour and the component (2) comprises an electrical contact surface (210). According to said method: a layer (3) of electrically insulating material is applied to the substrate (1) and the component (2) located thereon, in such a way that said layer (3) follows the surface contour formed by the substrate (1) and the component (2); the electrical contact surface (210) of the component remains at least partially uncovered during the application of the layer (3) of electrically insulating material and/or is exposed after the application of said layer (3); and a layer (4) of electrically conductive material is applied to the layer (3) consisting of electrically insulating material and the electrical contact surface (210) of the component.

Abstract translation: 形成用于制造（1），其设置部件的基板上具有的装置的方法（2），该衬底（1）和组分（2）具有表面轮廓，并且其中所述组分（2）具有电接触表面（210），其中 - （3）的基板（1）和所述部件上的电绝缘材料（2）被施加，其中，所述层（3）的电绝缘基板（1）和组分的材料（2）形成的表面轮廓如下的层 - 至少部分地保持，该部件的电接触表面（210）的层的应用期间（3）的电绝缘材料 - 自由的和/或电绝缘材料（3）露出的层之后， - 导电材料的层（4） 被施加到电绝缘材料层（3）和所述装置的电接触表面（210）。

公开(公告)号：WO2005013363A3

公开(公告)日：2005-09-15

申请号：PCT/EP2004051458

申请日：2004-07-12

Applicant: SIEMENS AG ,  EUPEC GMBH & CO KG ,  WOLFGANG ECKHARD ,  ZAPF JOERG ,  GUTSMANN BERND ,  AUERBACH FRANZ ,  LICHT THOMAS ,  SELIGER NORBERT

Inventor： WOLFGANG ECKHARD ,  ZAPF JOERG ,  GUTSMANN BERND ,  AUERBACH FRANZ ,  LICHT THOMAS ,  SELIGER NORBERT

IPC: H01L21/60 ,  H01L23/538 ,  H01L25/07 ,  H01L25/16 ,  H05K1/16 ,  H05K3/32

CPC classification number: H05K1/16 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/072 ,  H01L25/16 ,  H01L2224/2402 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/81801 ,  H01L2224/82 ,  H01L2224/85 ,  H01L2224/86 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  H05K3/32 ,  H05K2203/1469 ,  H01L2924/00

Abstract: The invention relates to a circuit arrangement (1) placed on a substrate (2) and comprising at least one semiconductor component (3) arranged on the substrate and having at least one electrical contact surface (31) and at least one connection line (4) also arranged on the substrate and used to electrically contact the contact surface of the semiconductor component. Said circuit arrangement is characterised in that the connection line (4) forms part (51) of a discrete, passive electrical component (5) arranged on the substrate (2). The electrical contacting of the contact surface (31) of the semiconductor component is carried out during a step of the process and the part (51) of the discrete, passive electrical component (5) is produced. To this end, especially a film consisting of an electrically insulating material is applied to the semiconductor component (3) embodied as a power semiconductor and to the substrate (2) under a vacuum, and the contact surface of the power semiconductor is then bared. Furthermore, the connection line (4) is produced, whereby the electrical contacting of the contact surface (31) of the semiconductor component is carried out and the part (51) of the discrete, passive electrical component is produced.

Abstract translation: 本发明涉及一种电路装置（1）的基板（2）上具有至少一个设置在所述基板的半导体元件（3）上具有至少一个电接触面（31）和至少一个设置在基板的连接线（4），用于的接触面电接触 半导体装置。 的电路装置的特征在于，所述连接线（4）是被布置在所述基板（2）上的离散的，无源电元件（5）的成分（51）。 在处理步骤中，半导体元件的接触表面（3）的电接触和分立的部件（51），（5）中产生的无源电组件。 用于此目的的电绝缘材料制成的膜，特别在真空下在设计为功率半导体半导体部件（3）和所述基板（2），并随后暴露功率半导体的接触表面上。 此外，将生成的连接线（4），由此，半导体元件和分立的部件（51）的接触表面（31）的电接触，无源电气部件被形成。

公开(公告)号：WO2013024129A2

公开(公告)日：2013-02-21

申请号：PCT/EP2012065981

申请日：2012-08-16

Applicant: SIEMENS AG ,  SCHIEBER MARKUS ,  HEDLER HARRY ,  ZAPF JOERG

Inventor： SCHIEBER MARKUS ,  HEDLER HARRY ,  ZAPF JOERG

IPC: B06B1/06

CPC classification number: B06B1/0629 ,  H01L21/6835 ,  H01L23/367 ,  H01L23/473 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/0348 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/13111 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/83005 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2224/83

Abstract: The invention relates to an arrangement having a sensor and/or actuator having an active surface area having sensor/actuator elements, having chips having electrical and/or electronic circuits, wherein a top of the chips has electrical contacts for the circuits, wherein the top is bounded by lateral faces, wherein the chips have the tops arranged parallel to one another, wherein first lateral faces of the chips face the sensor and/or actuator, wherein the sensor or actuator is fixed to the first lateral faces of the chips, wherein electrical lines are provided which are routed from the first lateral face of the chip to the contacts of the chip, wherein the sensor and/or actuator is/are electrically conductively connected to the electrical lines of the chips.

Abstract translation: 本发明涉及一种具有传感器和/或具有与传感器/致动器元件的有源区域的致动器的布置中，具有电和/或电子电路模块，具有在其上表面的电路，其特征在于，侧表面的上侧上的电触点块 是有限的，其特征在于，所述块被布置成与上表面互相平行，所述块的第一侧面面向所述传感器和/或致动器，其中，所述传感器或致动器被固定到所述块，其中，设置的电导线的第一侧表面 块的第一侧表面被引导到块体的接触，其中，所述传感器和/或致动器被电传导地连接到块的电气线路。

公开(公告)号：WO2008092740A3

公开(公告)日：2008-09-18

申请号：PCT/EP2008050403

申请日：2008-01-15

Applicant: SIEMENS AG ,  LENK ANDREAS ,  SCHUH CARSTEN ,  GANSTER AXEL ,  KORNELY SUSANNE ,  MANTOVAN ANDREAS ,  ZAPF JOERG

Inventor： LENK ANDREAS ,  SCHUH CARSTEN ,  GANSTER AXEL ,  KORNELY SUSANNE ,  MANTOVAN ANDREAS ,  ZAPF JOERG

IPC: H01L41/083 ,  H01L41/273 ,  H01L41/293

CPC classification number: H01L41/273 ,  H01L41/293 ,  Y10T29/42 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49163

Abstract: The present invention discloses various production methods for producing a piezoceramic multilayer actuator. In the course of the production method, multilayer locks (10) are electrochemically or mechanically processed in such a way that a recess structure is obtained. The lateral surfaces (22; 24) of the electrodes (20) inside these recesses are electrically insulated using the slip casting method in order to be able to contact the remaining electrodes by imprinting an outer metallization.

Abstract translation: 本发明公开了制造压电陶瓷多层致动器的各种方法。 在生产过程中，多层条（10）以电化学或机械方式进行处理，从而形成水槽结构。 在这些凹陷（40）内的电极（20）的侧表面（22; 24）通过流延铸造而电绝缘，以便能够通过印刷外部金属化物来接触剩余的电极。

公开(公告)号：WO2011039070A3

公开(公告)日：2011-05-26

申请号：PCT/EP2010063811

申请日：2010-09-20

Applicant: SIEMENS AG ,  HEDLER HARRY ,  ZAPF JOERG

Inventor： HEDLER HARRY ,  ZAPF JOERG

IPC: B81C99/00

CPC classification number: B81C99/0085 ,  B81B2203/0361 ,  B81B2207/056 ,  Y10T29/49826 ,  Y10T428/24355

Abstract: The invention relates to a three-dimensional micro-structure comprising a plurality of adjacent micro-columns which are arranged at a distance from each other and essentially parallel in relation to the respective longitudinal extension, said micro-columns being made of at least one micro-column material having respectively an aspect ratio in the region of 20 - 1000 and respectively a micro-column diameter in the region of 0,1 µm - 200 µm, and a micro-column intermediate chamber arranged between adjacent micro-columns having a micro-column distance selected from between the adjacent micro-columns in the region of 1 µm - 100 µm. The invention also relates to a method for producing the three-dimensional micro-structures according to the following steps: a) a template is provided with template material, said template having a three-dimensional structure with column-like template cavities essentially inverse for the micro-structure, b) the micro-column material is arranged in the column-like cavities such that the micro-columns are formed, and c) the template material is at least partially removed. A silicon wafer is preferably used as the template. In order to provide the template, the PAECE (Photo Assisted Electro-Chemical Etching) method is used. Said invention enables micro-structures with extremely large surfaces to be produced.

Abstract translation: 本发明涉及一种包括多个并排的三维微结构，相对于它们各自的微柱纵向延伸实质上平行于彼此且相互间隔开的微柱与至少一个微柱的材料，各自具有的纵横比 具有20至1000，并且每个具有从0.1微米至200微米范围内的微柱的直径，并且被设置为一个的相邻微柱之间的相邻微柱的微柱间距之间 范围为1微米至100微米选用微型柱间距。 这里还提供了一种制造配备有以下工艺步骤的三维微结构的方法，包括：a）提供具有模板材料，其中基本上在微观结构的掩模具有与柱状模板空腔逆三维模板结构的模板， b）在柱状腔的微柱的材料的放置，从而使微柱形成，以及c）至少部分地去除所述模板材料。 作为模板，硅晶片，优选使用。 为了提供对paece模板（照片辅助电化学刻蚀）方法排序。 通过本发明，具有非常大的表面微结构被实现。

公开(公告)号：WO03038897A3

公开(公告)日：2003-08-28

申请号：PCT/DE0203296

申请日：2002-09-06

Applicant: SIEMENS AG ,  CLEMENS WOLFGANG ,  FIX WALTER ,  ZAPF JOERG

Inventor： CLEMENS WOLFGANG ,  FIX WALTER ,  ZAPF JOERG

IPC: B42D15/10 ,  G06K19/077 ,  H01L27/28 ,  H01L51/05 ,  H05K1/14 ,  H05K1/16 ,  H05K3/36 ,  H01L25/16 ,  H01L21/98 ,  H01L27/00

CPC classification number: H01L27/28 ,  H01L25/16 ,  H01L51/0508 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a novel concept for the production of an encapsulated and at least partly organic electronic unit. Said unit embodies a novel concept for the combination of different electronic components to form an electronic unit, such as antennae, diodes (rectifier diodes and/or light-emitting diodes), transistors etc. and a circuit which is optimised therefor. According to the invention, similar components of the unit and/or the circuit are combined to form an arrangement on a substrate (region) and/or in an encapsulation, said arrangements being then electronically interconnected.

Abstract translation: 本发明涉及用于实现封装的和至少部分有机的电子部件的新概念。 这包括将各种电子组件与电子组件（例如天线，二极管（整流器和/或发光二极管），晶体管等）以及为此目的而优化的电路组合的新概念。 为此目的，部件和/或基板（区域）上的电路的类似部件和/或捆扎在封装中以形成组，然后以电子方式互连。