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公开(公告)号：US12072600B2
公开(公告)日：2024-08-27
申请号：US17852173
申请日：2022-06-28
Inventor： Hyun Soo Kim , Duk Jun Kim , Dong-Young Kim , Ho Sung Kim , Yongsoon Baek , Jang Uk Shin , Young-Tak Han , Won Seok Han
Abstract: Disclosed are a Mach-Zehnder interferometric optical modulator and a method for manufacturing the same. The modulator includes first and second lower clad layers, a core layer, an upper clad layer, a waveguide, and electrodes. The waveguide may include an input waveguide, a waveguide divider, branch waveguides, and a waveguide combiner. Each of the branch waveguides includes first and second connection regions connected to the waveguide combiner and the waveguide divider, respectively, and a phase shift region having a cross-section of a reverse mesa structure that has an upper width that is the same as widths of the first and second connection regions and a lower width that is smaller than the widths of the first and second connection regions.
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公开(公告)号：US10649139B2
公开(公告)日：2020-05-12
申请号：US16215416
申请日：2018-12-10
Inventor： Duk Jun Kim , Young-Ho Ko , Dong-Young Kim , Jong-Hoi Kim , Yongsoon Baek , Jung-Ho Song , Dong Hyo Lee , Byung-Seok Choi , Won Seok Han
Abstract: An optical waveguide structure includes a substrate and a core structure disposed on the substrate. The substrate includes a first waveguide region, a second waveguide region, and a transition region between the first waveguide region and the second waveguide region. The core structure includes first core segments arranged in a first direction and a second direction crossing the first direction on the transition region. The core structure includes second core segments arranged in the first direction and the second direction on the second waveguide region. The first direction and the second direction are parallel to a top surface of the substrate.
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公开(公告)号：US09837719B2
公开(公告)日：2017-12-05
申请号：US15229891
申请日：2016-08-05
Inventor： Dong-Young Kim , Dong Min Kang , Seong-Il Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Ho Kyun Ahn , Hyung Sup Yoon , Sang-Heung Lee , Jong Min Lee , Jong-Won Lim , Yoo Jin Jang , Hyun Wook Jung , Kyu Jun Cho , Chull Won Ju
CPC classification number: H01Q9/0407 , H01Q1/50 , H01Q9/0442
Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the multilayered substrate.
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公开(公告)号：US20230073881A1
公开(公告)日：2023-03-09
申请号：US17852173
申请日：2022-06-28
Inventor： Hyun Soo KIM , Duk Jun Kim , Dong-Young Kim , Ho Sung Kim , Youngsoon Baek , Jang Uk Shin , Young-Tak Han , Won Seok Han
Abstract: Disclosed are a Mach-Zehnder interferometric optical modulator and a method for manufacturing the same. The modulator includes first and second lower clad layers, a core layer, an upper clad layer, a waveguide, and electrodes. The waveguide may include an input waveguide, a waveguide divider, branch waveguides, and a waveguide combiner. Each of the branch waveguides includes first and second connection regions connected to the waveguide combiner and the waveguide divider, respectively, and a phase shift region having a cross-section of a reverse mesa structure that has an upper width that is the same as widths of the first and second connection regions and a lower width that is smaller than the widths of the first and second connection regions.
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公开(公告)号：US10134854B2
公开(公告)日：2018-11-20
申请号：US15248676
申请日：2016-08-26
Inventor： Ho Kyun Ahn , Dong Min Kang , Yong-Hwan Kwon , Dong-Young Kim , Seong Il Kim , Hae Cheon Kim , Eun Soo Nam , Jae Won Do , Byoung-Gue Min , Hyung Sup Yoon , Sang-Heung Lee , Jong Min Lee , Jong-Won Lim , Hyun Wook Jung , Kyu Jun Cho
IPC: H01L29/40 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
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Patent Agency Ranking
6.发明授权Wafer level packaged GaN power semiconductor device and the manufacturing method thereof 有权晶圆级封装GaN功率半导体器件及其制造方法公开(公告)号：US09012920B2
公开(公告)日：2015-04-21
申请号：US13867328
申请日：2013-04-22
Inventor： Chull Won Ju , Hae Cheon Kim , Hyung Sup Yoon , Woo Jin Chang , Sang-Heung Lee , Dong-Young Kim , Jong-Won Lim , Dong Min Kang , Ho Kyun Ahn , Jong Min Lee , Eun Soo Nam
IPC: H01L29/20 , H01L29/66 , H01L29/417 , H01L29/778 , H01L23/00
CPC classification number: H01L29/2003 , H01L24/05 , H01L24/06 , H01L24/16 , H01L29/41758 , H01L29/66431 , H01L29/66462 , H01L29/7787 , H01L2224/0401 , H01L2224/05554 , H01L2224/05568 , H01L2224/056 , H01L2224/06135 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/81815 , H01L2924/00014
Abstract: Disclosed are a GaN (gallium nitride) compound power semiconductor device and a manufacturing method thereof. The gallium nitride compound power semiconductor device includes: a gallium nitride compound element formed by being grown on a wafer; a contact pad including a source, a drain, and a gate connecting with the gallium nitride compound element; a module substrate to which the nitride gallium compound element is flip-chip bonded; a bonding pad formed on the module substrate; and a bump formed on the bonding pad of the module substrate so that the contact pad and the bonding pad are flip-chip bonded. By this configuration, it is possible to reduce the process costs by forming the bump on the substrate based on the wafer level, rapidly emit the heat generated from an AlGaN HEMT device by forming the sub source contact pad and the sub drain contact pad of the substrate in the active region, and efficiently emit the heat generated from the AlGaN HEMT device by forming a via hole on the substrate and filling the via hole with the conductive metal.
Abstract translation: 公开了一种GaN（氮化镓）复合功率半导体器件及其制造方法。 氮化镓化合物功率半导体器件包括：通过在晶片上生长形成的氮化镓复合元素; 包括源极，漏极和与氮化镓复合元件连接的栅极的接触焊盘; 将氮化镓化合物元件倒装芯片接合的模块基板; 形成在所述模块基板上的焊盘; 以及形成在模块基板的焊盘上的凸点，使得接触焊盘和焊盘被倒装芯片接合。 通过这种结构，可以通过基于晶片级在基板上形成凸块来降低处理成本，通过形成子源接触焊盘和子漏极接触焊盘，快速地发射由AlGaN HEMT器件产生的热量 衬底，并且通过在衬底上形成通孔并用导电金属填充通孔，从而有效地发射由AlGaN HEMT器件产生的热量。
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公开(公告)号：US11605900B2
公开(公告)日：2023-03-14
申请号：US17528033
申请日：2021-11-16
Inventor： Dong-Young Kim , Mugeon Kim , Kyung Hyun Park , Dong Woo Park , Eui Su Lee , Il Min Lee
Abstract: An antenna structure includes a dielectric lens, an antenna substrate on the dielectric lens, and antenna electrodes on the antenna substrate. Each of the antenna electrodes may include a wire electrode and an empty plane having a triangular shape defined by the wire electrode. The antenna structure can reduce periodic reflection of a high frequency signal, suppress a periodic gain reduction phenomenon, and provide flat gain characteristics in a wide frequency band.
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公开(公告)号：US09780176B2
公开(公告)日：2017-10-03
申请号：US15238492
申请日：2016-08-16
Inventor： Jong Min Lee , Byoung-Gue Min , Hyung Sup Yoon , Dong Min Kang , Dong-Young Kim , Seong-Il Kim , Hae Cheon Kim , Jae Won Do , Ho Kyun Ahn , Sang-Heung Lee , Jong-Won Lim , Hyun Wook Jung , Kyu Jun Cho , Chull Won Ju
IPC: H01L29/40 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
CPC classification number: H01L29/408 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7786 , H01L29/7787
Abstract: The present invention relates to a high reliability field effect power device and a manufacturing method thereof. A method of manufacturing a field effect power device includes sequentially forming a transfer layer, a buffer layer, a barrier layer and a passivation layer on a substrate, patterning the passivation layer by etching a first region of the passivation layer, and forming at least one electrode on the first region of the barrier layer exposed by patterning the passivation layer, wherein the first region is provided to form the at least one electrode, and the passivation layer may include a material having a wider bandgap than the barrier layer to prevent a trapping effect and a leakage current of the field effect power device.
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公开(公告)号：US10608102B2
公开(公告)日：2020-03-31
申请号：US16137235
申请日：2018-09-20
Inventor： Hokyun Ahn , Min Jeong Shin , Jeong Jin Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Hyung Sup Yoon , Hyung Seok Lee , Jong-Won Lim , Sungjae Chang , Hyunwook Jung , Kyu Jun Cho , Dong Min Kang , Dong-Young Kim , Seong-Il Kim , Sang-Heung Lee , Jongmin Lee , Hong Gu Ji
IPC: H01L29/78 , H01L29/45 , H01L29/778 , H01L29/66 , H01L21/3065 , H01L29/417 , H01L29/06 , H01L29/20 , H01L29/423
Abstract: Provided is a semiconductor device including a substrate in which an insulation layer is disposed between a first semiconductor layer and a second semiconductor layer, a through-hole penetrating through the substrate, the through-hole having a first hole penetrating through the first semiconductor layer and a second hole penetrating through the insulation layer and the second semiconductor layer from a bottom surface of the first hole, an epi-layer disposed inside the through-hole, a drain electrode disposed inside the second hole and contacting one surface of the epi-layer, and a source electrode and a gate electrode which are disposed on the other surface of the epi-layer.
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公开(公告)号：US10256811B2
公开(公告)日：2019-04-09
申请号：US15654792
申请日：2017-07-20
Inventor： Woojin Chang , Jong-Won Lim , Dong Min Kang , Dong-Young Kim , Seong-il Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Min Jeong Shin , Hokyun Ahn , Hyung Sup Yoon , Sang-Heung Lee , Jongmin Lee , Sungjae Chang , Yoo Jin Jang , Hyunwook Jung , Kyu Jun Cho , Hong Gu Ji
IPC: H03K17/687 , H03K17/693 , G11C5/14 , H03K19/0175 , H03K3/353 , H03K17/0812 , H03K17/10 , H03K17/12 , H03K17/14 , H03K17/16 , H03K17/28
Abstract: Provided is a cascode circuit including first and second transistors connected between a drain terminal and a source terminal in cascode form, a level sifter configured to change a voltage level of a switching control signal applied to a gate terminal and provide the changed switching control signal to a gate of the first transistor, a buffer configured to delay the switching control signal and provide the delayed switching control signal to a gate of the second transistor, and a first resistor connected between the level shifter and the gate of the first transistor.
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