公开(公告)号：US10164596B2

公开(公告)日：2018-12-25

申请号：US15691249

申请日：2017-08-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H03H7/00 ,  H03H9/00 ,  H03H3/007 ,  H03H9/56 ,  H03H9/10 ,  H03H9/24 ,  G06F17/50 ,  H03H3/08 ,  H03H9/02 ,  H03H9/54 ,  H03H9/64 ,  H03H9/15 ,  H03H3/02

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

公开(公告)号：US10020789B2

公开(公告)日：2018-07-10

申请号：US14840834

申请日：2015-08-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H03H9/54 ,  H03H3/08 ,  H03H3/007 ,  H03H9/56 ,  H03H9/10 ,  H03H9/24 ,  G06F17/50 ,  H03H9/02 ,  H03H9/64 ,  H03H3/02 ,  H03H9/15

CPC classification number: H03H3/007 ,  G06F17/5063 ,  H03H3/02 ,  H03H3/08 ,  H03H9/02007 ,  H03H9/02244 ,  H03H9/02992 ,  H03H9/1071 ,  H03H9/2447 ,  H03H9/2452 ,  H03H9/2457 ,  H03H9/2463 ,  H03H9/54 ,  H03H9/56 ,  H03H9/64 ,  H03H2003/022 ,  H03H2003/023 ,  H03H2003/027 ,  H03H2009/155 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49155

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.

公开(公告)号：US09935600B2

公开(公告)日：2018-04-03

申请号：US14940815

申请日：2015-11-13

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H03H9/64 ,  H03H3/04 ,  H03H3/08 ,  H03H9/05 ,  H03H9/10 ,  H01L41/09 ,  B81B7/00 ,  B81B7/02 ,  G06F17/50 ,  H03H9/48 ,  H03H9/54 ,  H01P1/205

CPC classification number: H03H3/04 ,  B81B7/008 ,  B81B7/02 ,  G06F17/5045 ,  H01L41/094 ,  H01L41/0973 ,  H03H3/08 ,  H03H9/0542 ,  H03H9/0547 ,  H03H9/1064 ,  H03H9/1092 ,  H03H9/48 ,  H03H9/542 ,  H03H9/6403 ,  H03H9/6423 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49156

Abstract: Switchable and/or tunable filters, methods of manufacture and design structures are disclosed herein. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed on a piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam formed above the piezoelectric substrate and at a location in which, upon actuation, the MEMS beam shorts the piezoelectric filter structure by contacting at least one of the plurality of electrodes.

公开(公告)号：US09786835B2

公开(公告)日：2017-10-10

申请号：US14712092

申请日：2015-05-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  H01L21/768 ,  H01L23/48 ,  H03H9/64 ,  G06F17/50 ,  H01L23/00 ,  H01L41/08 ,  H01L41/25 ,  H01L27/06 ,  H01L49/02 ,  H01L23/66 ,  H01L25/16

CPC classification number: H01L41/293 ,  G06F17/5063 ,  G06F17/5068 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/24 ,  H01L25/16 ,  H01L27/0694 ,  H01L28/40 ,  H01L41/0815 ,  H01L41/25 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/24145 ,  H01L2225/06548 ,  H03H9/64

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

公开(公告)号：US20150243879A1

公开(公告)日：2015-08-27

申请号：US14712092

申请日：2015-05-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： James W. Adkisson ,  Panglijen Candra ,  Thomas J. Dunbar ,  Jeffrey P. Gambino ,  Mark D. Jaffe ,  Anthony K. Stamper ,  Randy L. Wolf

IPC: H01L41/293 ,  G06F17/50 ,  H01L23/00 ,  H01L41/08 ,  H01L41/25

CPC classification number: H01L41/293 ,  G06F17/5063 ,  G06F17/5068 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/66 ,  H01L24/03 ,  H01L24/05 ,  H01L24/24 ,  H01L25/16 ,  H01L27/0694 ,  H01L28/40 ,  H01L41/0815 ,  H01L41/25 ,  H01L2224/03009 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/24145 ,  H01L2225/06548 ,  H03H9/64

Abstract: A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.

Abstract translation: 在半导体衬底的背面上的集成射频（RF）滤波器的设计结构包括：在衬底的第一侧上的器件; 在衬底的背面上的射频（RF）滤波器; 以及至少一个衬底导体，其从所述衬底的前侧延伸到所述衬底的所述背面并将所述RF滤波器电耦合到所述器件。

公开(公告)号：US20140353725A1

公开(公告)日：2014-12-04

申请号：US13904304

申请日：2013-05-29

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Peng Cheng ,  Vibhor Jain ,  Vikas Kumar Kaushal ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/66

CPC classification number: H01L29/737 ,  H01L29/66242 ,  H01L29/7371

Abstract: Disclosed are devices and methods of forming the devices wherein pair(s) of first openings are formed through a dielectric layer and a first semiconductor layer into a substrate and, within the substrate, the first openings of each pair are expanded laterally and merged to form a corresponding trench. Dielectric material is deposited, filling the upper portions of the first openings and creating trench isolation region(s). A second semiconductor layer is deposited and second opening(s) are formed through the second semiconductor and dielectric layers, exposing monocrystalline portion(s) of the first semiconductor layer between the each pair of first openings. A third semiconductor layer is epitaxially deposited with a polycrystalline section on the second semiconductor layer and monocrystalline section(s) on the exposed monocrystalline portion(s) of the first semiconductor layer. A crystallization anneal is performed and a device (e.g., a bipolar device) is formed incorporating the resulting monocrystalline second and third semiconductor layers.

Abstract translation: 公开了形成器件的器件和方法，其中第一开口的一对通过电介质层形成，第一半导体层形成到衬底中，并且在衬底内，每对的第一开口横向膨胀并且形成 相应的沟槽。 沉积电介质材料，填充第一开口的上部并产生沟槽隔离区。 沉积第二半导体层，并且通过第二半导体和电介质层形成第二开口，使第一半导体层的单晶部分暴露在每对第一开口之间。 第三半导体层在第二半导体层上的多晶部分和第一半导体层的暴露的单晶部分上的单晶部分外延沉积。 进行结晶退火，并且形成结合所得单晶第二和第三半导体层的器件（例如，双极器件）。

公开(公告)号：US20150357447A1

公开(公告)日：2015-12-10

申请号：US14300944

申请日：2014-06-10

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  David L. Harame ,  Michael L. Kerbaugh ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L29/732 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/732 ,  H01L29/04 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/45 ,  H01L29/456 ,  H01L29/66242 ,  H01L29/66287 ,  H01L29/7327 ,  H01L29/7371 ,  H01L29/7378

Abstract: The present disclosure relates to integrated circuit (IC) structures and methods of forming the same. An IC structure according to the present disclosure can include: a doped substrate region adjacent to an insulating region; a crystalline base structure including: an intrinsic base region located on and contacting the doped substrate region, the intrinsic base region having a first thickness; an extrinsic base region adjacent to the insulating region, wherein the extrinsic base region has a second thickness greater than the first thickness; a semiconductor layer located on the intrinsic base region of the crystalline base structure; and a doped semiconductor layer located on the semiconductor layer.

Abstract translation: 本公开涉及集成电路（IC）结构及其形成方法。 根据本公开的IC结构可以包括：与绝缘区域相邻的掺杂衬底区域; 晶体基底结构，其包括：位于掺杂衬底区域上并与其接触的本征基极区域，本征基极区域具有第一厚度; 与所述绝缘区域相邻的外部基极区域，其中所述非本征基极区域具有大于所述第一厚度的第二厚度; 位于所述晶体基底结构的本征基极区上的半导体层; 以及位于半导体层上的掺杂半导体层。

公开(公告)号：US20150348876A1

公开(公告)日：2015-12-03

申请号：US14825778

申请日：2015-08-13

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Yoba Amoah ,  Jeffrey P. Gambino ,  Christine A. Leggett ,  Max L. Lifson ,  Charles F. Musante ,  Sruthi Samala ,  David C. Thomas

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method including forming a through-substrate via through a thickness of a substrate, the thickness of the substrate is measured from a front side of the substrate to a back side of the substrate, removing a first portion of the substrate to form an opening in the back side of the substrate such that a second portion of the substrate remains in direct contact surrounding a vertical sidewall of the through-substrate via, and filling the opening with an alternate material having a lower modulus of elasticity than the substrate.

Abstract translation: 一种包括通过基板的厚度形成贯通基板的方法，从基板的前侧到基板的背面测量基板的厚度，去除基板的第一部分以形成开口 衬底的背面，使得衬底的第二部分保持与贯穿衬底通孔的垂直侧壁直接接触，并用与衬底相比具有较低弹性模量的替代材料填充该开口。

公开(公告)号：US09202900B2

公开(公告)日：2015-12-01

申请号：US14500021

申请日：2014-09-29

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  Kevin K. Chan ,  David L. Harame ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L29/10 ,  H01L29/737 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/16 ,  H01L29/732 ,  H01L21/8228

CPC classification number: H01L29/7371 ,  H01L21/82285 ,  H01L29/0649 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/16 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7378

Abstract: A method of forming a heterojunction bipolar transistor. The method includes providing a structure comprising at least an intrinsic base region and an emitter pedestal region. A stack is formed on the intrinsic base region. The stack comprises a polysilicon layer and a top sacrificial oxide layer. A trench is formed in the structure. The trench circumscribes the intrinsic base region and the stack. An extrinsic base is formed at two regions around the stack. The extrinsic base is formed by a selective epitaxial growth process to create a bridge over the trench. The bridge connects the two regions. An opening is provided in the stack. The opening exposes a portion of the intrinsic base region. An emitter is formed in the opening.

Abstract translation: 一种形成异质结双极晶体管的方法。 该方法包括提供包括至少本征基极区域和发射极基座区域的结构。 在本征基区上形成堆叠。 堆叠包括多晶硅层和顶部牺牲氧化物层。 在结构中形成沟槽。 沟槽围绕内在的基极区域和叠层。 在堆叠周围的两个区域形成一个非本征基。 外部基极通过选择性外延生长工艺形成，以在沟槽上形成桥。 桥梁连接两个地区。 在堆栈中提供一个开口。 开口暴露了内在基础区域的一部分。 在开口中形成发射体。

公开(公告)号：US09093491B2

公开(公告)日：2015-07-28

申请号：US13705717

申请日：2012-12-05

Applicant: International Business Machines Corporation

Inventor： James W. Adkisson ,  James R. Elliott ,  David L. Harame ,  Marwan H. Khater ,  Robert K. Leidy ,  Qizhi Liu ,  John J. Pekarik

IPC: H01L21/8222 ,  H01L29/73 ,  H01L29/737 ,  H01L29/04 ,  H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/0649 ,  H01L29/045 ,  H01L29/0804 ,  H01L29/0817 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242 ,  H01L29/66257 ,  H01L29/66287 ,  H01L29/73 ,  H01L29/7325 ,  H01L29/7375

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. The device structure includes a collector region, an intrinsic base formed on the collector region, an emitter coupled with the intrinsic base and separated from the collector by the intrinsic base, and an isolation region extending through the intrinsic base to the collector region. The isolation region is formed with a first section having first sidewalls that extend through the intrinsic base and a second section with second sidewalls that extend into the collector region. The second sidewalls are inclined relative to the first sidewalls. The isolation region is positioned in a trench that is formed with first and second etching process in which the latter etches different crystallographic directions of a single-crystal semiconductor material at different etch rates.

Abstract translation: 双极结晶体管的制造方法，器件结构和设计结构。 器件结构包括集电极区域，形成在集电极区域上的本征基极，与本征基极耦合并与集电极与本征基极分离的发射极，以及延伸穿过本征基极到集电极区域的隔离区域。 隔离区形成有具有延伸穿过本征基底的第一侧壁的第一部分和具有延伸到收集器区域中的第二侧壁的第二部分。 第二侧壁相对于第一侧壁倾斜。 隔离区域位于形成有第一和第二蚀刻工艺的沟槽中，其中后者以不同的蚀刻速率蚀刻单晶半导体材料的不同晶体方向。