公开(公告)号：US12272540B2

公开(公告)日：2025-04-08

申请号：US18470975

申请日：2023-09-20

Applicant: Soitec

Inventor： Pascal Guenard ,  Marcel Broekaart ,  Thierry Barge

IPC: H01L21/02 ,  H10N30/072 ,  H10N30/50 ,  H10N30/853 ,  H03H9/02

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.

公开(公告)号：US10943778B2

公开(公告)日：2021-03-09

申请号：US15743004

申请日：2016-07-13

Applicant: Soitec

Inventor： Pascal Guenard ,  Marcel Broekaart ,  Thierry Barge

IPC: H01L21/02 ,  H01L41/312 ,  H01L41/083 ,  H01L41/187 ,  H03H9/02

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.

公开(公告)号：US20150155331A1

公开(公告)日：2015-06-04

申请号：US14409650

申请日：2013-06-18

Applicant: Soitec

Inventor： Pascal Guenard

IPC: H01L27/15 ,  H01L33/12 ,  H01L33/00 ,  H01L33/62

CPC classification number: H01L27/153 ,  H01L27/156 ,  H01L31/02008 ,  H01L31/075 ,  H01L31/1892 ,  H01L33/005 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/12 ,  H01L33/20 ,  H01L33/385 ,  H01L33/62 ,  H01L2933/0016 ,  H01L2933/0033 ,  H01L2933/0066 ,  Y02E10/548

Abstract: The disclosure relates to a method of collective manufacturing of light-emitting diode (LED) devices comprising formation of elemental structures, each comprising an n-type layer, an active layer and a p-type layer, the method comprising: —reduction of the lateral dimensions of part of each elemental LED structure; —formation of a portion of insulating material on the sides of the elemental structures; —formation of n-type electrical contact pads and p-type electrical contact pads; —deposition of a conductive material layer; on the elemental structures and polishing of the conductive material layer; and—bonding by molecular adhesion of a second substrate on the polished surface of the structure.

Abstract translation: 本公开涉及一种集体制造发光二极管（LED）装置的方法，包括形成元件结构，每个元件结构包括n型层，活性层和p型层，该方法包括： - 还原 每个元件LED结构的一部分的横向尺寸; 在元件结构的侧面上形成绝缘材料的一部分; n型电接触焊盘和p型电接触焊盘的形状; - 导电材料层的沉积; 在导电材料层的元素结构和抛光上; 并且通过第二基底的分子粘附在结构的抛光表面上进行粘合。

公开(公告)号：US20150115290A1

公开(公告)日：2015-04-30

申请号：US14405632

申请日：2013-06-14

Applicant: Soitec

Inventor： Pascal Guenard

IPC: H01L33/32 ,  H01L27/15 ,  H01L31/0304 ,  H01L27/142 ,  H01L33/00 ,  H01L31/18

CPC classification number: H01L33/62 ,  H01L25/042 ,  H01L25/0753 ,  H01L27/142 ,  H01L27/153 ,  H01L27/156 ,  H01L31/02008 ,  H01L31/03044 ,  H01L31/03048 ,  H01L31/035236 ,  H01L31/0543 ,  H01L31/055 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1844 ,  H01L31/1848 ,  H01L31/1852 ,  H01L31/1864 ,  H01L31/1892 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/32 ,  H01L33/44 ,  H01L33/46 ,  H01L33/502 ,  H01L33/58 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/3512 ,  H01L2933/0016 ,  Y02E10/52 ,  Y02E10/548

Abstract: The invention disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.

Abstract translation: 本发明涉及一种制造方法，包括在第一衬底上形成元素LED或光伏结构，每个包括至少一个p型层，活性区和n型层，在第一衬底上形成第一平面金属层 元件结构，提供包括第二平面金属层的转移衬底，通过在室温下通过分子粘合键合第一和第二金属层以及去除第一衬底，将元件结构与转移衬底的组合。

公开(公告)号：US20230378931A1

公开(公告)日：2023-11-23

申请号：US18352972

申请日：2023-07-14

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: H03H9/02 ,  H03H3/02 ,  H03H9/17 ,  H03H9/145 ,  H10N30/072 ,  H10N30/87 ,  H03H9/64 ,  A61B5/00 ,  H03H9/25 ,  H03H9/56 ,  A61B5/145 ,  A61B5/1459 ,  H03H3/04 ,  H03H9/13 ,  H10N39/00 ,  H03H3/10 ,  H10N30/085

CPC classification number: H03H9/02834 ,  H03H3/02 ,  H03H9/02102 ,  H03H9/17 ,  H03H9/145 ,  H10N30/072 ,  H10N30/87 ,  H03H9/6489 ,  A61B5/685 ,  H03H9/25 ,  H03H9/56 ,  A61B5/14546 ,  A61B5/1459 ,  H03H3/04 ,  H03H9/13 ,  H03H9/02574 ,  H10N39/00 ,  H03H3/10 ,  H10N30/085 ,  H03H2003/0407 ,  A61B2562/0204

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.

公开(公告)号：US20210121103A1

公开(公告)日：2021-04-29

申请号：US17141065

申请日：2021-01-04

Applicant: Soitec

Inventor： Marcel Broekaart ,  Thierry Barge ,  Pascal Guenard ,  Ionut Radu ,  Eric Desbonnets ,  Oleg Kononchuk

IPC: A61B5/1459 ,  A61B5/00 ,  A61B5/145

Abstract: A substrate for a surface acoustic wave device or bulk acoustic wave device, comprising a support substrate and an piezoelectric layer on the support substrate, wherein the support substrate comprises a semiconductor layer on a stiffening substrate having a coefficient of thermal expansion that is closer to the coefficient of thermal expansion of the material of the piezoelectric layer than that of silicon, the semiconductor layer being arranged between the piezoelectric layer and the stiffening substrate.

公开(公告)号：US20210066063A1

公开(公告)日：2021-03-04

申请号：US17095550

申请日：2020-11-11

Applicant: Soitec

Inventor： Pascal Guenard ,  Marcel Broekaart ,  Thierry Barge

IPC: H01L21/02 ,  H01L41/312 ,  H01L41/083 ,  H01L41/187

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.

公开(公告)号：US09865786B2

公开(公告)日：2018-01-09

申请号：US15332412

申请日：2016-10-24

Applicant: Soitec

Inventor： Pascal Guenard

IPC: H01L33/00 ,  H01L33/62 ,  H01L31/02 ,  H01L31/075 ,  H01L31/18 ,  H01L27/142 ,  H01L27/15 ,  H01L31/0304 ,  H01L33/32 ,  H01L33/44 ,  H01L31/054 ,  H01L31/056 ,  H01L25/04 ,  H01L25/075 ,  H01L31/0352 ,  H01L31/055 ,  H01L33/06 ,  H01L33/12 ,  H01L33/46 ,  H01L33/50 ,  H01L33/58 ,  H01L33/20

CPC classification number: H01L33/62 ,  H01L25/042 ,  H01L25/0753 ,  H01L27/142 ,  H01L27/153 ,  H01L27/156 ,  H01L31/02008 ,  H01L31/03044 ,  H01L31/03048 ,  H01L31/035236 ,  H01L31/0543 ,  H01L31/055 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1844 ,  H01L31/1848 ,  H01L31/1852 ,  H01L31/1864 ,  H01L31/1892 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/32 ,  H01L33/44 ,  H01L33/46 ,  H01L33/502 ,  H01L33/58 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/3512 ,  H01L2933/0016 ,  Y02E10/52 ,  Y02E10/548

Abstract: The disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.

公开(公告)号：US20170040518A1

公开(公告)日：2017-02-09

申请号：US15332412

申请日：2016-10-24

Applicant: Soitec

Inventor： Pascal Guenard

IPC: H01L33/62 ,  H01L33/12 ,  H01L33/32 ,  H01L33/06 ,  H01L33/46 ,  H01L33/50 ,  H01L33/58 ,  H01L25/075 ,  H01L31/18 ,  H01L31/0304 ,  H01L31/02 ,  H01L31/0352 ,  H01L31/056 ,  H01L31/055 ,  H01L31/054 ,  H01L25/04 ,  H01L33/00

CPC classification number: H01L33/62 ,  H01L25/042 ,  H01L25/0753 ,  H01L27/142 ,  H01L27/153 ,  H01L27/156 ,  H01L31/02008 ,  H01L31/03044 ,  H01L31/03048 ,  H01L31/035236 ,  H01L31/0543 ,  H01L31/055 ,  H01L31/056 ,  H01L31/075 ,  H01L31/1844 ,  H01L31/1848 ,  H01L31/1852 ,  H01L31/1864 ,  H01L31/1892 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/06 ,  H01L33/12 ,  H01L33/20 ,  H01L33/32 ,  H01L33/44 ,  H01L33/46 ,  H01L33/502 ,  H01L33/58 ,  H01L2224/18 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/3512 ,  H01L2933/0016 ,  Y02E10/52 ,  Y02E10/548

Abstract: The disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.

Abstract translation: 本公开涉及一种制造方法，包括在第一衬底上形成元素LED或光伏结构，每个包括至少一个p型层，活性区和n型层，在第一衬底上形成第一平面金属层 元件结构，提供包括第二平面金属层的转移衬底，通过在室温下通过分子粘合键合第一和第二金属层以及去除第一衬底，将元件结构与转移衬底的组合。

公开(公告)号：US11837463B2

公开(公告)日：2023-12-05

申请号：US17095550

申请日：2020-11-11

Applicant: Soitec

Inventor： Pascal Guenard ,  Marcel Broekaart ,  Thierry Barge

IPC: H01L21/02 ,  H10N30/50 ,  H10N30/072 ,  H10N30/853 ,  H03H9/02

CPC classification number: H01L21/02002 ,  H01L21/02367 ,  H01L21/02436 ,  H10N30/072 ,  H10N30/50 ,  H10N30/8542 ,  H03H9/02574

Abstract: A method for manufacturing a substrate includes the following steps: (a) providing a support substrate with a first coefficient of thermal expansion, having on one of its faces a first plurality of trenches parallel to each other in a first direction, and a second plurality of trenches parallel to each other in a second direction; (b) transferring a useful layer from a donor substrate to the support substrate, the useful layer having a second coefficient of thermal expansion; wherein an intermediate layer is inserted between the front face of the support substrate and the useful layer, the intermediate layer having a coefficient of thermal expansion between the first and second coefficients of thermal expansion.