公开(公告)号：US20130161788A1

公开(公告)日：2013-06-27

申请号：US13725132

申请日：2012-12-21

申请人： Sung-Hoon Chun ,  Hye-Jin Kim ,  Sang-Ho An ,  Kyung-Man Kim ,  Seok-Chan Lee

发明人： Sung-Hoon Chun ,  Hye-Jin Kim ,  Sang-Ho An ,  Kyung-Man Kim ,  Seok-Chan Lee

IPC分类号： H01L23/50

CPC分类号： H01L23/50 ,  H01L23/5223 ,  H01L23/525 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L28/40 ,  H01L2224/02166 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/06102 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/05552

摘要： Semiconductor packages including stacked semiconductor chips are provided. The semiconductor packages may include first semiconductor chips and a second semiconductor chip that are stacked sequentially on a board. The semiconductor packages may also include a wiring layer on the memory chips and the wiring layer may include redistribution patterns and redistribution pads. Each of the memory chips may include a data pad. The data pads of the first semiconductor chips may be electrically connected to the board via the second semiconductor chip, some of redistribution patterns, and some of redistribution pads.

摘要翻译： 提供包括堆叠半导体芯片的半导体封装。 半导体封装可以包括顺序堆叠在板上的第一半导体芯片和第二半导体芯片。 半导体封装还可以包括存储器芯片上的布线层，并且布线层可以包括再分配图案和再分布垫。 每个存储器芯片可以包括数据焊盘。 第一半导体芯片的数据焊盘可以经由第二半导体芯片电连接到板，一些再分布图案和一些再分布焊盘。

公开(公告)号：US09496216B2

公开(公告)日：2016-11-15

申请号：US13725132

申请日：2012-12-21

申请人： Sung-Hoon Chun ,  Hye-Jin Kim ,  Sang-Ho An ,  Kyung-Man Kim ,  Seok-Chan Lee

发明人： Sung-Hoon Chun ,  Hye-Jin Kim ,  Sang-Ho An ,  Kyung-Man Kim ,  Seok-Chan Lee

IPC分类号： H01L21/02 ,  H01L23/50 ,  H01L25/065 ,  H01L25/18 ,  H01L23/522 ,  H01L49/02 ,  H01L23/00 ,  H01L23/525

CPC分类号： H01L23/50 ,  H01L23/5223 ,  H01L23/525 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L28/40 ,  H01L2224/02166 ,  H01L2224/02375 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/06102 ,  H01L2224/06135 ,  H01L2224/131 ,  H01L2224/16135 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49177 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/05552

摘要： Semiconductor packages including stacked semiconductor chips are provided. The semiconductor packages may include first semiconductor chips and a second semiconductor chip that are stacked sequentially on a board. The semiconductor packages may also include a wiring layer on the memory chips and the wiring layer may include redistribution patterns and redistribution pads. Each of the memory chips may include a data pad. The data pads of the first semiconductor chips may be electrically connected to the board via the second semiconductor chip, some of redistribution patterns, and some of redistribution pads.

摘要翻译： 提供包括堆叠半导体芯片的半导体封装。 半导体封装可以包括顺序堆叠在板上的第一半导体芯片和第二半导体芯片。 半导体封装还可以包括存储器芯片上的布线层，并且布线层可以包括再分配图案和再分布垫。 每个存储器芯片可以包括数据焊盘。 第一半导体芯片的数据焊盘可以经由第二半导体芯片电连接到板，一些再分布图案和一些再分布焊盘。

公开(公告)号：US08648451B2

公开(公告)日：2014-02-11

申请号：US13088576

申请日：2011-04-18

申请人： Seok-Chan Lee

发明人： Seok-Chan Lee

IPC分类号： H01L21/66 ,  H01L23/495

CPC分类号： G01R1/0466

摘要： Provided are a socket, a semiconductor package, a test device and a method of manufacturing a semiconductor package. A socket to test a semiconductor package comprising a housing, a trench receiving a semiconductor package in the housing, at least one probe connected to the semiconductor package at a bottom of the trench, and at least one connector electrically connecting a plurality of contact points exposed at a side of the semiconductor package when the semiconductor package is inserted into the trench. A semiconductor package with contacts exposed from a side of a package substrate, and a method of manufacturing such a semiconductor package are also disclosed.

摘要翻译： 提供了一种插座，半导体封装，测试装置和半导体封装的制造方法。 一种用于测试半导体封装的插座，包括壳体，在壳体中接收半导体封装的沟槽，在沟槽的底部连接到半导体封装的至少一个探针，以及至少一个连接器，电连接多个接触点暴露 在半导体封装被插入到沟槽中时在半导体封装的一侧。 还公开了一种从封装基板侧暴露的触点的半导体封装以及制造这种半导体封装的方法。

公开(公告)号：US08217519B2

公开(公告)日：2012-07-10

申请号：US12968592

申请日：2010-12-15

申请人： Seok-Chan Lee ,  Min-Woo Kim

发明人： Seok-Chan Lee ,  Min-Woo Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/5286 ,  H01L23/3121 ,  H01L23/481 ,  H01L23/522 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/731 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： A multi-chip package is provided. The multi-chip package includes: a first semiconductor chip including first circuitry, a first chip terminal in communication with the first circuitry, a first surface, and conductor means for transmitting at least one of a signal and power; a second semiconductor chip attached above the first surface of the first semiconductor chip, the second semiconductor chip including second circuitry and a second chip terminal in communication with the second circuitry; and an electrical connection connecting the second chip terminal of the second semiconductor chip to the conductor means of the first semiconductor chip; wherein the conductor means is dedicated to the second semiconductor chip and does not transmit either a signal or power to or from the remainder of the first semiconductor chip.

摘要翻译： 提供了多芯片封装。 多芯片封装包括：第一半导体芯片，包括第一电路，与第一电路通信的第一芯片端子，第一表面和用于发射信号和功率中的至少一个的导体装置; 第二半导体芯片，其附接在第一半导体芯片的第一表面上方，第二半导体芯片包括第二电路和与第二电路通信的第二芯片端子; 以及将第二半导体芯片的第二芯片端子连接到第一半导体芯片的导体装置的电连接; 其中所述导体装置专用于所述第二半导体芯片，并且不向所述第一半导体芯片的其余部分传输信号或电力。

公开(公告)号：US20110176280A1

公开(公告)日：2011-07-21

申请号：US13005101

申请日：2011-01-12

申请人： Seok-Chan Lee

发明人： Seok-Chan Lee

IPC分类号： H05K7/20

CPC分类号： H01L25/105 ,  H01L23/34 ,  H01L23/3672 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2225/1082 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1515 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K7/20 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor package including a first printed circuit board and a second printed circuit board is provided. The first printed circuit board may include a first surface upon which a first semiconductor chip is mounted and a second surface upon which at least one connecting structure is attached. The first printed circuit board may further include at least one thermal via and a heat sink and the at least one thermal via and the heat sink may be disposed under the first semiconductor chip with the heat sink being disposed between the first surface and the second surface. The second printed circuit board may include a third surface upon which a second semiconductor chip is mounted. The second printed circuit board may be disposed under the first printed circuit board with the at least one connecting structure connecting the first printed circuit board to the second printed circuit board.

摘要翻译： 提供了包括第一印刷电路板和第二印刷电路板的堆叠半导体封装。 第一印刷电路板可以包括安装有第一半导体芯片的第一表面和附接有至少一个连接结构的第二表面。 第一印刷电路板还可以包括至少一个热通孔和散热器，并且所述至少一个热通孔和所述散热器可以设置在所述第一半导体芯片下方，所述散热器设置在所述第一表面和所述第二表面之间 。 第二印刷电路板可以包括安装有第二半导体芯片的第三表面。 第二印刷电路板可以设置在第一印刷电路板下方，其中至少一个连接结构将第一印刷电路板连接到第二印刷电路板。

公开(公告)号：US20110260309A1

公开(公告)日：2011-10-27

申请号：US13088576

申请日：2011-04-18

申请人： Seok-Chan Lee

发明人： Seok-Chan Lee

IPC分类号： H01L23/495 ,  H01R12/71 ,  H01L21/66

CPC分类号： G01R1/0466

摘要： Provided are a socket, a semiconductor package, a test device and a method of manufacturing a semiconductor package. A socket to test a semiconductor package comprising a housing, a trench receiving a semiconductor package in the housing, at least one probe connected to the semiconductor package at a bottom of the trench, and at least one connector electrically connecting a plurality of contact points exposed at a side of the semiconductor package when the semiconductor package is inserted into the trench. A semiconductor package with contacts exposed from a side of a package substrate, and a method of manufacturing such a semiconductor package are also disclosed.

摘要翻译： 提供了一种插座，半导体封装，测试装置和半导体封装的制造方法。 一种用于测试半导体封装的插座，包括壳体，在壳体中接收半导体封装的沟槽，在沟槽的底部连接到半导体封装的至少一个探针，以及至少一个连接器，电连接多个接触点暴露 在半导体封装被插入到沟槽中时在半导体封装的一侧。 还公开了一种从封装基板侧暴露的触点的半导体封装以及制造这种半导体封装的方法。

公开(公告)号：US20110084396A1

公开(公告)日：2011-04-14

申请号：US12968592

申请日：2010-12-15

申请人： Seok-Chan Lee ,  Min-Woo Kim

发明人： Seok-Chan Lee ,  Min-Woo Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/5286 ,  H01L23/3121 ,  H01L23/481 ,  H01L23/522 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/731 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： A semiconductor package includes a first semiconductor chip mounted on a substrate and a second semiconductor chip mounted on top of the first semiconductor chip. A plurality of metal lines is deposited on the top of the first chip, and the metal lines are isolated from circuitry in the first chip. Wire bonds connect pads on the second chip to metal lines on the first chip. Additional wired bonds connect the metal lines on the first chip to terminals on the substrate. Conductive through-silicon vias or solder bumps may replace the wire bonds, and additional chips may be included in the package.

摘要翻译： 半导体封装包括安装在基板上的第一半导体芯片和安装在第一半导体芯片顶部上的第二半导体芯片。 多个金属线沉积在第一芯片的顶部上，金属线与第一芯片中的电路隔离。 导线将第二芯片上的焊盘连接到第一芯片上的金属线。 附加的有线键将第一芯片上的金属线连接到基板上的端子。 导电穿硅通孔或焊料凸块可以替代引线键合，并且附加的芯片可以包括在封装中。

公开(公告)号：US07888806B2

公开(公告)日：2011-02-15

申请号：US12032430

申请日：2008-02-15

申请人： Seok-Chan Lee ,  Min-Woo Kim

发明人： Seok-Chan Lee ,  Min-Woo Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/5286 ,  H01L23/3121 ,  H01L23/481 ,  H01L23/522 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/731 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： A semiconductor package includes a first semiconductor chip mounted on a substrate and a second semiconductor chip mounted on top of the first semiconductor chip. The first chip includes a plurality of metal lines which may be deposited at its top surface, and the metal lines are isolated from circuitry in the first chip. Wire bonds connect pads on the second chip to metal lines on the first chip. Additional wired bonds connect the metal lines on the first chip to terminals on the substrate. Conductive through-silicon vias or solder bumps may replace the wire bonds, and additional chips may be included in the package.

摘要翻译： 半导体封装包括安装在基板上的第一半导体芯片和安装在第一半导体芯片顶部上的第二半导体芯片。 第一芯片包括可在其顶表面上沉积的多条金属线，金属线与第一芯片中的电路隔离。 导线将第二芯片上的焊盘连接到第一芯片上的金属线。 附加的有线键将第一芯片上的金属线连接到基板上的端子。 导电穿硅通孔或焊料凸块可以替代引线键合，并且附加的芯片可以包括在封装中。

公开(公告)号：US08742593B2

公开(公告)日：2014-06-03

申请号：US13530971

申请日：2012-06-22

申请人： Seok-Chan Lee ,  Min-Woo Kim

发明人： Seok-Chan Lee ,  Min-Woo Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/5286 ,  H01L23/3121 ,  H01L23/481 ,  H01L23/522 ,  H01L23/528 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/731 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2924/00012

摘要： A semiconductor chip is provided. The semiconductor chip includes a semiconductor substrate, a circuit on the substrate, an insulating layer formed on the circuit, and a plurality of electrically floating conductor lines formed on the insulating layer, at a major surface of the semiconductor chip.

摘要翻译： 提供半导体芯片。 半导体芯片包括半导体衬底，衬底上的电路，形成在电路上的绝缘层，以及在半导体芯片的主表面上形成在绝缘层上的多个电浮动导体线。

公开(公告)号：US20110285034A1

公开(公告)日：2011-11-24

申请号：US13154296

申请日：2011-06-06

申请人： Sunpil Youn ,  Seok-Chan Lee

发明人： Sunpil Youn ,  Seok-Chan Lee

IPC分类号： H01L23/48

CPC分类号： H01L23/522 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated

摘要翻译： 导电线形成在包含多个电路的晶片上。 导线与晶片内形成的电路隔离。 芯片安装在晶片上，并且其芯片焊盘连接到晶片的导线。 然后可用包装树脂保护晶片，并将其切片