公开(公告)号：US20130126884A1

公开(公告)日：2013-05-23

申请号：US13299227

申请日：2011-11-17

申请人： Linda Romano ,  Andrew P. Edwards ,  Richard J. Brown ,  David P. Bour ,  Hui Nie ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Mahdan Raj

发明人： Linda Romano ,  Andrew P. Edwards ,  Richard J. Brown ,  David P. Bour ,  Hui Nie ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Mahdan Raj

IPC分类号： H01L29/20 ,  H01L21/302 ,  H01L21/20

CPC分类号： H01L29/7787 ,  H01L21/30621 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/475 ,  H01L29/66212 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/872

摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure.

摘要翻译： 半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。 半导体结构还包括耦合到III族氮化物衬底的第一表面的第一导电类型的III族氮化物外延层和电耦合到III族氮化物衬底的第二表面的第一金属结构。 半导体结构还包括耦合到第一导电类型的III族氮化物外延层的AlGaN外延层和耦合到AlGaN外延层的第二导电类型的III族氮化物外延结构。 III族氮化物外延结构包括至少一个边缘端接结构。

公开(公告)号：US20130075748A1

公开(公告)日：2013-03-28

申请号：US13240877

申请日：2011-09-22

申请人： David P. Bour ,  Richard J. Brown ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Linda Romano ,  Andrew P. Edwards ,  Hui Nie ,  Mahdan Raj

发明人： David P. Bour ,  Richard J. Brown ,  Isik C. Kizilyalli ,  Thomas R. Prunty ,  Linda Romano ,  Andrew P. Edwards ,  Hui Nie ,  Mahdan Raj

IPC分类号： H01L29/207 ,  H01L21/22 ,  H01L21/265

CPC分类号： H01L21/26546 ,  H01L21/0332 ,  H01L21/2258 ,  H01L21/266 ,  H01L21/3245 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer.

公开(公告)号：US20130056743A1

公开(公告)日：2013-03-07

申请号：US13225345

申请日：2011-09-02

申请人： David P. Bour ,  Linda Romano ,  Thomas R. Prunty ,  Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown

发明人： David P. Bour ,  Linda Romano ,  Thomas R. Prunty ,  Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Richard J. Brown

IPC分类号： H01L29/20 ,  H01L21/283

CPC分类号： H01L29/32 ,  H01L21/02389 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/6609 ,  H01L29/66143 ,  H01L29/66212 ,  H01L29/66446 ,  H01L29/66909 ,  H01L29/66924 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/872

摘要： A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer.

公开(公告)号：US20130032812A1

公开(公告)日：2013-02-07

申请号：US13198659

申请日：2011-08-04

申请人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

发明人： Isik C. Kizilyalli ,  Hui Nie ,  Andrew P. Edwards ,  Linda Romano ,  David P. Bour ,  Richard J. Brown ,  Thomas R. Prunty

IPC分类号： H01L29/808 ,  H01L29/20 ,  H01L21/337

CPC分类号： H01L29/66909 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66446 ,  H01L29/66924 ,  H01L29/8083

摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region.

公开(公告)号：US20120118224A1

公开(公告)日：2012-05-17

申请号：US13230573

申请日：2011-09-12

申请人： David P. Bour ,  Alain Duboust ,  Alexey Goder

发明人： David P. Bour ,  Alain Duboust ,  Alexey Goder

IPC分类号： C30B25/16 ,  C30B25/08 ,  C30B25/10 ,  C23C16/06 ,  C23C16/52

CPC分类号： H01L33/0075 ,  C30B25/16 ,  C30B29/40 ,  G01K11/20 ,  G01K2217/00 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/67196 ,  H01L21/67248 ,  H01L22/12 ,  H01L22/26 ,  H01L33/0025 ,  H01L33/007 ,  H01L33/06 ,  H01L33/32 ,  Y10T117/10 ,  Y10T117/1004 ,  Y10T117/1008

摘要： Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes.

摘要翻译： 用于控制外延生长参数的设备和方法，例如在制造发光二极管（LED）期间。 实施例包括生长后的III-V族薄膜的PL测量，而在高温下的基底处于多腔聚集工具的转移室中。 在其它实施例中，在衬底设置在传送室中的同时，执行膜厚度测量，非接触电阻率测量以及颗粒和/或粗糙度测量。 通过基于从设置在III-V族III膜以下的GaN基底层的发射来估计升高的温度，在传送室中执行的一个或多个测量值被温度校正到室温。 在其他实施例中，温度校正基于由所收集的白光反射光谱确定的GaN基底层的吸收带边缘。 然后使用温度校正计量来控制生长过程。

公开(公告)号：US20110039360A1

公开(公告)日：2011-02-17

申请号：US12909548

申请日：2010-10-21

申请人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

发明人： David P. Bour ,  Clifford F. Knollenberg ,  Christopher L. Chua

IPC分类号： H01L33/58

CPC分类号： H01L21/268 ,  H01L33/007 ,  H01L33/12 ,  H01L33/22

摘要： A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.

摘要翻译： 描述了在LED的模板层内或紧邻LED的模板层内纹理化表面的方法。 该方法使用引导通过基底的纹理激光来分解和凹陷待纹理表面的半导体材料。 通过纹理化表面，减少了模板层内的光捕获。 此外，通过图案化凹坑的布置，可以布置每个凹坑的金属涂层以将电流扩散通过模板层，从而穿过LED的n掺杂区域。

公开(公告)号：US07495314B2

公开(公告)日：2009-02-24

申请号：US11234993

申请日：2005-09-26

申请人： Jeffrey N. Miller ,  David P. Bour ,  Virginia M. Robbins ,  Steven D. Lester

发明人： Jeffrey N. Miller ,  David P. Bour ,  Virginia M. Robbins ,  Steven D. Lester

IPC分类号： H01L29/22

CPC分类号： H01L21/28575 ,  H01L33/14 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ohmic contact in accordance with the invention includes a layer of p-type GaN-based material. A first layer of a group II-VI compound semiconductor is located adjacent to the layer of p-type GaN-based material. The ohmic contact further includes a metal layer that provides metal contact. A second layer of a different II-VI compound semiconductor is located adjacent to the metal layer.

摘要翻译： 根据本发明的欧姆接触包括一层p型GaN基材料。 II-VI族化合物半导体的第一层位于邻近p型GaN基材料层的位置。 欧姆接触还包括提供金属接触的金属层。 不同的II-VI化合物半导体的第二层位于金属层附近。

公开(公告)号：US07443561B2

公开(公告)日：2008-10-28

申请号：US11148467

申请日：2005-06-08

申请人： David P. Bour ,  Ashish Tandon ,  Michael R. T. Tan

发明人： David P. Bour ,  Ashish Tandon ,  Michael R. T. Tan

IPC分类号： G02F1/03 ,  H01L29/06 ,  H01S5/00

CPC分类号： B82Y20/00 ,  G02F1/017 ,  G02F1/01725 ,  G02F2001/01766 ,  G02F2202/101 ,  G02F2202/102

摘要： Double well structures in electro-absorption modulators are created in quantum well active regions by embedding deep ultra thin quantum wells. The perturbation introduced by the embedded, deep ultra thin quantum well centered within a conventional quantum well lowers the confined energy state for the wavefunction in the surrounding larger well and typically results in the hole and electron distributions being more confined to the center of the conventional quantum well. The extinction ratio provided by the electro-absorption modulator is typically increased.

摘要翻译： 电子吸收调制器中的双阱结构通过嵌入深超薄量子阱在量子阱活性区域中产生。 以常规量子阱为中心的嵌入式，超超薄量子阱引入的扰动降低了周围较大阱中波函数的约束能态，并且通常导致空穴和电子分布更局限于常规量子的中心 好。 电吸收调制器提供的消光比通常增加。

公开(公告)号：US07345324B2

公开(公告)日：2008-03-18

申请号：US11177670

申请日：2005-07-07

申请人： David P. Bour ,  Nathan F. Gardner ,  Werner K. Goetz ,  Stephen A. Stockman ,  Tetsuya Takeuchi ,  Ghulam Hasnain ,  Christopher P. Kocot ,  Mark R. Hueschen

发明人： David P. Bour ,  Nathan F. Gardner ,  Werner K. Goetz ,  Stephen A. Stockman ,  Tetsuya Takeuchi ,  Ghulam Hasnain ,  Christopher P. Kocot ,  Mark R. Hueschen

IPC分类号： H01L33/00

CPC分类号： H01L33/32 ,  H01L33/06

摘要： A light emitting device in accordance with an embodiment of the present invention includes a first semiconductor layer of a first conductivity type having a first surface, and an active region formed overlying the first semiconductor layer. The active region includes a second semiconductor layer which is either a quantum well layer or a barrier layer. The second semiconductor layer is formed from a semiconductor alloy having a composition graded in a direction substantially perpendicular to the first surface of the first semiconductor layer. The light emitting device also includes a third semiconductor layer of a second conductivity type formed overlying the active region.

摘要翻译： 根据本发明的实施例的发光器件包括具有第一表面的第一导电类型的第一半导体层和形成在第一半导体层上的有源区。 有源区包括作为量子阱层或阻挡层的第二半导体层。 第二半导体层由具有在基本上垂直于第一半导体层的第一表面的方向分级的成分的半导体合金形成。 发光器件还包括形成在有源区上的第二导电类型的第三半导体层。

公开(公告)号：US07276390B2

公开(公告)日：2007-10-02

申请号：US10230895

申请日：2002-08-29

申请人： David P. Bour ,  Michael R. T. Tan ,  William H. Perez

发明人： David P. Bour ,  Michael R. T. Tan ,  William H. Perez

IPC分类号： H01L21/205

CPC分类号： B82Y20/00 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/02507 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/0262 ,  H01L33/0062 ,  H01S5/3434

摘要： An InAsP active region for a long wavelength light emitting device and a method for growing the same are disclosed. In one embodiment, the method comprises placing a substrate in an organometallic vapor phase epitaxy (OMVPE) reactor, the substrate for supporting growth of an indium arsenide phosphide (InAsP) film, forming a quantum well layer of InAsP, and forming a barrier layer adjacent the quantum well layer, where the quantum well layer and the barrier layer are formed at a temperature of less than 520 degrees C. Forming the quantum well layer and the barrier layer at a temperature of less than 520 degrees C. results in fewer dislocations by suppressing relaxation of the layers. A long wavelength active region including InAsP quantum well layers and InGaP barrier layers is also disclosed.

摘要翻译： 公开了一种用于长波长发光器件的InAsP有源区及其生长方法。 在一个实施方案中，该方法包括将衬底放置在有机金属气相外延（OMVPE）反应器中，该衬底用于支持砷化铟磷（InAsP）膜的生长，形成InAsP的量子阱层，并形成相邻的势垒层 量子阱层，其中在低于520℃的温度下形成量子阱层和势垒层。在低于520℃的温度下形成量子阱层和阻挡层，导致较少的位错 抑制层的松弛。 还公开了包括InAsP量子阱层和InGaP阻挡层的长波长有源区。