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121 条记录 (耗时 0.019 秒)

    Printed circuit board using paste bump and manufacturing method thereof
    102.
    发明授权
    Printed circuit board using paste bump and manufacturing method thereof 有权
    使用糊状凸块的印刷电路板及其制造方法

    公开(公告)号：US07973248B2

    公开(公告)日：2011-07-05

    申请号：US12219381

    申请日：2008-07-21

    申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

    发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Youn-Soo Seo ,  Hee-Bum Shin ,  Yoong Oh ,  Byung-Bae Seo ,  Tae-Kyoung Kim ,  Dong-Jin Park

    IPC分类号： H01R12/04 ,  H05K1/11

    CPC分类号： H05K3/462 ,  H01R12/523 ,  H05K3/4069 ,  H05K3/4647 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0353 ,  Y10T29/49155

    摘要： A printed circuit board using paste bumps and manufacturing method thereof are disclosed. The method of manufacturing a printed circuit board using paste bumps, includes: (a) perforating a core board to form at least one via hole, (b) filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, (c) stacking a paste bump board on at least one surface of the core board, and (d) forming an outer layer circuit on a surface of the paste bump board, a structurally stable all-layer IVH structure can be implemented due to increased strength in the BVH's of the plated core boards, the manufacture time can be reduced due to parallel processes and collective stacking, implementing micro circuits can be made easy due to the copper foils of the paste bump boards stacked on the outermost layers, the manufacture costs can be reduced as certain plating and drilling processes may be omitted, the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.

    摘要翻译： 公开了一种使用糊状凸块的印刷电路板及其制造方法。 使用糊状凸块制造印刷电路板的方法包括：（a）穿孔芯板以形成至少一个通孔，（b）通过填充电镀填充至少一个通孔并在其上形成电路图案 芯板的至少一个表面，（c）在芯板的至少一个表面上堆叠焊料凸块，以及（d）在焊料凸块的表面上形成外层电路，结构稳定的全层 由于镀层芯板的BVH的强度增加，可以实现IVH结构，由于并行处理和集体堆叠，制造时间可以减少，由于粘贴凸块的铜箔堆叠而实现微电路变得容易 在最外层，可以减少制造成本，因为可以省略某些电镀和钻孔工艺，在电路图案之间增加层间连接面积以提高连接可靠性，并且可以获得凹坑覆盖 d。

    ORGANIC THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    103.
    发明申请
    ORGANIC THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
    有机薄膜晶体管及其制造方法

    公开(公告)号：US20110147724A1

    公开(公告)日：2011-06-23

    申请号：US12975302

    申请日：2010-12-21

    申请人： Sang Won HA ,  Il Sub Chung ,  Jin Hee Heo ,  Kyo Hyeok Kim ,  Jung Min Kwon ,  Kyu Hag Eum ,  Sang Il Yim ,  Chang Sup Ryu

    发明人： Sang Won HA ,  Il Sub Chung ,  Jin Hee Heo ,  Kyo Hyeok Kim ,  Jung Min Kwon ,  Kyu Hag Eum ,  Sang Il Yim ,  Chang Sup Ryu

    IPC分类号： H01L51/05 ,  H01L51/40

    CPC分类号： H01L51/0022 ,  H01L51/0005 ,  H01L51/0014 ,  H01L51/0545

    摘要： There is provided an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes: an insulating substrate on which a plurality of barrier ribs and a plurality of grooves partitioned by the barrier ribs are formed; source and drain electrodes each formed on the grooves spaced apart from each other among the plurality of grooves; a gate electrode formed on the groove between the source and drain electrodes; an opening formed by etching the barrier ribs between the source electrode and the gate electrode and between the gate electrode and the drain electrode; a gate insulating film formed on the opening; and an organic semiconductor layer formed on the gate insulating film. The organic thin film transistor is capable of mass production and has excellent electrical characteristics.

    摘要翻译： 提供一种有机薄膜晶体管及其制造方法。 有机薄膜晶体管包括：绝缘基板，其上形成有多个隔壁和由隔壁分隔的多个槽; 源极和漏极各自形成在多个沟槽中彼此间隔开的沟槽上; 形成在源电极和漏电极之间的沟槽上的栅电极; 通过蚀刻源电极和栅电极之间以及栅电极和漏电极之间的阻挡层形成的开口; 形成在开口上的栅极绝缘膜; 以及形成在栅极绝缘膜上的有机半导体层。 有机薄膜晶体管能够批量生产并且具有优异的电特性。

    Multilayered printed circuit board and method of manufacturing the same
    106.
    发明申请
    Multilayered printed circuit board and method of manufacturing the same 审中-公开
    多层印刷电路板及其制造方法

    公开(公告)号：US20090236131A1

    公开(公告)日：2009-09-24

    申请号：US12222055

    申请日：2008-07-31

    申请人： Jee Soo Mok ,  Je Gwang Yoo ,  Chang Sup Ryu

    发明人： Jee Soo Mok ,  Je Gwang Yoo ,  Chang Sup Ryu

    IPC分类号： H05K1/09 ,  H05K3/02

    CPC分类号： H05K3/1258 ,  H01L2224/11 ,  H05K3/4069 ,  H05K3/4602 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09545 ,  H05K2201/096 ,  H05K2203/0568 ,  H05K2203/1152 ,  Y10T29/49156

    摘要： Disclosed herein is a multilayered circuit board, including: a multilayered printed circuit board manufactured using the method includes an insulating resin layer having via holes, on one side of which a first circuit layer including circuit patterns is formed, and on the other side of which a second circuit layer, including connecting pads, is formed, the pads protruding over the via holes; a build-up layer formed on the first circuit layer, the build-up layer including a plurality of insulating layers and a plurality of circuit layers; and a solder resist layer formed on an outermost layer of the build-up layer.

    摘要翻译： 本文公开了一种多层电路板，包括：使用该方法制造的多层印刷电路板，包括具有通孔的绝缘树脂层，其一侧形成有包括电路图案的第一电路层，另一侧 形成包括连接焊盘的第二电路层，焊盘在通孔上方突出; 形成在所述第一电路层上的积聚层，所述堆积层包括多个绝缘层和多个电路层; 以及形成在积层层的最外层上的阻焊层。

    Package board, semiconductor package, and fabricating method thereof
    107.
    发明授权
    Package board, semiconductor package, and fabricating method thereof 有权
    封装板，半导体封装及其制造方法

    公开(公告)号：US07592708B2

    公开(公告)日：2009-09-22

    申请号：US11528324

    申请日：2006-09-28

    申请人： Seung-Gu Kim ,  Je-Gwang Yoo ,  Yong-Bin Lee ,  Yoo-Keum Wee ,  Seok-Hwan Huh ,  Chang-Sup Ryu

    发明人： Seung-Gu Kim ,  Je-Gwang Yoo ,  Yong-Bin Lee ,  Yoo-Keum Wee ,  Seok-Hwan Huh ,  Chang-Sup Ryu

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/563 ,  H01L2224/73203 ,  H01L2924/0102 ,  H01L2924/01078

    摘要： With a semiconductor package according to an aspect of the present invention comprising a board having circuit lines, solder resist formed on a surface of the board, and a chip mounted on the board and having at least one bump attached to at least a portion of the circuit lines, where the solder resist comprises a perimeter groove, which exposes at least a portion of the circuit lines, and an extension groove, which is connected to the perimeter groove, and where encapsulant is filled in the perimeter groove and the extension groove, the filling characteristics of the encapsulant is improved for greater reliability in the electrical connections between the chip and the board.

    摘要翻译： 根据本发明的一个方面的半导体封装，其包括具有电路线的板，形成在所述板的表面上的阻焊剂和安装在所述板上的芯片，并且具有附着到所述板的至少一部分上的至少一个凸块 电路线，其中阻焊剂包括暴露至少一部分电路线的周边凹槽和连接到周边凹槽的延伸凹槽，并且其中密封剂填充在周边凹槽和延伸凹槽中， 提高了密封剂的填充特性，以便在芯片和电路板之间的电连接中获得更高的可靠性。

    Printed circuit board having fine pattern and manufacturing method thereof
    108.
    发明申请
    Printed circuit board having fine pattern and manufacturing method thereof 审中-公开
    具有精细图案的印刷电路板及其制造方法

    公开(公告)号：US20090229875A1

    公开(公告)日：2009-09-17

    申请号：US12453741

    申请日：2009-05-20

    申请人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

    发明人： Jee-Soo Mok ,  Chang-Sup Ryu ,  Eung-Suek Lee ,  Ki-Hwan Kim ,  Sung-Yong Kim

    IPC分类号： H05K1/11

    CPC分类号： H05K3/4664 ,  H05K3/0023 ,  H05K3/1216 ,  H05K3/1258 ,  H05K3/207 ,  H05K3/4069 ,  H05K3/4602 ,  H05K3/465 ,  H05K2201/09536 ,  H05K2203/0143 ,  H05K2203/0568

    摘要： A printed circuit board having a fine pattern and related manufacturing method that includes providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.

    摘要翻译： 一种具有精细图案和相关制造方法的印刷电路板，包括提供载板; 用感光材料涂覆载体板; 在感光材料上形成第一电路图案; 通过干燥印刷在形成有第一电路图案的感光材料之间的空间中的导电浆料形成第一电路层; 在第一电路层上沉积绝缘层; 通过贯穿绝缘层的孔加工; 用感光材料涂覆绝缘层，然后在感光材料中形成第二电路图案; 形成第二电路层，并通过干燥印刷在其中形成第二电路图案的感光材料之间的空间中的导电浆料和通孔来填充通孔; 并移除载体板。