公开(公告)号：US20190035819A1

公开(公告)日：2019-01-31

申请号：US16133823

申请日：2018-09-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Atsushi HIROSE ,  Masashi TSUBUKU ,  Kosei NODA

IPC: H01L27/12 ,  H04R1/02 ,  H04M1/02 ,  H01L29/36 ,  H01L33/02 ,  H01L29/786 ,  H01L29/24 ,  H01L27/32 ,  H01L27/15 ,  H01L21/8234

Abstract: An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.

公开(公告)号：US20180375498A1

公开(公告)日：2018-12-27

申请号：US15986920

申请日：2018-05-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA

IPC: H03K3/012 ,  H01L29/786 ,  H03K3/037 ,  H03K19/00 ,  G11C5/14 ,  G11C8/04

Abstract: Provided is a semiconductor device including a sequential circuit including a first transistor and a capacitor. The first transistor includes a semiconductor layer including indium, zinc, and oxygen to form a channel formation region. A node electrically connected to a source or a drain of the first transistor and a capacitor becomes a floating state when the first transistor turns off, so that a potential of the node can be maintained for a long period. A power-gating control circuit may be provided to control supply of power supply potential to the sequential circuit. The potential of the node still can be maintained while supply of the power supply potential is stopped.

公开(公告)号：US20180286864A1

公开(公告)日：2018-10-04

申请号：US15995204

申请日：2018-06-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC: H01L27/105 ,  H01L29/786 ,  H01L27/108 ,  H01L27/11551 ,  H01L27/1156 ,  H01L29/24 ,  H01L27/12 ,  G11C13/00 ,  H01L49/02 ,  H01L27/11

CPC classification number: H01L27/1052 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/79 ,  H01L27/105 ,  H01L27/108 ,  H01L27/11 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L28/40 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.

公开(公告)号：US20180061866A1

公开(公告)日：2018-03-01

申请号：US15806418

申请日：2017-11-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA

IPC: H01L27/12 ,  G11C19/28 ,  G09G3/3266 ,  G09G3/36

Abstract: The power consumption of a shift register or a display device including the shift register is reduced. A clock signal is supplied to a shift register by a plurality of wirings, not by one wiring. Any one of the plurality of wirings supplies a clock signal in only part of the operation period of the shift register, not during the whole operation period of the shift register. Therefore, the capacity load caused with the supply of clock signals can be reduced, leading to reduction in power consumption of the shift register.

公开(公告)号：US20170271337A1

公开(公告)日：2017-09-21

申请号：US15477144

申请日：2017-04-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC: H01L27/105 ,  G11C11/24

CPC classification number: H01L27/105 ,  G11C11/24 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/10808 ,  H01L27/1156 ,  H01L27/1225 ,  H01L28/60

Abstract: A semiconductor device including a non-volatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written or rewritten to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that the predetermined amount of charge is held in the node. Further, when a transistor whose threshold voltage is controlled and set to a positive voltage is used as the reading transistor, a reading potential is a positive potential.

公开(公告)号：US20170229086A1

公开(公告)日：2017-08-10

申请号：US15496061

申请日：2017-04-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Atsushi UMEZAKI

IPC: G09G3/36 ,  H01L27/02 ,  G11C19/00 ,  H01L27/12

CPC classification number: G09G3/3677 ,  G09G2310/0251 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2330/021 ,  G11C19/00 ,  H01L27/0207 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K17/687 ,  H03K19/0013 ,  H03K19/018557 ,  H03K19/018571

Abstract: The amplitude voltage of a signal input to a level shifter can be increased and then output by the level shifter circuit. Specifically, the amplitude voltage of the signal input to the level shifter can be increased to be output. This decreases the amplitude voltage of a circuit (a shift register circuit, a decoder circuit, or the like) which outputs the signal input to the level shifter. Consequently, power consumption of the circuit can be reduced. Alternatively, a voltage applied to a transistor included in the circuit can be reduced. This can suppress degradation of the transistor or damage to the transistor.

公开(公告)号：US20170148781A1

公开(公告)日：2017-05-25

申请号：US15367412

申请日：2016-12-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: H01L27/02 ,  H01L27/12

CPC classification number: H01L27/0266 ,  G09G3/3283 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2330/04 ,  G11C19/28 ,  H01L27/1225 ,  H02H9/044 ,  Y10T29/49117 ,  Y10T428/24364 ,  Y10T428/24372 ,  Y10T428/2438

Abstract: Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver circuit. Further provided are a driver circuit provided with a protection circuit with low leakage current, and a method of manufacturing the driver circuit. By providing a protection circuit in a driver circuit to be electrically connected to a semiconductor element in the driver circuit, and by forming, at the same time, a transistor which serves as the semiconductor element in the driver circuit and a transistor included in the protection circuit in the driver circuit, damage of the semiconductor element due to ESD is suppressed in the process of manufacturing the driver circuit. Further, by using an oxide semiconductor film for the transistor included in the protection circuit in the driver circuit, leakage current in the protection circuit is reduced.

公开(公告)号：US20170052398A1

公开(公告)日：2017-02-23

申请号：US15248469

申请日：2016-08-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Satoshi MURAKAMI ,  Jun KOYAMA ,  Yukio TANAKA ,  Hidehito KITAKADO ,  Hideto OHNUMA

IPC: G02F1/1368 ,  H01L27/32 ,  G02F1/1362 ,  G02F1/1345 ,  G02F1/1333 ,  H01L27/12 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2201/123 ,  G02F2202/104 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/458 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863 ,  H01L2227/323

Abstract: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

Abstract translation: 本发明提供一种具有高操作性能和高可靠性的半导体器件。 在形成驱动电路的n沟道TFT 802中配置与栅极配线重叠的LDD区域707，能够实现高耐热载流子注入的TFT结构。 不与栅极布线重叠的LDD区域717,718,719和720被布置在形成像素单元的n沟道TFT 804中。 结果，实现了具有小的截止电流值的TFT结构。 在这种情况下，属于周期表第15族的元素在LDD区707中比在LDD区717,718,719和720中的浓度更高。

公开(公告)号：US20170039970A1

公开(公告)日：2017-02-09

申请号：US15299515

申请日：2016-10-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuji NISHIJIMA ,  Seiichi YONEDA ,  Takuro OHMARU ,  Jun KOYAMA

IPC: G09G3/36 ,  H01L29/24 ,  G09G5/395 ,  H01L27/105 ,  G09G5/393 ,  H01L29/786 ,  H01L27/12

CPC classification number: G09G3/3648 ,  G02F2001/136295 ,  G09G3/3614 ,  G09G3/3677 ,  G09G5/393 ,  G09G5/395 ,  G09G2300/0842 ,  G09G2310/0264 ,  G09G2330/021 ,  G09G2330/022 ,  G09G2360/121 ,  H01L27/1052 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869 ,  H01L33/16

Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.

Abstract translation: 在静止图像显示在具有像素的像素部分的情况下，例如通过停止对驱动电路的电源电压的供给来停止将具有图像数据的图像信号写入到像素部分的驱动电路， 并且停止向像素部分写入图像信号。 在驱动器电路停止之后，停止向用于控制驱动器电路的操作的面板控制器的电源电压供给和用于存储图像数据的图像存储器，并且向CPU提供电源电压以集中地控制 停止面板控制器，图像存储器和用于控制对半导体显示装置中的各种电路的电源电压供给的电源控制器。

公开(公告)号：US20160365041A1

公开(公告)日：2016-12-15

申请号：US15249640

申请日：2016-08-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Yoshiharu HIRAKATA

IPC: G09G3/34 ,  G09G3/36 ,  G09G3/20 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: G09G3/3413 ,  G02F1/133345 ,  G02F1/1334 ,  G02F1/133514 ,  G02F1/133555 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133302 ,  G02F2201/121 ,  G02F2201/123 ,  G02F2203/01 ,  G02F2203/04 ,  G09G3/2003 ,  G09G3/3406 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0237 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2320/0261 ,  G09G2320/064 ,  G09G2320/0646 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2330/022

Abstract: An object is to provide a liquid crystal display device which can recognize image display even when the liquid crystal display device is used in a dim environment. In one pixel, a pixel electrode including both of a region where incident light through a liquid crystal layer is reflected and a transmissive region is provided, and image display can be performed in both modes: the reflective mode where external light is used as an illumination light source; and the transmissive mode where the backlight is used as an illumination light source. When there is external light with insufficient brightness, that is, in a dim environment, the backlight emits weak light and an image is displayed in the reflective mode, whereby image display can be performed.