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    ACTIVE LED MODULE HAVING INTEGRATED LIMITER
    181.
    发明申请
    ACTIVE LED MODULE HAVING INTEGRATED LIMITER 有权
    具有集成限幅的有源LED模块

    公开(公告)号：US20150366025A1

    公开(公告)日：2015-12-17

    申请号：US14837934

    申请日：2015-08-27

    Applicant: Nthdegree Technologies Worldwide Inc.

    Inventor： Bradley S. Oraw

    IPC: H05B33/08

    CPC classification number: H05B33/0857 ,  H01L24/24 ,  H01L24/82 ,  H01L27/15 ,  H01L33/0041 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12035 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/13091 ,  H05B33/083 ,  H01L2924/00

    Abstract: LED modules are disclosed having a control MOSFET, or other transistor, in series with an LED. In one embodiment, a MOSFET wafer is bonded to an LED wafer and singulated to form thousands of active 3-terminal LED modules with the same footprint as a single LED. Despite the different forward voltages of red, green, and blue LEDs, RGB modules may be connected in parallel and their control voltages staggered at 60 Hz or greater to generate a single perceived color, such as white. The RGB modules may be connected in a panel for general illumination or for a color display. A single dielectric layer in a panel may encapsulate all the RGB modules to form a compact and inexpensive panel. Various addressing techniques are described for both a color display and a lighting panel. Various circuits are described for reducing the sensitivity of the LED to variations in input voltage.

    Abstract translation: 公开了具有与LED串联的控制MOSFET或其它晶体管的LED模块。 在一个实施例中，MOSFET晶片被结合到LED晶片并且被单片化以形成具有与单个LED相同的占空比的数千个有源3端子LED模块。 尽管红色，绿色和蓝色LED的正向电压不同，但是RGB模块可以并联连接，并且其控制电压以60Hz或更大的方式交错，以产生单个感知颜色，例如白色。 RGB模块可以连接在用于一般照明或彩色显示的面板中。 面板中的单个电介质层可以封装所有的RGB模块以形成紧凑且廉价的面板。 对于彩色显示器和照明面板都描述了各种寻址技术。 描述了各种电路，用于降低LED对输入电压变化的灵敏度。

    Active LED module with LED and transistor formed on same substrate
    183.
    发明授权
    Active LED module with LED and transistor formed on same substrate 有权
    有源LED模块与LED和晶体管形成在同一基板上

    公开(公告)号：US09177992B2

    公开(公告)日：2015-11-03

    申请号：US14204965

    申请日：2014-03-11

    Applicant: Nthdegree Technologies Worldwide Inc.

    Inventor： Richard Austin Blanchard ,  Bradley Steven Oraw

    IPC: H01L21/00 ,  H01L27/15

    CPC classification number: H01L27/153 ,  H01L27/15 ,  H01L33/32

    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.

    Abstract translation: 公开了一种LED模块，其包含与LED串联的集成驱动晶体管（例如，MOSFET）。 在一个实施例中，LED层在衬底上生长。 晶体管区域形成在相同的衬底上。 在诸如GaN层的LED层被生长以形成LED部分之后，将LED的中心区域蚀刻掉以暴露其中形成晶体管区域的半导体表面。 导体将晶体管与LED串联连接。 晶体管的另一节点电耦合到衬底的底表面上的电极。 在一个实施例中，LED的阳极连接到模块的一个端子，晶体管的一个馈电节点连接到模块的第二端子，并且晶体管的控制端子连接到模块的第三端子 模块。

    SEAMLESSLY INTERCONNECTED LIGHT SHEET TILES
    185.
    发明申请
    SEAMLESSLY INTERCONNECTED LIGHT SHEET TILES 审中-公开
    无缝互连光板

    公开(公告)号：US20150267907A1

    公开(公告)日：2015-09-24

    申请号：US14731129

    申请日：2015-06-04

    Applicant: Nthdegree Technologies Worldwide Inc.

    Inventor： Travis Thompson ,  Bradley Steven Oraw

    IPC: F21V23/06 ,  F21V21/005 ,  F21K99/00

    CPC classification number: F21V23/06 ,  F21K9/20 ,  F21K9/64 ,  F21S2/005 ,  F21V21/005 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

    Abstract: A system of interconnectable LED light emitting tiles includes identical tiles having a light emitting area that extends all the way to two contiguous edges. One set of anode and cathode interconnects is accessible from the underside of one edge of the tile, and a second set of anode and cathode interconnects is accessible from the top side of an opposite edge of the tile. The second set of anode and cathode interconnects extends out from the light emitting area on the top side. When tiles are interconnected together, their interconnection edges overlap to make the electrical interconnections, while the light emitting areas of all the tiles abut to form a large seamless light emitting area. The flexible tiles may be mounted on a backplane that includes anode and cathode conductors for electrically interconnecting the tiles. A large, addressable display may be formed using interconnected tiles.

    Abstract translation: 可互连的LED发光砖的系统包括具有一直延伸到两个相邻边缘的发光区域的相同的瓦片。 一组阳极和阴极互连可从瓦片的一个边缘的下侧接近，并且第二组阳极和阴极互连可从瓦片的相对边缘的顶侧进入。 第二组阳极和阴极互连从顶侧的发光区域延伸出来。 当瓦片互连在一起时，它们的互连边缘重叠以形成电互连，而所有瓦片的发光区域邻接以形成大的无缝发光区域。 柔性瓦片可以安装在包括用于电互连瓦片的阳极和阴极导体的背板上。 可以使用互连瓦片形成大的可寻址显示器。

    Diatomaceous energy storage devices
    186.
    发明授权
    Diatomaceous energy storage devices 有权
    硅藻土蓄能装置

    公开(公告)号：US09136065B2

    公开(公告)日：2015-09-15

    申请号：US13944211

    申请日：2013-07-17

    Applicant: NthDegree Technologies Worldwide Inc.

    Inventor： Vera N. Lockett ,  John G. Gustafson ,  Mark D. Lowenthal ,  William J. Ray

    IPC: G09F3/00 ,  H01G11/52 ,  H01M2/16 ,  H01G11/24 ,  H01G11/38 ,  H01G11/46 ,  H01M4/62

    CPC classification number: C01B33/18 ,  B01D21/262 ,  B04B7/12 ,  H01G11/24 ,  H01G11/26 ,  H01G11/36 ,  H01G11/38 ,  H01G11/46 ,  H01G11/52 ,  H01M2/1646 ,  H01M4/62 ,  Y02E60/13

    Abstract: A printed energy storage device includes a first electrode, a second electrode, and a separator between the first and the second electrode. At least one of the first electrode, the second electrode, and the separator includes frustules, for example of diatoms. The frustules may have a uniform or substantially uniform property or attribute such as shape, dimension, and/or porosity. A property or attribute of the frustules can also be modified by applying or forming a surface modifying structure and/or material to a surface of the frustules. A membrane for an energy storage device includes frustules. An ink for a printed film includes frustules.

    Abstract translation: 印刷储能装置包括第一电极，第二电极和第一和第二电极之间的隔板。 第一电极，第二电极和分离器中的至少一个包括例如硅藻的截头圆锥体。 截头锥体可以具有均匀或基本均匀的性质或属性，例如形状，尺寸和/或孔隙率。 还可以通过将表面改性结构和/或材料施加或形成至截头体的表面来改变截头体的特性或属性。 用于能量存储装置的膜包括截头圆锥体。 用于印刷膜的油墨包括截头圆锥体。

    PROCESS FOR FORMING ULTRA-MICRO LEDS
    187.
    发明申请
    PROCESS FOR FORMING ULTRA-MICRO LEDS 有权
    形成超微型LED的工艺

    公开(公告)号：US20150228631A1

    公开(公告)日：2015-08-13

    申请号：US14616347

    申请日：2015-02-06

    Applicant: Nthdegree Technologies Worldwide Inc.

    Inventor： William Johnstone Ray ,  Mark David Lowenthal ,  Lixin Zheng

    IPC: H01L25/075 ,  H01L33/32 ,  H01L33/48 ,  H01L33/42 ,  H01L33/62 ,  H01L33/06 ,  H01L33/40

    CPC classification number: H01L33/56 ,  H01L25/0753 ,  H01L33/06 ,  H01L33/32 ,  H01L33/405 ,  H01L33/42 ,  H01L33/486 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2924/00 ,  H01L2924/0001

    Abstract: A flexible light sheet includes a bottom conductor layer overlying a flexible substrate. An array of vertical light emitting diodes (VLEDs) is printed as an ink over the bottom conductor layer so that bottom electrodes of the VLEDs electrically contact the bottom conductor layer. A top electrode of the VLEDs is formed of a first transparent conductor layer, and a temporary hydrophobic layer is formed over the first transparent conductor layer. A dielectric material is deposited between the VLEDs but is automatically de-wetted off the hydrophobic layer. The hydrophobic layer is then removed, and a second transparent conductor layer is deposited to electrically contact the top electrode of the VLEDs. The VLEDs can be made less than 10 microns in diameter since no top metal bump electrode is used. The VLEDs are illuminated by a voltage differential between the bottom conductor layer and the second transparent conductor layer.

    Abstract translation: 柔性光板包括覆盖柔性基板的底部导体层。 垂直发光二极管阵列（VLED）作为墨水印在底部导体层上，使得VLED的底部电极与底部导体层电接触。 VLED的顶部电极由第一透明导体层形成，并且在第一透明导体层上形成临时疏水层。 电介质材料沉积在VLED之间，但自动从疏水层脱湿。 然后去除疏水层，并且沉积第二透明导体层以与VLED的顶部电极电接触。 VLED的直径可以小于10微米，因为不使用顶部金属凸块电极。 VLED由底部导体层和第二透明导体层之间的电压差照明。

    Interlocking light sheet tiles
    189.
    发明授权
    Interlocking light sheet tiles 有权
    联锁灯片瓦片

    公开(公告)号：US09074758B2

    公开(公告)日：2015-07-07

    申请号：US14162257

    申请日：2014-01-23

    Applicant: Nthdegree Technologies Worldwide Inc.

    Inventor： Bradley Steven Oraw ,  Marc Oliver Meier

    IPC: H01R33/00 ,  F21V23/06 ,  F21K99/00 ,  H01L25/075 ,  F21V21/005 ,  F21Y101/02

    CPC classification number: F21V23/06 ,  F21K9/20 ,  F21K9/64 ,  F21V21/005 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A system of interlocking LED panel tiles includes a first tile having at least one layer of light emitting diodes (LEDs) provided on a substrate, where the substrate is mounted on a substantially rectangular supporting plate having interlocking features. The substrate overlaps the interlocking features. The first tile has a set of positive and negative voltage conductors running between the two sets of opposite edges of the tile as busses. Multiple identical tiles are provided. Each tile has the interlocking features along their edges that firmly physically connect to abutting tiles to create a lamp having any pattern of tiles selected by the user. By interlocking the tiles, the positive and negative conductors are automatically connected to electrically connect the LEDs in the tiles in parallel, and the interlocking features are hidden by the overlying substrate. Additional conductors may be used to provide greater interconnection flexibility.

    Abstract translation: 互锁LED面板瓦的系统包括具有设置在基板上的至少一层发光二极管（LED）的第一瓦片，其中基板安装在具有互锁特征的大致矩形的支撑板上。 基板与互锁特征重叠。 第一瓦片具有一组在瓦片的两组相对边缘之间运行的正和负电压导体作为总线。 提供多个相同的瓷砖。 每个瓦片沿其边缘具有互锁特征，其牢固地物理地连接到邻接的瓦片，以产生具有由用户选择的瓦片的任何图案的灯。 通过互锁瓦片，正和负导体自动连接以平行地电连接瓦片中的LED，并且互锁特征被上覆基板隐藏。 可以使用附加导体来提供更大的互连灵活性。

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