公开(公告)号：US20090272745A1

公开(公告)日：2009-11-05

申请号：US12114682

申请日：2008-05-02

Applicant: Ryan Dohse ,  Brian Taggart

Inventor： Ryan Dohse ,  Brian Taggart

IPC: B65D17/40 ,  B65D21/00 ,  B65D17/42 ,  B65D8/00

CPC classification number: B65D21/0205 ,  B65D71/0085 ,  B65D71/50

Abstract: A disposable substance dispensing apparatus comprises a plurality of disposable substance dispensing containers coupled together in the shape of a fruit. Each of the containers is in the shape of a slice of fruit and has a fillable chamber accessed by a port through one of the outer walls of the container. A packaging material extends around each of the containers to hold the dispensing apparatus in the shape of a fruit. Each of the containers may individually be removed from the apparatus. The port of each container may be accessed by a single use tear-off or twist-off impermeable cap.

Abstract translation: 一次性物质分配装置包括以水果形式连接在一起的多个一次性物质分配容器。 每个容器都是一片水果的形状，并且具有通过容器的一个外壁通过端口进入的可填充室。 包装材料围绕每个容器延伸以将分配装置保持为水果的形状。 每个容器可以单独地从设备中取出。 每个容器的端口可以通过一次使用的撕下或不透水的盖子进行访问。

公开(公告)号：US20080014436A1

公开(公告)日：2008-01-17

申请号：US11775326

申请日：2007-07-10

Applicant: Robert Nickerson ,  Brian Taggart ,  Hai Ding

Inventor： Robert Nickerson ,  Brian Taggart ,  Hai Ding

IPC: B23K1/06 ,  B32B7/04

CPC classification number: B23K20/004 ,  B23K2101/42 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/5386 ,  H01L24/05 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49052 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  Y10T428/249921 ,  Y10T428/26 ,  H01L2224/78 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A wire-bonding substrate includes a curvilinear wire-bond pad. The curvilinear wire-bond pad is used in reverse wire bonding to couple a die with the substrate. A curvilinear wire-bond pad is also disclosed that is located directly above the via in the substrate. A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the wire-bonding substrate. A package is includes a chip stack with a total die-side characteristic dimension, and a total substrate-side characteristic dimension that is smaller than the total die-side characteristic dimension. A computing system includes the curvilinear wire-bond pad.

Abstract translation: 引线键合衬底包括曲线性引线键合焊盘。 曲线引线接合焊盘用于反向引线接合以将管芯与衬底耦合。 还公开了一种曲线形接合焊盘，其位于衬底中的通孔的正上方。 引线键合衬底包括第一引线接合焊盘和布线键合衬底中的第一引线接合焊盘正下方的第一通孔。 封装包括具有总模侧特性尺寸的芯片堆叠，以及小于总模侧特征尺寸的总基板侧特征尺寸。 一种计算系统包括曲线性的接线焊盘。

公开(公告)号：US07302756B2

公开(公告)日：2007-12-04

申请号：US10612281

申请日：2003-06-30

Applicant: Brian Taggart ,  Ronald L. Spreitzer ,  Robert Nickerson

Inventor： Brian Taggart ,  Ronald L. Spreitzer ,  Robert Nickerson

IPC: H01K3/10

CPC classification number: H05K1/111 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49052 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K2201/096 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package includes a die that is coupled to the first wire-bonding pad. The package can include a larger substrate that is coupled to the wire-bonding substrate through an electrical connection such as a solder ball. A process of forming the wire-bonding substrate includes via formation to stop on the wire-bond pad. A method of assembling a microelectronic package includes coupling the die to the wire-bond pad. A computing system includes the wire-bonding substrate.

Abstract translation: 引线键合衬底包括第一引线接合焊盘和布线键合衬底中的第一引线接合焊盘正下方的第一通孔。 封装包括耦合到第一引线接合焊盘的裸片。 封装可以包括通过诸如焊球之类的电连接而与引线键合衬底耦合的较大衬底。 形成引线接合基板的工艺包括通孔形成以在引线接合焊盘上停止。 组装微电子封装的方法包括将管芯耦合到引线接合焊盘。 计算系统包括引线接合衬底。

公开(公告)号：US20060289981A1

公开(公告)日：2006-12-28

申请号：US11168784

申请日：2005-06-28

Applicant: Robert Nickerson ,  Brian Taggart ,  Ronald Spreitzer

Inventor： Robert Nickerson ,  Brian Taggart ,  Ronald Spreitzer

IPC: H01L23/48

CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4917 ,  H01L2224/73265 ,  H01L2224/85 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: Logic and memory may be packaged together in a single integrated circuit package that, in some embodiments, has high input/output pin count and low stack height. In some embodiments, the logic may be stacked on top of the memory which may be stacked on a flex substrate. Such a substrate may accommodate a multilayer interconnection system which facilitates high pin count and low package height. In some embodiments, the package may be wired so that the memory may only be accessed through the logic.

Abstract translation: 逻辑和存储器可以一起封装在单个集成电路封装中，在一些实施例中，其具有高输入/输出引脚数和低堆栈高度。 在一些实施例中，逻辑可以堆叠在可以堆叠在柔性基板上的存储器的顶部上。 这样的基板可以容纳有助于高引脚数和低封装高度的多层互连系统。 在一些实施例中，封装可以被布线，使得只能通过逻辑访问存储器。

公开(公告)号：US20060033217A1

公开(公告)日：2006-02-16

申请号：US10915293

申请日：2004-08-10

Applicant: Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

Inventor： Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

IPC: H01L21/48 ,  H01L23/52

CPC classification number: H01L25/0657 ,  H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A flip-chip is mounted on a flex substrate. A flip-chip is mounted on a flex substrate, and a wire-bond chip is mounted on the flip-chip. A packaged flip-chip die is coupled to the flex substrate. A computing system is also disclosed that includes the flip-chip on a flex substrate configuration.

Abstract translation: 倒装芯片安装在柔性基板上。 倒装芯片安装在柔性基板上，并且引线接合芯片安装在倒装芯片上。 封装的倒装芯片与柔性基板相连。 还公开了一种计算系统，其包括柔性基板配置上的倒装芯片。

公开(公告)号：US20050214978A1

公开(公告)日：2005-09-29

申请号：US10807830

申请日：2004-03-24

Applicant: Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

Inventor： Brian Taggart ,  Robert Nickerson ,  Ronald Spreitzer

IPC: H01L21/20 ,  H01L23/498

CPC classification number: H01L23/49833 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/48 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/48997 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/48455 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Buildup layers may be formed over a flexible substrate. A suitable cavity may be formed in the buildup layers and a silicon die may be positioned over the flexible substrate on a die attach formed within the cavity. As a result, a lower profile flexible substrate package is possible.

Abstract translation: 堆积层可以形成在柔性基底上。 可以在堆积层中形成合适的空腔，并且可以在形成在空腔内的管芯附着件上将硅管芯定位在柔性基板上方。 因此，可以使用下部轮廓的柔性衬底封装。

公开(公告)号：US20050133255A1

公开(公告)日：2005-06-23

申请号：US10746595

申请日：2003-12-23

Applicant: John Conner ,  Brian Taggart ,  Robert Nickerson

Inventor： John Conner ,  Brian Taggart ,  Robert Nickerson

IPC: H01L23/498 ,  H01L23/50 ,  H05K3/22 ,  H05K7/06 ,  H01L23/48

CPC classification number: H01L23/49838 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K3/222 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: Some embodiments of the invention effectively shield signal traces on a substrate without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention provide improved power delivery without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention are described in the claims.

Abstract translation: 本发明的一些实施例有效地屏蔽衬底上的信号迹线，而不会影响衬底的金属层上的信号迹线路由。 本发明的其它实施例提供了改进的功率传递，而不影响衬底的金属层上的信号迹线布线。 在权利要求中描述了本发明的其它实施例。

公开(公告)号：US07375978B2

公开(公告)日：2008-05-20

申请号：US10746595

申请日：2003-12-23

Applicant: John Conner ,  Brian Taggart ,  Robert Nickerson

Inventor： John Conner ,  Brian Taggart ,  Robert Nickerson

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H01L23/49838 ,  H01L23/50 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K3/222 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: Some embodiments of the invention effectively shield signal traces on a substrate without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention provide improved power delivery without impacting the signal trace routing on the metal layers of the substrate. Other embodiments of the invention are described in the claims.

Abstract translation: 本发明的一些实施例有效地屏蔽衬底上的信号迹线，而不会影响衬底的金属层上的信号迹线路由。 本发明的其它实施例提供了改进的功率传递，而不影响衬底的金属层上的信号迹线布线。 在权利要求中描述了本发明的其它实施例。

公开(公告)号：US07358444B2

公开(公告)日：2008-04-15

申请号：US10964790

申请日：2004-10-13

Applicant: Robert M. Nickerson ,  Ronald L. Spreitzer ,  John C. Conner ,  Brian Taggart

Inventor： Robert M. Nickerson ,  Ronald L. Spreitzer ,  John C. Conner ,  Brian Taggart

IPC: H05K1/00

CPC classification number: H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K7/1061 ,  H05K2201/056 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer and a substrate folded around the interposer. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，所述第一集成电路封装使用中介层和围绕插入件折叠的衬底机械地和电连接。 描述和要求保护其他实施例。

公开(公告)号：US07304373B2

公开(公告)日：2007-12-04

申请号：US10977908

申请日：2004-10-28

Applicant: Brian Taggart ,  Robert M. Nickerson ,  Ronald L. Spreitzer

Inventor： Brian Taggart ,  Robert M. Nickerson ,  Ronald L. Spreitzer

IPC: H01L23/02

CPC classification number: H01L23/50 ,  H01L23/5387 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A device includes a folded flex substrate. A memory die is connected to a first side of the folded flex substrate. A logic die is connected to a second side of the folded flex substrate. A trace routing pattern of source voltage signals is identical to a trace routing pattern of collector voltage signals.

Abstract translation: 一种装置包括折叠的柔性基底。 存储芯片连接到折叠的柔性基板的第一侧。 逻辑裸片连接到折叠的柔性基板的第二侧。 源电压信号的跟踪路由模式与集电极电压信号的跟踪路由模式相同。