Abstract:
A circuit card assembly is provided. The assembly includes a first printed circuit board, at least one electronic component mounted on the first printed circuit board at a predetermined location, a frame coupled to the first printed circuit board, and a heat transfer assembly coupled to the frame. The heat transfer assembly includes a first plate extending over at least a portion of the first printed circuit board, a heat pipe coupled to the first plate, and a thermally conductive member positioned between the at least one electronic component and the heat pipe. The thermally conductive member is selectively mounted at predetermined locations along the first plate based on the predetermined location of the at least one electronic component.
Abstract:
A thermal interface device having a containment structure and a thermal conductor is provided. Further, the containment structure includes at least one wall, where the containment structure is configured to facilitate passage of heat. Furthermore, the thermal interface device includes a thermal conductor disposed at least in a portion of the containment structure. Moreover, the thermal conductor is configured to reversibly switch between a solid state and a liquid state. Also, the thermal interface device is a re-workable device.
Abstract:
A semiconductor device module includes a dielectric layer, a semiconductor device having a first surface coupled to the dielectric layer, and a conducting shim having a first surface coupled to the dielectric layer. The semiconductor device also includes an electrically conductive heatspreader having a first surface coupled to a second surface of the semiconductor device and a second surface of the conducting shim. A metallization layer is coupled to the first surface of the semiconductor device and the first surface of the conducting shim. The metallization layer extends through the dielectric layer and is electrically connected to the second surface of the semiconductor device by way of the conducting shim and the heatspreader.
Abstract:
A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.
Abstract:
A system, such as a heat exchange assembly includes a support structure having a recess, a first support end, a second support end, and a support portion extending between the first and second support ends. The support structure further includes a plurality of projections protruding from a portion of a surface of the support structure, corresponding to the support portion. The support structure is a primary heat sink. The heat exchange assembly includes a vapor chamber having a casing and a wick disposed within the casing. The vapor chamber is disposed within the recess and coupled to a surface of the support structure such that the plurality of projections surrounds the vapor chamber. The casing includes a mid projected portion disposed at an evaporator portion of the vapor chamber. The first and second support ends, and the mid projected portion include a non-uniform surface configured to contact the circuit card.
Abstract:
A package structure includes a dielectric layer, at least one semiconductor device attached to the dielectric layer, one or more dielectric sheets applied to the dielectric layer and about the semiconductor device(s) to embed the semiconductor device(s) therein, and a plurality of vias formed to the semiconductor device(s) that are formed in at least one of the dielectric layer and the one or more dielectric sheets. The package structure also includes metal interconnects formed in the vias and on one or more outward facing surfaces of the package structure to form electrical interconnections to the semiconductor device(s). The dielectric layer is composed of a material that does not flow during a lamination process and each of the one or more dielectric sheets is composed of a curable material configured to melt and flow when cured during the lamination process so as to fill-in any air gaps around the semiconductor device(s).
Abstract:
An electronics chassis is provided. The electronics chassis includes a plurality of panels that define an interior space. One panel of the plurality of panels has a composite segment having an internal face and an external face. The electronics chassis further includes a conductive thermal pathway that extends through the panel from the internal face of the composite segment to the external face of the composite segment.
Abstract:
A circuit card assembly is provided. The circuit card assembly includes a printed circuit board, at least one electronic component mounted on the printed circuit board, and a frame coupled to the printed circuit board such that the electronic component is disposed between the printed circuit board and the frame. The circuit card assembly also includes a heat transfer device coupled to the frame. The heat transfer device has a heat pipe disposed at least in part between the frame and the printed circuit board. The circuit card assembly further includes a pivotable brace biasing the heat pipe toward the electronic component to facilitate cooling the electronic component.
Abstract:
A package structure includes a dielectric layer, at least one semiconductor device attached to the dielectric layer, one or more dielectric sheets applied to the dielectric layer and about the semiconductor device(s) to embed the semiconductor device(s) therein, and a plurality of vias formed to the semiconductor device(s) that are formed in at least one of the dielectric layer and the one or more dielectric sheets. The package structure also includes metal interconnects formed in the vias and on one or more outward facing surfaces of the package structure to form electrical interconnections to the semiconductor device(s). The dielectric layer is composed of a material that does not flow during a lamination process and each of the one or more dielectric sheets is composed of a curable material configured to melt and flow when cured during the lamination process so as to fill-in any air gaps around the semiconductor device(s).
Abstract:
A power overlay (POL) structure includes a POL sub-module. The POL sub-module includes a dielectric layer and a semiconductor device having a top surface attached to the dielectric layer. The top surface of the semiconductor device has at least one contact pad formed thereon. The POL sub-module also includes a metal interconnect structure that extends through the dielectric layer and is electrically coupled to the at least one contact pad of the semiconductor device. A conducting shim is coupled to a bottom surface of the semiconductor device and a first side of a thermal interface is coupled to the conducting shim. A heat sink is coupled to a second side of the electrically insulating thermal interface.