公开(公告)号：US20170352766A1

公开(公告)日：2017-12-07

申请号：US15616198

申请日：2017-06-07

Applicant: IMEC VZW

Inventor： Annelies Delabie ,  Silvia Armini

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/441 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L21/02568 ,  H01L21/02485 ,  H01L21/02603 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02645 ,  H01L21/02647 ,  H01L21/441 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

Abstract: Embodiments described herein include a method for forming a vertical hetero-stack and a device including a vertical hetero-stack. An example method is used to form a vertical hetero-stack of a first nanostructure and a second nanostructure arranged on an upper surface of the first nanostructure. The first nanostructure is formed by a first transition metal dichalcogenide, TMDC, material and the second nanostructure is formed by a second TMDC material. The example method includes providing the first nanostructure on a substrate. The method also includes forming a reactive layer of molecules on the first nanostructure along a periphery of the upper surface. The method further includes forming the second nanostructure by a vapor deposition process. The second TMDC material nucleates on the reactive layer of molecules along the periphery and grows laterally therefrom to form the second nanostructure on the upper surface.

公开(公告)号：US09589896B2

公开(公告)日：2017-03-07

申请号：US15067033

申请日：2016-03-10

Applicant: IMEC VZW

Inventor： Silvia Armini

IPC: H01L21/00 ,  H01L23/532 ,  C23C18/12 ,  C23C18/20 ,  H01L21/768

CPC classification number: H01L23/53238 ,  C23C18/12 ,  C23C18/20 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76862 ,  H01L21/76874

Abstract: An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or manganese nitride layer covering the side-walls, and a self-assembled monolayer, comprising an organic compound of formula Z-L-A, covering the manganese or manganese nitride layer, wherein Z is selected from the list consisting of a primary amino group, a carboxylic acid group, a thiol group, a selenol group and a heterocyclic group having an unsubstituted tertiary amine in the cycle, wherein L is an organic linker comprising from 1 to 12 carbon atoms and from 0 to 3 heteroatoms, and wherein A is a group attaching the linker to the manganese or manganese nitride layer.

Abstract translation: 一种电子电路结构，包括基底，位于基底顶部的电介质层，包括具有侧壁的空腔，覆盖侧壁的锰或氮化锰层，以及自组装单层，其包含式 ZLA，覆盖锰或氮化锰层，其中Z选自伯胺基，羧酸基，硫醇基，硒酚基和在该循环中具有未取代的叔胺的杂环基，其中 L是包含1至12个碳原子和0至3个杂原子的有机连接体，其中A是将连接体连接到锰或氮化锰层的基团。

公开(公告)号：US20150170910A1

公开(公告)日：2015-06-18

申请号：US14555356

申请日：2014-11-26

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Quoc Toan Le ,  Mikhail Baklanov ,  Yiting Sun ,  Silvia Armini

IPC: H01L21/02

CPC classification number: H01L21/02359 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02343 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831

Abstract: A method is provided for activating an exposed surface of a porous dielectric layer, the method comprising the steps of: filling with a first liquid at least the pores present in a part of the porous dielectric layer, the part comprising the exposed surface, removing the first liquid selectively from the surface, activating the exposed surface, and removing the first liquid from the bulk part of the porous dielectric layer.

Abstract translation: 提供一种用于激活多孔电介质层的暴露表面的方法，该方法包括以下步骤：至少填充第一液体至少存在于多孔电介质层的一部分中的孔，该部分包括暴露表面，去除 第一液体从表面选择性地起作用，激活暴露的表面，以及从多孔介电层的本体部分去除第一液体。

公开(公告)号：US11923198B2

公开(公告)日：2024-03-05

申请号：US17228295

申请日：2021-04-12

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Mikhail Krishtab ,  Silvia Armini

IPC: H01L21/027

CPC classification number: H01L21/0273

Abstract: In a first aspect, the present disclosure relates to a method for forming a patterning mask over a layer to be patterned, the method comprising: (a) providing a first layer over a substrate, the substrate comprising the layer to be patterned, the first layer being capable to bond with a monolayer comprising a compound comprising a functional group for bonding to the first layer and a removable organic group, (b) bonding the monolayer to the first layer, (c) exposing the monolayer to an energy beam, thereby forming a pattern comprising a first area comprising the compound with the removable organic group and a second area comprising the compound not having the removable organic group, and (d) selectively depositing an amorphous carbon layer on top of the first area.

公开(公告)号：US10685833B2

公开(公告)日：2020-06-16

申请号：US16190921

申请日：2018-11-14

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Mikhail Krishtab ,  Silvia Armini ,  Ivo Stassen ,  Rob Ameloot

IPC: H01L21/02 ,  H01L21/768

Abstract: Example embodiments relate to selective deposition of metal-organic frameworks. One embodiment includes a method of forming a low-k dielectric film selectively on exposed dielectric locations in a substrate. The method includes selectively depositing a metal-containing film, using an area-selective deposition process, on the exposed dielectric locations using one or more deposition cycles. The method also includes providing, at least once, a vapor of at least one organic ligand to the deposited metal-containing film resulting in a gas-phase chemical reaction thereby obtaining a metal-organic framework which is the low-k dielectric film. The low-k dielectric film has gaps on locations where no metal-containing film was deposited.

公开(公告)号：US10262896B2

公开(公告)日：2019-04-16

申请号：US15659507

申请日：2017-07-25

Applicant: IMEC VZW

Inventor： Silvia Armini

IPC: H01L21/4763 ,  H01L23/48 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  C23C16/02 ,  C23C16/04 ,  C23C16/34 ,  C23C16/56

Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.

公开(公告)号：US20180047621A1

公开(公告)日：2018-02-15

申请号：US15659507

申请日：2017-07-25

Applicant: IMEC VZW

Inventor： Silvia Armini

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76843 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/34 ,  C23C16/56 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53238

Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.

公开(公告)号：US09685322B2

公开(公告)日：2017-06-20

申请号：US14488857

申请日：2014-09-17

Applicant: IMEC VZW

Inventor： Christoph Adelmann ,  Silvia Armini

IPC: H01L21/469 ,  H01L21/02 ,  H01L29/06

CPC classification number: H01L21/02318 ,  H01L21/02046 ,  H01L21/02052 ,  H01L21/02107 ,  H01L21/02112 ,  H01L21/02118 ,  H01L21/0226 ,  H01L21/02299 ,  H01L21/02304 ,  H01L29/06

Abstract: The present disclosure relates to a method (100) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing (102) a passivated III-V semiconductor substrate comprising a III-V semiconductor surface which has a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface. The surface passivation layer comprises a self-assembled monolayer material obtainable by the reaction on the surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX3. X is selected from H, Cl, O—CH3, O—C2H5, and O—C3H2, and R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms. The method further comprises thermally annealing (107) the III-V semiconductor substrate in a non-oxidizing environment such as to decompose the self-assembled monolayer material, and depositing (108) a layer on the III-V semiconductor surface in the non-oxidizing environment.

公开(公告)号：US20170141199A1

公开(公告)日：2017-05-18

申请号：US15345782

申请日：2016-11-08

Applicant: IMEC VZW

Inventor： Steven Demuynck ,  Zheng Tao ,  Boon Teik Chan ,  Liesbeth Witters ,  Marc Schaekers ,  Antony Premkumar Peter ,  Silvia Armini

IPC: H01L29/417 ,  H01L21/311 ,  H01L29/45 ,  H01L29/08 ,  H01L21/768 ,  H01L21/285 ,  H01L21/02 ,  H01L21/3105

CPC classification number: H01L29/41791 ,  H01L21/02115 ,  H01L21/02123 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02186 ,  H01L21/0228 ,  H01L21/28518 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76886 ,  H01L21/76897 ,  H01L29/0847 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.

公开(公告)号：US09437488B2

公开(公告)日：2016-09-06

申请号：US14939286

申请日：2015-11-12

Applicant: IMEC VZW

Inventor： Boon Teik Chan ,  Silvia Armini ,  Frederic Lazzarino

IPC: H01L21/4763 ,  H01L21/768 ,  H01L21/311 ,  H01L21/321 ,  H01L21/3105 ,  H01L23/532

CPC classification number: H01L21/76877 ,  H01L21/31053 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76852 ,  H01L21/76871 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2221/1026 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method is provided for fabricating a semiconductor device that includes providing a structure with a sacrificial layer having at least one through-hole exposing a metal surface and, optionally, an oxide surface. In one example, the method may include applying a self-assembled monolayer selectively on the exposed metal surface and/or on the oxide surface. The method may also include growing a metal on the self-assembled monolayer and on the exposed metal surface if no self-assembled monolayer is present thereon, so as to fill the at least one through-hole, thereby forming at least one metal structure. The method may further include replacing the first sacrificial layer by a replacement dielectric layer having a dielectric constant of at most 3.9.

Abstract translation: 提供了一种用于制造半导体器件的方法，该半导体器件包括提供具有牺牲层的结构，所述牺牲层具有暴露金属表面和任选地氧化物表面的至少一个通孔。 在一个实例中，该方法可以包括在暴露的金属表面和/或氧化物表面上选择性地应用自组装单层。 该方法还可以包括在自组装单层上和暴露的金属表面上生长金属，如果不存在自组装单层，以便填充至少一个通孔，从而形成至少一个金属结构。 该方法还可以包括通过介电常数至多为3.9的置换介电层代替第一牺牲层。