公开(公告)号：US20150318272A1

公开(公告)日：2015-11-05

申请号：US14796682

申请日：2015-07-10

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Guenther Ruhl ,  Hans-Joerg Timme

IPC: H01L27/02 ,  H01L23/367 ,  H01L29/861 ,  H01L23/495 ,  H01L29/78 ,  H01L29/739 ,  H01L23/373 ,  H01L23/427

CPC classification number: H01L27/0251 ,  H01L23/367 ,  H01L23/3738 ,  H01L23/427 ,  H01L23/4275 ,  H01L23/49562 ,  H01L23/525 ,  H01L23/62 ,  H01L24/32 ,  H01L27/24 ,  H01L27/2436 ,  H01L29/0634 ,  H01L29/1608 ,  H01L29/41725 ,  H01L29/42376 ,  H01L29/435 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/7801 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/861 ,  H01L29/8611 ,  H01L45/128 ,  H01L2224/32245 ,  H01L2924/0002 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/00

Abstract: A semiconductor device includes a transistor having a plurality of transistor cells in a semiconductor body. Each transistor cell includes a control terminal and first and second load terminals. The transistor further includes a phase change material exhibiting a solid-solid phase change at a phase transition temperature Tc between 150° C. and 400° C. The control terminals of the plurality of transistor cells are electrically connected to one another.

Abstract translation: 半导体器件包括在半导体本体中具有多个晶体管单元的晶体管。 每个晶体管单元包括控制端子和第一和第二负载端子。 晶体管还包括相变材料，其在150℃和400℃之间的相变温度Tc下表现出固相变化。多个晶体管单元的控制端子彼此电连接。

公开(公告)号：US20150214303A1

公开(公告)日：2015-07-30

申请号：US14166553

申请日：2014-01-28

Applicant: Infineon Technologies AG

Inventor： Guenther Ruhl ,  Raimund Foerg

IPC: H01L29/16 ,  H01L21/285 ,  H01L21/02 ,  H01L29/45

CPC classification number: H01L29/1606 ,  H01L21/043 ,  H01L21/28518 ,  H01L21/28556 ,  H01L29/45 ,  H01L29/66015

Abstract: An electrical or electronic device is disclosed. In some embodiments, an electrical device includes a single-layer graphene part extending in a lateral direction and a multi-layer graphene structure laterally contacting the single-layer graphene part. The electrical or electronic device further includes a graphite part in contact with a surface of the multi-layer graphene structure. In other embodiments, an electrical device includes a graphene part extending in a lateral direction and a graphite part is configured to provide a lateral contact for the graphene part.

Abstract translation: 公开了电气或电子设备。 在一些实施例中，电气装置包括沿横向方向延伸的单层石墨烯部分和横向接触单层石墨烯部分的多层石墨烯结构。 电气或电子设备还包括与多层石墨烯结构的表面接触的石墨部分。 在其它实施例中，电气装置包括在横向方向上延伸的石墨烯部分，并且石墨部分构造成为石墨烯部分提供侧向接触。

公开(公告)号：US20150171045A1

公开(公告)日：2015-06-18

申请号：US14105414

申请日：2013-12-13

Applicant: Infineon Technologies AG

Inventor： Rudolf Berger ,  Guenther Ruhl ,  Wolfgang Lehnert ,  Roland Rupp

IPC: H01L23/00

CPC classification number: H01L24/33 ,  H01L21/02002 ,  H01L21/187 ,  H01L21/6835 ,  H01L24/83 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/32225 ,  H01L2224/83055 ,  H01L2224/83099 ,  H01L2224/83851 ,  H01L2224/83855 ,  H01L2924/1026 ,  Y10T428/30

Abstract: A compound structure including a carrier wafer and at least one semiconductor piece bonded onto the carrier wafer by a bonding material obtained by a ceramic-forming polymer precursor.

Abstract translation: 一种复合结构，包括载体晶片和通过陶瓷形成聚合物前体获得的接合材料结合到载体晶片上的至少一个半导体片。

公开(公告)号：US20150102807A1

公开(公告)日：2015-04-16

申请号：US14514415

申请日：2014-10-15

Applicant: Infineon Technologies AG

Inventor： Markus Eckinger ,  Stefan Kolb ,  Alfons Dehe ,  Guenther Ruhl

IPC: G01R33/07 ,  G01R33/00 ,  H01L43/14 ,  H01L27/092

CPC classification number: G01R33/072 ,  G01R33/0052 ,  H01L27/092 ,  H01L43/065 ,  H01L43/14

Abstract: A Hall Effect sensor with a graphene detection layer implemented in a variety of geometries, including the possibility of a so-called “full 3-d” Hall sensor, with the option for integration in a BiCMOS process and a method for producing said Hall Effect sensor is disclosed.

Abstract translation: 具有以各种几何形式实现的石墨烯检测层的霍尔效应传感器，包括所谓的“全3-d”霍尔传感器的可能性，其具有用于集成BiCMOS工艺的选项和用于产生所述霍尔效应的方法 传感器。

公开(公告)号：US20140374906A1

公开(公告)日：2014-12-25

申请号：US13921284

申请日：2013-06-19

Applicant: Infineon Technologies AG

Inventor： Guenther Ruhl ,  Klemens Pruegl

IPC: H01L21/768 ,  H01L23/498

CPC classification number: H01L21/02524 ,  H01L21/02422 ,  H01L21/0243 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/0405 ,  H01L21/2254 ,  H01L21/7685 ,  H01L29/04 ,  H01L29/0669 ,  H01L29/1075 ,  H01L29/16 ,  H01L29/1606 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/66037 ,  H01L29/778

Abstract: In various embodiments, a method for processing a carrier is provided. The method for processing a carrier may include: forming a first catalytic metal layer over a carrier; forming a source layer over the first catalytic metal layer; forming a second catalytic metal layer over the source layer, wherein the thickness of the second catalytic metal layer is larger than the thickness of the first catalytic metal layer; and subsequently performing an anneal to enable diffusion of the material of the source layer forming an interface layer adjacent to the surface of the carrier from the diffused material of the source layer.

Abstract translation: 在各种实施例中，提供了一种处理载体的方法。 用于处理载体的方法可以包括：在载体上形成第一催化金属层; 在所述第一催化金属层上形成源层; 在所述源层上形成第二催化金属层，其中所述第二催化金属层的厚度大于所述第一催化金属层的厚度; 并且随后进行退火以使源层的材料与源层的扩散材料形成与载体表面相邻的界面层的扩散。

公开(公告)号：US10670474B2

公开(公告)日：2020-06-02

申请号：US15369057

申请日：2016-12-05

Applicant: Infineon Technologies AG

Inventor： Christian Kegler ,  Johannes Georg Laven ,  Hans-Joachim Schulze ,  Guenther Ruhl ,  Joachim Mahler

IPC: G01K7/16 ,  H01L35/04 ,  H01L35/18 ,  H01L35/14 ,  H01L29/16 ,  H01L29/20

Abstract: Temperature sensor devices and corresponding methods are provided. A temperature sensor may include a first layer being essentially non-conductive in a temperature range and a second layer having a varying resistance in the temperature range.

公开(公告)号：US20190123148A1

公开(公告)日：2019-04-25

申请号：US16224225

申请日：2018-12-18

Applicant: Infineon Technologies AG

Inventor： Roland Rupp ,  Guenther Ruhl ,  Hans-Joachim Schulze

IPC: H01L29/16 ,  H01L21/324 ,  H01L21/02 ,  H01L29/417 ,  H01L29/08 ,  H01L29/36 ,  H01L21/265

CPC classification number: H01L29/1608 ,  H01L21/02444 ,  H01L21/02494 ,  H01L21/02529 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/26506 ,  H01L21/324 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/083 ,  H01L29/1606 ,  H01L29/36 ,  H01L29/413 ,  H01L29/41725 ,  H01L29/7802

Abstract: A method for forming a silicon carbide semiconductor device includes forming at least one graphene layer on a surface of a semiconductor substrate and forming a silicon carbide layer of the silicon carbide semiconductor device on the at least one graphene layer. At least one of forming the silicon carbide layer and forming the at least one graphene layer includes: heating the semiconductor substrate an inert gas atmosphere until a predefined temperature is reached.

公开(公告)号：US20190081143A1

公开(公告)日：2019-03-14

申请号：US16188994

申请日：2018-11-13

Applicant: Infineon Technologies AG

Inventor： Guenther Ruhl ,  Gunther Lippert ,  Hans-Joachim Schulze ,  Thomas Zimmer

IPC: H01L29/16 ,  H01L21/20 ,  H01L21/02 ,  H01L21/78 ,  H01L29/06 ,  H01L21/762 ,  H01L21/683 ,  H01L21/56 ,  H01L21/18 ,  H01L29/165 ,  H01L29/04 ,  H01L21/265 ,  H01L21/324

CPC classification number: H01L29/1606 ,  H01L21/02002 ,  H01L21/02447 ,  H01L21/02494 ,  H01L21/02527 ,  H01L21/02529 ,  H01L21/02587 ,  H01L21/02609 ,  H01L21/02612 ,  H01L21/02658 ,  H01L21/187 ,  H01L21/2007 ,  H01L21/26506 ,  H01L21/324 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76251 ,  H01L21/76254 ,  H01L21/78 ,  H01L29/04 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/165 ,  H01L2221/6835 ,  H01L2221/68377 ,  H01L2221/68381

Abstract: A method for manufacturing a semiconductor device includes: providing a carrier wafer and a silicon carbide wafer; forming a first graphene material on a first side of the silicon carbide wafer; bonding the first side of the silicon carbide wafer with the first graphene material to the carrier wafer; and splitting the silicon carbide wafer bonded to the carrier wafer into a silicon carbide layer thinner than the silicon carbide wafer and a residual silicon carbide wafer, the silicon carbide layer remaining bonded to the carrier wafer during the splitting.

公开(公告)号：US20190077671A1

公开(公告)日：2019-03-14

申请号：US16183192

申请日：2018-11-07

Applicant: Infineon Technologies AG

Inventor： Guenther Ruhl ,  Matthias Koenig

IPC: C01B32/194 ,  G01R33/07 ,  B81C1/00 ,  H04R19/01

CPC classification number: C01B32/194 ,  B81B2201/0292 ,  B81C1/00158 ,  B81C1/00658 ,  C01B2204/02 ,  C01B2204/22 ,  G01R33/07 ,  H04R19/016

Abstract: A process for the formation of a graphene membrane component includes arranging a graphene membrane in a relaxed condition of the graphene membrane on a surface of a supportive substrate. The graphene membrane extends across a cut-out with an opening at the surface of the supportive substrate. The graphene membrane is moreover arranged so that a first portion of the graphene membrane is arranged on the surface of the supportive substrate and a second portion of the graphene membrane is arranged over the opening of the cut-out. The process further includes tensioning of the second portion of the graphene membrane, in order to convert the second portion of the graphene membrane to a tensioned condition, so that the second portion of the graphene membrane is permanently in the tensioned condition in an operating temperature range of the graphene membrane component.

公开(公告)号：US09935042B2

公开(公告)日：2018-04-03

申请号：US15609136

申请日：2017-05-31

Applicant: Infineon Technologies AG

Inventor： Thomas Spoettl ,  Frank Pueschner ,  Guenther Ruhl ,  Peter Stampka

IPC: H01L23/48 ,  H01L23/498 ,  H01L25/065 ,  H01L23/367 ,  H01L23/495 ,  G06K19/07 ,  G06K19/077 ,  H05K1/11 ,  H01L23/00 ,  H01L23/34

CPC classification number: H01L23/498 ,  G06K19/072 ,  G06K19/07309 ,  G06K19/077 ,  H01L23/34 ,  H01L23/3675 ,  H01L23/49537 ,  H01L23/573 ,  H01L24/73 ,  H01L25/0657 ,  H05K1/113

Abstract: A semiconductor package includes a chip, a layer which is thermally coupled to the chip and which is formed from a material having a triggering temperature of greater than or equal to 200° C., starting from which an exothermic reaction takes place, and encapsulating material which at least partly covers the chip and the layer. The layer is configured in such a way and is arranged relative to the chip in such a way that, in the case of a triggered exothermic reaction of the material of the layer, at least one component of the chip is damaged on account of the temperature increase caused by the exothermic reaction.