公开(公告)号：US5880497A

公开(公告)日：1999-03-09

申请号：US592235

申请日：1996-01-26

申请人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

发明人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

IPC分类号： H01L27/11

CPC分类号： H01L27/1108 ,  Y10S257/903 ,  Y10S257/904

摘要： A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.

摘要翻译： 其存储单元被构造成包括由字线控制的转移MISFET和具有驱动器MISFET和负载MISFET的触发器电路的SRAM。 固定在预定电源线上的大面积平板电极布置在负载MISFET上，使得负载MISFET的偏移区域上的平板电极形成开口。 在半导体衬底的主表面上形成的转移MISFET和驱动器MISFET上形成具有可渗透氢而不湿度的氮化硅膜，以及沉积在驱动器MISFET上的多晶硅膜形成的负载MISFET。

公开(公告)号：US5508540A

公开(公告)日：1996-04-16

申请号：US190596

申请日：1994-02-02

申请人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

发明人： Shuji Ikeda ,  Koichi Imato ,  Kazuo Yoshizaki ,  Kohji Yamasaki ,  Soichiro Hashiba ,  Keiichi Yoshizumi ,  Yasuko Yoshida ,  Kousuke Okuyama ,  Mitsugu Oshima ,  Kazushi Tomita ,  Tsuyoshi Tabata ,  Kazushi Fukuda ,  Junichi Takano ,  Toshiaki Yamanaka ,  Chiemi Hashimoto ,  Motoko Kawashima ,  Fumiyuki Kanai ,  Takashi Hashimoto

IPC分类号： H01L27/11 ,  H01L27/108 ,  H01L29/04 ,  H01L29/76

CPC分类号： H01L27/1108 ,  Y10S257/903 ,  Y10S257/904

摘要： A SRAM having its memory cell constructed to include transfer MISFETs to be controlled by word lines and a flip-flop circuit having driver MISFETs and load MISFETs. Plate electrodes of large area fixed on predetermined power source lines are arranged over the load MISFETs such that the plate electrodes over the offset region of the load MISFETs are formed with an opening. A silicon nitride film having a thickness permeable to hydrogen but not to humidity is formed over the transfer MISFETs and the driver MISFETs formed over the main surface of a semiconductor substrate and the load MISFETs formed of a polycrystalline silicon film deposited on the driver MISFETs.

摘要翻译： 其存储单元被构造成包括由字线控制的转移MISFET和具有驱动器MISFET和负载MISFET的触发器电路的SRAM。 固定在预定电源线上的大面积平板电极布置在负载MISFET上，使得负载MISFET的偏移区域上的平板电极形成开口。 在半导体衬底的主表面上形成的转移MISFET和驱动器MISFET上形成具有可渗透氢而不湿度的氮化硅膜，以及沉积在驱动器MISFET上的多晶硅膜形成的负载MISFET。

公开(公告)号：US5143847A

公开(公告)日：1992-09-01

申请号：US441475

申请日：1989-11-27

申请人： Mitsuo Kawase ,  Yasuko Yoshida ,  Hitoshi Yonekawa

发明人： Mitsuo Kawase ,  Yasuko Yoshida ,  Hitoshi Yonekawa

IPC分类号： C12M1/40 ,  C12N11/14

CPC分类号： C12M21/18 ,  C12M25/18

摘要： An enzyme-fixed bioreactor, including a reaction column, enzyme-fixed catalyst particles uniformly and densely filled in the reaction column, the catalyst particles being composed of carrier sepiolite particles consisting essentially of sepiolite and an enzyme carried on the surface of the carrier sepiolite particles. The bioreactor has stable heat resistant and chemical properties, high productivity, and is economically superior to prior art, without fear of destruction of the catalyst, short path, and clogging in the reaction column.

摘要翻译： 一种酶固定生物反应器，包括反应柱，酶固定的催化剂颗粒，均匀且密集地填充在反应塔中，催化剂颗粒由主要由海泡石组成的载体海泡石颗粒和承载在载体海泡石颗粒表面上的酶组成 。 该生物反应器具有稳定的耐热性和化学性质，高生产率，并且在经济上优于现有技术，而不用担心催化剂破坏，短路径和反应柱堵塞。

公开(公告)号：US20090218608A1

公开(公告)日：2009-09-03

申请号：US12362995

申请日：2009-01-30

申请人： Akio NISHIDA ,  Yasuko Yoshida ,  Shuji Ikeda

发明人： Akio NISHIDA ,  Yasuko Yoshida ,  Shuji Ikeda

IPC分类号： H01L27/11

CPC分类号： H01L27/11 ,  H01L27/1104

摘要： In order to provide a semiconductor integrated circuit device such as a high-performance semiconductor integrated circuit device capable of reducing a soft error developed in each memory cell of a SRAM, the surface of a wiring of a cross-connecting portion, of a SRAM memory cell having a pair of n-channel type MISFETs whose gate electrodes and drains are respectively cross-connected, is formed in a shape that protrudes from the surface of a silicon oxide film. A silicon nitride film used as a capacitive insulating film, and an upper electrode are formed on the wiring. A capacitance can be formed of the wiring, the silicon nitride film and the upper electrode.

摘要翻译： 为了提供一种半导体集成电路器件，例如能够减少在SRAM的每个存储单元中产生的软错误的高性能半导体集成电路器件，SRAM存储器的交叉连接部分的布线表面 其栅电极和漏极分别交叉连接的一对n沟道型MISFET形成为从氧化硅膜的表面突出的形状。 在布线上形成用作电容绝缘膜的氮化硅膜和上电极。 电容可以由布线，氮化硅膜和上电极形成。

公开(公告)号：US20080268453A1

公开(公告)日：2008-10-30

申请号：US12068434

申请日：2008-02-06

申请人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

发明人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

IPC分类号： C12Q1/68 ,  C07K16/00 ,  C07H21/00 ,  C40B40/08

CPC分类号： C12Q1/6881 ,  C12Q1/6886 ,  C12Q2600/118 ,  C12Q2600/178

摘要： A method for determining the prognosis of a CD5+DLBCL patient and a CD5-DLBCL patient is provided. It is determined that, in the chromosomal DNA from a patient with lymphoma, (1) the prognosis of the CD5+DLBCL patient with amplification of 13q21.1-q31.3 region is poor; (2) the prognosis of the CD5+DLBCL patient with deletion of 1p36.21-p36.13 region is poor; and (3) the prognosis of the CD5-DLBCL patient with amplification of 5p15.33-p14.2 region is good.

摘要翻译： 提供了一种确定CD5 + DLBCL患者和CD5-DLBCL患者预后的方法。 确定在淋巴瘤患者的染色体DNA中，（1）扩增13q21.1-q31.3区域的CD5 + DLBCL患者的预后差; （2）缺失1p36.21-p36.13区域的CD5 + DLBCL患者的预后差; 和（3）扩增5p15.33-p14.2区域的CD5-DLBCL患者的预后良好。

公开(公告)号：US20050287541A1

公开(公告)日：2005-12-29

申请号：US10947249

申请日：2004-09-23

申请人： Akira Nakagawara ,  Miki Ohira ,  Shin Ishii ,  Takeshi Goto ,  Hiroyuki Kubo ,  Takahiro Hirata ,  Yasuko Yoshida ,  Saichi Yamada

发明人： Akira Nakagawara ,  Miki Ohira ,  Shin Ishii ,  Takeshi Goto ,  Hiroyuki Kubo ,  Takahiro Hirata ,  Yasuko Yoshida ,  Saichi Yamada

IPC分类号： C12M1/34 ,  C12Q1/68

CPC分类号： C12Q1/6883 ,  C12Q1/6886 ,  C12Q2600/118

摘要： A microarray for predicting the prognosis of neuroblastoma, wherein the microarray has 25 to 45 probes related to good prognosis, which are hybridized to a gene transcript whose expression is increased in a good prognosis patient with neuroblastoma and are selected from 96 polynucleotides consisting of the nucleotide sequences of Seq. ID No. 1 to 96 or their partial continuous sequences or their complementary strands, and 25 to 45 probes related to poor prognosis, which are hybridized to a gene transcript whose expression is increased in a poor prognosis patient with neuroblastoma and are selected from 104 polynucleotides consisting of the nucleotide sequences of Seq. ID No. 97 to 200 or their partial continuous sequences or their complementary strands.

摘要翻译： 一种用于预测神经母细胞瘤的预后的微阵列，其中所述微阵列具有与良好预后相关的25至45个探针，其与在具有神经母细胞瘤的良好预后患者中表达增加的基因转录物杂交，并且选自96个由核苷酸 序列Seq。 ID No.1至96或其部分连续序列或其互补链，以及与不良预后相关的25至45个探针，其与在具有神经母细胞瘤的不良预后患者中表达增加的基因转录物杂交并选自104个多核苷酸 由Seq的核苷酸序列组成。 ID号97至200或其部分连续序列或其互补链。

公开(公告)号：US20050282177A1

公开(公告)日：2005-12-22

申请号：US10946068

申请日：2004-09-22

申请人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

发明人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

IPC分类号： C12M1/34 ,  C12Q1/68

CPC分类号： C12Q1/6881 ,  C12Q1/6886 ,  C12Q2600/118 ,  C12Q2600/178

摘要： A method for determining the prognosis of a CD5+DLBCL patient and a CD5−DLBCL patient is provided. It is determined that, in the chromosomal DNA from a patient with lymphoma, (1) the prognosis of the CD5+DLBCL patient with amplification of 13q21.1-q31.3 region is poor; (2) the prognosis of the CD5+DLBCL patient with deletion of 1p36.21-p36.13 region is poor; and (3) the prognosis of the CD5−DLBCL patient with amplification of 5p15.33-p14.2 region is good.

摘要翻译： 提供了一种确定CD5 + DLBCL患者和CD5-DLBCL患者预后的方法。 确定在淋巴瘤患者的染色体DNA中，（1）扩增13q21.1-q31.3区域的CD5 + DLBCL患者的预后差; （2）缺失1p36.21-p36.13区域的CD5 + DLBCL患者的预后差; 和（3）扩增5p15.33-p14.2区域的CD5-DLBCL患者的预后良好。

公开(公告)号：US06897499B2

公开(公告)日：2005-05-24

申请号：US10359678

申请日：2003-02-07

申请人： Akio Nishida ,  Noriyuki Yabuoshi ,  Yasuko Yoshida ,  Kazuhiro Komori ,  Sousuke Tsuji ,  Hideo Miwa ,  Mitsuhiro Higuchi ,  Koichi Imato

发明人： Akio Nishida ,  Noriyuki Yabuoshi ,  Yasuko Yoshida ,  Kazuhiro Komori ,  Sousuke Tsuji ,  Hideo Miwa ,  Mitsuhiro Higuchi ,  Koichi Imato

IPC分类号： H01L21/8234 ,  G11C11/412 ,  H01L21/335 ,  H01L21/8244 ,  H01L27/088 ,  H01L27/105 ,  H01L27/11 ,  H01L29/423 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L27/11 ,  G11C11/412 ,  H01L27/105 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/4238

摘要： A gate electrode of each MISFET is formed on a substrate in an active region whose periphery is defined by an element isolation trench, and crosses the active region so as to extend from one end thereof to the other end thereof. The gate electrode has a gate length in a boundary region defined between the active region and the element isolation trench which is greater than a gate length in a central portion of the active region. The gate electrode is configured in an H-type flat pattern. Further, the gate electrode covers the whole of one side extending along a gate-length direction, of the boundary region defined between the active region L and the element isolation trench, and parts of two sides thereof extending along a gate-width direction. The MISFETs are formed in electrically separated wells and are connected in series to constitute part of a reference voltage generating circuit.

摘要翻译： 每个MISFET的栅电极形成在其周围由元件隔离沟槽限定的有源区中的衬底上，并且穿过有源区从其一端延伸到另一端。 栅极电极在有源区域和元件隔离沟槽之间限定的边界区域中的栅极长度大于有源区域的中心部分中的栅极长度。 栅电极配置为H型平面图案。 此外，栅电极覆盖沿着栅极长度方向延伸的整个一侧，限定在有源区域L和元件隔离沟槽之间的边界区域以及沿栅极宽度方向延伸的两侧的部分。 MISFET形成在电分离的阱中并且串联连接以构成参考电压产生电路的一部分。

公开(公告)号：US06821854B2

公开(公告)日：2004-11-23

申请号：US10211262

申请日：2002-08-05

申请人： Takayuki Kanda ,  Atsushi Hiraiwa ,  Norio Suzuki ,  Satoshi Sakai ,  Shuji Ikeda ,  Yasuko Yoshida ,  Shinichi Horibe

发明人： Takayuki Kanda ,  Atsushi Hiraiwa ,  Norio Suzuki ,  Satoshi Sakai ,  Shuji Ikeda ,  Yasuko Yoshida ,  Shinichi Horibe

IPC分类号： H01L218234

CPC分类号： H01L21/823878 ,  H01L21/823857

摘要： A protection film is formed on a silicon oxide film 6 formed on the surface of a semiconductor substrate, a silicon oxide film is removed from a region where a thin gate-insulating film is to be formed by using, as a mask, a photoresist pattern that covers a region where a thick gate-insulating film is to be formed, and, then, the photoresist pattern is removed followed by washing. Then, the semiconductor substrate is heat-oxidized or a film is deposited thereon to form gate-insulating films having different thicknesses.

摘要翻译： 在形成于半导体基板的表面的氧化硅膜6上形成保护膜，利用光刻胶图案作为掩模，从要形成薄栅极绝缘膜的区域去除氧化硅膜 覆盖要形成厚栅极绝缘膜的区域，然后去除光致抗蚀剂图案，然后洗涤。 然后，半导体衬底被热氧化或在其上沉积膜以形成具有不同厚度的栅极绝缘膜。

公开(公告)号：US06764945B2

公开(公告)日：2004-07-20

申请号：US09822318

申请日：2001-04-02

申请人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

发明人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

IPC分类号： H01L214763

CPC分类号： H01L21/2855 ,  H01L21/28556 ,  H01L21/32051 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76877 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： In order to form a good contact between metallizations and improve the reliability and product yield of a semiconductor integrated circuit device, a plug is formed in a contact hole by depositing a first sputter film inside of the contact hole by traditional sputtering, depositing a second sputter film over the first sputter film by long throw sputtering, depositing a W film over the second sputtering film by CVD and removing the first and second sputter films and the W film from the outside of the contact hole. The barrier properties can be improved by constituting a barrier film from the first sputter film and second sputter film which are different in directivity.

摘要翻译： 为了在金属化之间形成良好的接触并提高半导体集成电路器件的可靠性和产品产量，通过传统溅射在接触孔内部沉积第一溅射膜，在接触孔中形成插塞，沉积第二溅射 通过长溅射溅射第一溅射膜上的膜，通过CVD在第二溅射膜上沉积W膜，并从接触孔的外部除去第一和第二溅射膜和W膜。 可以通过从方向性不同的第一溅射膜和第二溅射膜构成阻挡膜来改善阻挡性。