公开(公告)号：US07943001B2

公开(公告)日：2011-05-17

申请号：US11649203

申请日：2007-01-04

Applicant: Takashi Nakagawa ,  Seiichi Sugano ,  Kenji Iida ,  Yasutomo Maehara ,  Hitoshi Suzuki ,  Kaoru Sugimoto ,  Kenji Fukuzono ,  Takashi Kanda ,  Hiroaki Date ,  Tomohisa Yagi

Inventor： Takashi Nakagawa ,  Seiichi Sugano ,  Kenji Iida ,  Yasutomo Maehara ,  Hitoshi Suzuki ,  Kaoru Sugimoto ,  Kenji Fukuzono ,  Takashi Kanda ,  Hiroaki Date ,  Tomohisa Yagi

IPC: H04K3/34

CPC classification number: H05K3/4614 ,  H05K3/321 ,  H05K3/361 ,  H05K3/4069 ,  H05K2201/0218 ,  H05K2203/0425 ,  H05K2203/0568 ,  H05K2203/063 ,  Y10T29/49117

Abstract: A process for producing a multilayer board includes the steps of applying a bonding ink to the terminal of the first substrate, the bonding ink including a thermosetting resin containing a filler and a curing agent, the filler being formed of metal particles plated with solder, the metal particles each having a first melting point, and the solder having a second melting point lower than the first melting point; bonding the second substrate to a bonding sheet composed of a thermosetting resin and having a through hole disposed in a portion corresponding to the terminal of the second substrate; and heating and pressurizing the first and second substrates with the bonding sheet in such a manner that the terminals are opposite each other to effect curing of the bonding sheet and the bonding ink and to form an integral structure.

Abstract translation: 一种制造多层板的方法包括以下步骤：将粘合油墨施加到第一基板的端子上，粘合油墨包括含有填料和固化剂的热固性树脂，填料由镀有焊料的金属颗粒形成， 金属颗粒各自具有第一熔点，并且焊料具有低于第一熔点的第二熔点; 将第二基板接合到由热固性树脂构成的接合片，并且具有设置在与第二基板的端子对应的部分中的通孔; 并且利用接合片以这样的方式对第一和第二基板进行加热和加压，使得端子彼此相对以实现粘合片和粘合油墨的固化并形成一体结构。

公开(公告)号：US07291901B2

公开(公告)日：2007-11-06

申请号：US10803879

申请日：2004-03-19

Applicant: Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

Inventor： Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

IPC: H01L23/02 ,  H01L23/48

CPC classification number: H01L23/642 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/49833 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2201/10977 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.

Abstract translation: 包装方法，包装结构和包装是能够抑制薄膜基板翘曲的基板，提高产品收率，并且在安装具有高放热量的LSI的情况下建立足够的冷却能力的基板。 本发明的封装基板1使得在第一基板12中形成开口11，在第一基板12上层叠薄膜基板（第二基板）13，开口11被薄膜基板13覆盖 。 接下来，将电容器（第一电子部件）14插入到开口11中并且结合到薄膜基板上，树脂15将开口11的内部填充到固定或更大的厚度并被硬化，薄膜基板13 并且电容器14由树脂15维持，应该连接到电容器14的LSI 16（第二电子部件）被接合到薄膜基板13的暴露侧的表面上，并且电容器 14连接到LSI 16。

公开(公告)号：US07268002B2

公开(公告)日：2007-09-11

申请号：US11265107

申请日：2005-11-03

Applicant: Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

Inventor： Masateru Koide ,  Misao Umematsu ,  Takashi Kanda ,  Yasuhiro Usui ,  Kenji Fukuzono

IPC: H01L21/66 ,  H01L21/44

CPC classification number: H01L23/642 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/4006 ,  H01L23/49833 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/15311 ,  H01L2924/19106 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/141 ,  H05K1/182 ,  H05K3/3436 ,  H05K2201/049 ,  H05K2201/09072 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2201/10977 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A packaging method, a packaging structure and a package is substrate capable of restraining a warp of a thin film substrate, increasing a product yield, and building up a sufficient cooling capacity in the case of mounting an LSI having a high exothermic quantity. A package substrate 1 of the invention is such that an opening 11 is formed in a first substrate 12, a thin film substrate (a second substrate) 13 is laminated on the first substrate 12, the opening 11 is covered with the thin film substrate 13. Next, a capacitor (a first electronic part) 14 is inserted into the opening 11 and bonded to the thin film substrate, a resin 15 fills an interior of the opening 11 to a fixed or larger thickness and is hardened, the thin film substrate 13 and the capacitor 14 are thereby sustained by the resin 15, an LSI 16 (a second electronic part) that should be connected to the capacitor 14 is bonded to a surface, on an exposed side, of the thin film substrate 13, and the capacitor 14 is connected to the LSI 16.

公开(公告)号：US20070200209A1

公开(公告)日：2007-08-30

申请号：US11500879

申请日：2006-08-09

Applicant: Kenji Fukuzono

Inventor： Kenji Fukuzono

IPC: H01L23/495

CPC classification number: H01L23/42 ,  H01L23/04 ,  H01L23/3675 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012

Abstract: A semiconductor device includes a semiconductor element mounted on a substrate; at least one electronic part arranged around the semiconductor element; and a heat radiation member bonded to a backside of the semiconductor element by a bonding material. The heat radiation member has an isolation part extending between an outer circumference of the semiconductor element and the electronic part.

Abstract translation: 半导体器件包括安装在衬底上的半导体元件; 布置在所述半导体元件周围的至少一个电子部件; 以及通过接合材料接合到半导体元件的背面的散热构件。 散热构件具有在半导体元件的外周和电子部件之间延伸的隔离部。

公开(公告)号：US20050266213A1

公开(公告)日：2005-12-01

申请号：US10998062

申请日：2004-11-29

Applicant: Takashi Kanda ,  Kenji Fukuzono ,  Manabu Watanabe

Inventor： Takashi Kanda ,  Kenji Fukuzono ,  Manabu Watanabe

IPC: H05K1/09 ,  B32B3/00 ,  H05K1/00 ,  H05K1/11 ,  H05K3/32 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K3/462 ,  H05K3/321 ,  H05K3/4069 ,  H05K3/4602 ,  H05K2201/0218 ,  H05K2201/068 ,  H05K2203/0425 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: A layered board includes a core layer that serves as a printed board, a buildup layer that is electrically connected to the core layer, the buildup layer including an insulation part and a wiring part, and a junction layer that electrically connects and bonds the core layer with the buildup layer, wherein the junction layer includes an adhesive and metallic particles contained in the adhesive, wherein each of the metallic particles has a first melting point, serves as a filler, and is plated with solder having a second melting point lower than the first melting point.

Abstract translation: 分层板包括用作印刷电路板的芯层，与芯层电连接的积层，积层层包括绝缘部分和布线部分，以及将芯层电连接和结合的接合层 其中所述接合层包括粘合剂和包含在所述粘合剂中的金属颗粒，其中所述金属颗粒具有第一熔点，用作填料，并且镀有第二熔点低于所述粘合剂的焊料 第一熔点

公开(公告)号：US08933558B2

公开(公告)日：2015-01-13

申请号：US13593733

申请日：2012-08-24

Applicant: Manabu Watanabe ,  Kenji Fukuzono

Inventor： Manabu Watanabe ,  Kenji Fukuzono

IPC: H01L23/10 ,  H01L23/34 ,  H01L23/367 ,  H01L23/40 ,  H01L23/42

CPC classification number: H01L23/10 ,  H01L23/3675 ,  H01L23/4006 ,  H01L23/42 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/19105 ,  H01L2924/3511

Abstract: A semiconductor package which is allocated between a wiring board and a cooling member, the semiconductor package, includes: a package board; a heating element which is mounted on the package board; a chip part which is mounted on the package board and provided around the heating element; and a heat transfer element having a main body unit which is jointed to the heating element with a metal joint material and a leg part which extends from the main body part to the package board and of which a tip is attached to the package board, and wherein the leg part, comprising: a first leg part allocated in a corner of the package board; and a second leg part which is allocated inside the first leg part between the heating element and the chip part on the package board.

Abstract translation: 分配在布线板和冷却构件之间的半导体封装，所述半导体封装包括：封装板; 安装在所述封装板上的加热元件; 芯片部分，其安装在封装板上并设置在加热元件周围; 以及传热元件，其具有主体单元，该主体单元用金属接合材料接合到所述加热元件，所述腿部从所述主体部分延伸到所述封装板，并且其顶端附接到所述封装板，以及 其中所述腿部包括：分配在所述包装板的角部中的第一腿部; 以及分配在所述加热元件和所述封装板上的所述芯片部分之间的所述第一腿部内的第二腿部。

公开(公告)号：US08119923B2

公开(公告)日：2012-02-21

申请号：US12188257

申请日：2008-08-08

Applicant: Hideaki Yoshimura ,  Kenji Fukuzono ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Takashi Nakagawa ,  Shin Hirano ,  Takashi Kanda

Inventor： Hideaki Yoshimura ,  Kenji Fukuzono ,  Kenji Iida ,  Tomoyuki Abe ,  Yasutomo Maehara ,  Takashi Nakagawa ,  Shin Hirano ,  Takashi Kanda

IPC: H05K1/00 ,  B32B9/00

CPC classification number: H05K1/0366 ,  H05K1/0271 ,  H05K1/056 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/09145 ,  Y10T428/24917 ,  Y10T428/24926

Abstract: A circuit board has a low thermal expansion coefficient that suits the thermal expansion coefficient of an element to be mounted thereupon and can prevent the occurrence of delamination and cracking of a core layer when the circuit board is used in a low temperature environment. The circuit board is constructed by laminating a core layer and at least one wiring layer, where the at least one wiring layer has slightly smaller external dimensions in a planar direction than the core layer.

Abstract translation: 电路板具有适合要安装的元件的热膨胀系数的低热膨胀系数，并且可以防止当在低温环境中使用电路板时芯层的分层和破裂的发生。 电路板通过层叠芯层和至少一个布线层而构成，其中至少一个布线层在平面方向上具有比芯层稍小的外部尺寸。

公开(公告)号：US20110100690A1

公开(公告)日：2011-05-05

申请号：US12915786

申请日：2010-10-29

Applicant: Hideaki Yoshimura ,  Kenji Fukuzono ,  Takashi Kanda ,  Tomohisa Yagi ,  Hiroki Ikeda ,  Katsu Yanagimoto

Inventor： Hideaki Yoshimura ,  Kenji Fukuzono ,  Takashi Kanda ,  Tomohisa Yagi ,  Hiroki Ikeda ,  Katsu Yanagimoto

IPC: H05K1/02 ,  B32B15/08 ,  B23K35/12 ,  H01B1/02 ,  B23K31/02

CPC classification number: H05K3/4614 ,  H01B1/02 ,  H01B1/026 ,  H01L2224/16225 ,  H01L2924/01322 ,  H01L2924/01327 ,  H05K1/186 ,  H05K3/1216 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4069 ,  H05K3/4647 ,  H05K2201/0272 ,  H05K2201/09036 ,  H05K2201/10992 ,  Y10T428/31678 ,  H01L2924/00

Abstract: An electrically conductive body includes: a first electrically conductive material; a second electrically conductive material; and a bonding material bonding the first electrically conductive material to the second electrically conductive material at least for electric conduction. The bonding material is made of a metallic structure containing copper-tin based intermetallic compound phases and tin-bismuth phases, the copper-tin based intermetallic compound phases being continuous between the first electrically conductive material and the second electrically conductive material, the tin-bismuth phases being surrounded by the copper-tin based intermetallic compound phases.

Abstract translation: 导电体包括：第一导电材料; 第二导电材料; 以及至少用于导电的将第一导电材料接合到第二导电材料的接合材料。 接合材料由含有铜 - 锡基金属间化合物相和锡 - 铋相的金属结构制成，铜 - 锡基金属间化合物相在第一导电材料和第二导电材料之间连续，锡 - 铋 相被铜 - 锡基金属间化合物相包围。

公开(公告)号：US20100151632A1

公开(公告)日：2010-06-17

申请号：US12712604

申请日：2010-02-25

Applicant: Takashi KANDA ,  Kenji Fukuzono

Inventor： Takashi KANDA ,  Kenji Fukuzono

IPC: H01L21/56

CPC classification number: H01L24/83 ,  H01L21/6835 ,  H01L23/36 ,  H01L24/29 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/81101 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83102 ,  H01L2224/838 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/1517 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19106 ,  H05K3/323 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/467 ,  H05K2201/10378 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/01083 ,  H01L2224/05599

Abstract: A semiconductor device includes a multi-layer substrate and a semiconductor element mounted on the multi-layer substrate. The multi-layer substrate contains a plurality of circuit-formation layers joined by a first resin material. The semiconductor element is mounted on the multi-layer substrate by being joined to the multi-layer substrate by a second resin material. The first resin material and the second resin material are curable in the same heating condition.

Abstract translation: 半导体器件包括多层基板和安装在多层基板上的半导体元件。 多层基板包含由第一树脂材料连接的多个电路形成层。 半导体元件通过第二树脂材料与多层基板接合而安装在多层基板上。 第一树脂材料和第二树脂材料在相同的加热条件下可固化。

公开(公告)号：US20070012477A1

公开(公告)日：2007-01-18

申请号：US11231871

申请日：2005-09-22

Applicant: Naoaki Nakamura ,  Hideaki Yoshimura ,  Kenji Fukuzono ,  Toshihisa Sato

Inventor： Naoaki Nakamura ,  Hideaki Yoshimura ,  Kenji Fukuzono ,  Toshihisa Sato

IPC: H01L23/34

CPC classification number: B23K35/26 ,  B23K35/3006 ,  B23K35/3601 ,  B23K2101/40 ,  B32B15/01 ,  B32B15/018 ,  C22C28/00 ,  H01L23/3735 ,  H01L23/3736 ,  H01L24/32 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2224/05599

Abstract: An electronic component is mounted on the surface of a printed wiring board. A heat conductive member is received on the surface of the electronic component. A joint material is interposed between the electronic component and the heat conductive member. The joint material is made of material containing Ag in a range exceeding 3 wt % and In. The inventors have demonstrated that voids decrease at the boundary between the joint material and the electronic component as well as at the boundary between the joint material and the heat conductive member as the content of Ag increases in the overall weight of the joint material. The joint material is allowed to enjoy a higher heat conductivity as compared with a conventional solder material. The joint material allows the heat conductive member to efficiently receive heat from the electronic component.

Abstract translation: 电子部件安装在印刷电路板的表面上。 导电构件被容纳在电子部件的表面上。 在电子部件和导热部件之间插入有接合材料。 接头材料由含有Ag超过3重量％的In的材料制成。 本发明人已经证明，在接头材料和电子部件之间的边界以及接头材料和导热部件之间的边界处，随着Ag含量的增加，接头材料的总重量的增加，空隙减小。 与常规焊料材料相比，使接合材料具有更高的导热性。 接合材料允许导热构件有效地从电子部件接收热量。