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公开(公告)号:US11690159B2
公开(公告)日:2023-06-27
申请号:US17284060
申请日:2019-10-25
Applicant: ASML Netherlands B.V.
Inventor: Bob Rollinger , Georgiy Olegovich Vaschenko , Chirag Rajyaguru , Alexander Igorevich Ershov , Joshua Mark Lukens , Mathew Cheeran Abraham
IPC: H05G2/00
CPC classification number: H05G2/006
Abstract: Disclosed is a system for generating EUV radiation in which current flowing through target material in the orifice 320 of a nozzle in a droplet generator is controlled by providing alternate lower impedance paths for the current and/or by limiting a high frequency component of a drive signal applied to the droplet generator.
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公开(公告)号:US11688694B2
公开(公告)日:2023-06-27
申请号:US16927805
申请日:2020-07-13
Applicant: ASML Netherlands B.V.
Inventor: Johannes Cornelis Jacobus De Langen , Marcel Nicolaas Jacobus van Kervinck , Vincent Sylvester Kuiper
IPC: H01L23/00 , H01L23/544 , G06K19/06 , G06F21/44 , G09C5/00 , G06F21/73 , H04L9/40 , G06K7/14 , H01L25/065 , H04L9/14 , H04L9/32
CPC classification number: H01L23/544 , G06F21/44 , G06F21/73 , G06K7/1417 , G06K19/06037 , G06K19/06178 , G09C5/00 , H01L25/0652 , H04L9/14 , H04L9/3271 , H04L63/08 , G06F2221/2103 , H01L2223/5444 , H01L2223/54413 , H01L2223/54433
Abstract: An electronic device comprising a semiconductor chip which comprises a plurality of structures formed in the semiconductor chip, wherein the semiconductor chip is a member of a set of semiconductor chips, the set of semiconductor chips comprises a plurality of subsets of semiconductor chips, and the semiconductor chip is a member of only one of the subsets. The plurality of structures of the semiconductor chip includes a set of common structures which is the same for all of the semiconductor chips of the set, and a set of non-common structures, wherein the non-common structures of the semiconductor chip of the subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a first portion of the non-common structures and a first portion of the common structures form a first non-common circuit, wherein the first non-common circuit of the semiconductor chips of each subset is different from a non-common circuit of the semiconductor chips in every other subset. At least a second portion of the non-common structures is adapted to store or generate a first predetermined value which uniquely identifies the first non-common circuit, wherein the first predetermined value is readable from outside the semiconductor chip by automated reading means.
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公开(公告)号:US11687007B2
公开(公告)日:2023-06-27
申请号:US17423325
申请日:2020-01-09
Applicant: ASML NETHERLANDS B.V.
Inventor: Arnaud Hubaux , Johan Franciscus Maria Beckers , Dylan John David Davies , Johan Gertrudis Cornelis Kunnen , Willem Richard Pongers , Ajinkya Ravindra Daware , Chung-Hsun Li , Georgios Tsirogiannis , Hendrik Cornelis Anton Borger , Frederik Eduard De Jong , Juan Manuel Gonzalez Huesca , Andriy Hlod , Maxim Pisarenco
IPC: G03F1/70 , G03F7/30 , G03F7/00 , G06F30/392
CPC classification number: G03F7/70508 , G03F1/70 , G03F7/70616 , G06F30/392 , G05B2219/45028 , G05B2219/45031
Abstract: A method for categorizing a substrate subject to a semiconductor manufacturing process including multiple operations, the method including: obtaining values of functional indicators derived from data generated during one or more of the multiple operations on the substrate, the functional indicators characterizing at least one operation; applying a decision model including one or more threshold values to the values of the functional indicators to obtain one or more categorical indicators; and assigning a category to the substrate based on the one or more categorical indicators.
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公开(公告)号:US11681231B2
公开(公告)日:2023-06-20
申请号:US17686586
申请日:2022-03-04
Applicant: ASML NETHERLANDS B.V.
CPC classification number: G03F7/705 , G03F7/70616 , G03F7/70641 , G03F9/7026 , G03F9/7046 , G03F9/7076 , G03F9/7084
Abstract: A method for selecting an optimal set of locations for a measurement or feature on a substrate, the method includes: defining a first candidate solution of locations, defining a second candidate solution with locations based on modification of a coordinate in a solution domain of the first candidate solution, and selecting the first and/or second candidate solution as the optimal solution according to a constraint associated with the substrate.
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205.
公开(公告)号:US11675281B2
公开(公告)日:2023-06-13
申请号:US17626896
申请日:2020-06-15
Applicant: ASML NETHERLANDS B.V.
Inventor: Jin Dai , Sanjaysingh Lalbahadoersing
IPC: G03F9/00
CPC classification number: G03F9/7088 , G03F9/7076
Abstract: A resonant amplitude grating mark has a periodic structure configured to scatter radiation incident on the mark. The scattering is mainly by coupling of the incident radiation to a waveguiding mode in the periodic structure. The effective refractive indexes and lengths of portions of the periodic structure are configured to provide an optical path length of the unit cell in the direction of periodicity that essentially equals an integer multiple of a wavelength present in the radiation. The effective refractive indexes and lengths of the portions are also configured to provide an optical path length of the second portion in the direction of periodicity that is selected from 0.30 to 0.49 of the wavelength present in the spectrum of the radiation.
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公开(公告)号:US11675274B2
公开(公告)日:2023-06-13
申请号:US16484582
申请日:2018-02-21
Applicant: ASML NETHERLANDS B.V.
Inventor: Yongfa Fan , Leiwu Zheng , Mu Feng , Qian Zhao , Jen-Shiang Wang
CPC classification number: G03F7/705 , G03F1/80 , G03F7/70625 , H01L22/34
Abstract: A method involving determining an etch bias for a pattern to be etched using an etch step of a patterning process based on an etch bias model, the etch bias model including a formula having a variable associated with a spatial property of the pattern or with an etch plasma species concentration of the etch step, and including a mathematical term including a natural exponential function to the power of a parameter that is fitted or based on an etch time of the etch step; and adjusting the patterning process based on the determined etch bias.
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公开(公告)号:US20230178328A1
公开(公告)日:2023-06-08
申请号:US17913141
申请日:2021-03-18
Applicant: ASML Netherlands B.V.
Inventor: Yongxin WANG , Zhonghua DONG , Xiaoyu JI , Shahedul HOQUE , Weiming REN , Xuedong LIU , Guofan YE , Kuo-Chin CHIEN
IPC: H01J37/147
CPC classification number: H01J37/1474 , H01J2237/1504
Abstract: An apparatus includes a first charged particle beam manipulator positioned in a first layer configured to influence a charged particle beam and a second charged particle beam manipulator positioned in a second layer configured to influence the charged particle beam. The first and second charged particle beam manipulators may each include a plurality of electrodes having a first set of opposing electrodes and a second set of opposing electrodes. A first driver system electrically connected to the first set may be configured to provide a plurality of discrete output states to the first set. A second driver system electrically connected to the second set may be configured to provide a plurality of discrete output states to the second set. The first and second charged-particle beam manipulators may each comprise a plurality of segments; and a controller having circuitry configured to individually control operation of each of the plurality of segments.
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公开(公告)号:US20230176492A1
公开(公告)日:2023-06-08
申请号:US18161140
申请日:2023-01-30
Applicant: Carl Zeiss SMT GmbH , ASML NETHERLANDS B.V.
Inventor: Toralf GRUNER , Norman BAER , Koos VAN BERKEL , Laurentius Johannes Adrianus VAN BOKHOVEN , Maike LORENZ , Thomas MONZ , Eva SCHNEIDER , Hans-Michael STIEPAN , Bob STREEFKERK , André DIRAUF
CPC classification number: G03F7/70891 , G02B7/1815 , G02B2207/101 , G03F7/707
Abstract: Disclosed are an optical system, in particular for microlithography, and a method for operating an optical system. According to one disclosed aspect, the optical system includes at least one mirror (100, 500, 600) having an optical effective surface (101, 501, 601) and a mirror substrate (110, 510, 610), wherein at least one cooling channel (115, 515, 615) in which a cooling fluid is configured to flow is arranged in the mirror substrate, for dissipating heat that is generated in the mirror substrate due to absorption of electromagnetic radiation incident from a light source on the optical effective surface, and a unit (135, 535, 635) to adjust the temperature and/or the flow rate of the cooling fluid either dependent on a measured quantity that characterizes the thermal load in the mirror substrate or dependent on an estimated/expected thermal load in the mirror substrate for a given power of the light source.
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209.
公开(公告)号:US20230176491A1
公开(公告)日:2023-06-08
申请号:US17923913
申请日:2021-04-21
Applicant: ASML Netherlands B.V.
Inventor: Olger Victor ZWIER , Maurits VAN DER SCHAAR , Hilko Dirk BOS , Hans VAN DER LAAN , S.M. Masudur Rahman AL ARIF , Henricus Wilhelmus Maria Van Buel , Armand Eugene Albert KOOLEN , Victor CALADO , Kaustuve BHATTACHARYYA , Jin LIAN , Sebastianus Adrianus GOORDEN , Hui Quan LIM
IPC: G03F7/20
CPC classification number: G03F7/70641 , G03F7/70558 , G03F7/70633 , G03F7/70625
Abstract: Disclosed is a substrate and associated patterning device. The substrate comprises at least one target arrangement suitable for metrology of a lithographic process, the target arrangement comprising at least one pair of similar target regions which are arranged such that the target arrangement is, or at least the target regions for measurement in a single direction together are, centrosymmetric. A metrology method is also disclosed for measuring the substrate. A metrology method is also disclosed comprising which comprises measuring such a target arrangement and determining a value for a parameter of interest from the scattered radiation, while correcting for distortion of the metrology apparatus used.
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公开(公告)号:US11668661B2
公开(公告)日:2023-06-06
申请号:US17019149
申请日:2020-09-11
Applicant: ASML Netherlands B.V.
Inventor: Thomas Jarik Huisman , Sander Frederik Wuister , Hermanus Adrianus Dillen , Dorothea Maria Christina Oorschot
CPC classification number: G01N23/2251 , G03F1/84 , G03F7/7085 , G03F7/70608 , G06T7/0004 , G06T7/62 , G01N2223/07 , G01N2223/401 , G01N2223/507 , G06T2207/10061 , G06T2207/30148
Abstract: Apparatuses, systems, and methods for inspecting a semiconductor sample are disclosed. In some embodiments, the sample may comprise a structure having a plurality of openings in a top layer of the structure. In some embodiments, the method may comprise generating an image of the structure using a SEM; inspecting an opening of the plurality of openings by determining a dimension of the opening based on the image and determining an open-state of the opening, based on a contrast of the image; and determining a quality of the opening based on both the determined dimension and the determined open-state of the opening.
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