公开(公告)号：US20150103199A1

公开(公告)日：2015-04-16

申请号：US14516310

申请日：2014-10-16

Applicant: STMicroelectronics S.r.I.

Inventor： Danilo Pietro Pau

IPC: G06K9/46 ,  G06T7/00 ,  G06K9/62

CPC classification number: G06K9/4647 ,  G06K9/4671 ,  G06K9/6212 ,  G06T7/97 ,  G06T2207/10004 ,  G06T2207/20021 ,  G06T2207/20024 ,  G06T2207/20076

Abstract: Compact descriptors of digital images are produced by detecting interest points representative of the digital images and selecting out of the interest points key points for producing e.g. local and global compact descriptors of the images. The digital images are decomposed into blocks by computing an energy (variance) for each said block and then subjecting the blocks to culling by rejecting those blocks having an energy failing to pass an energy threshold. The interest points are detected only in the blocks resulting from culling, and the key points for producing the compact descriptors are selected out of the interest points thus detected, possibly by using different selection thresholds for local and global compact descriptors, respectively. The number of key points for producing the compact descriptors may be varied e.g. by adaptively varying the number of the interest points detected in the blocks resulting from culling.

Abstract translation: 通过检测表示数字图像的兴趣点并选择兴趣点的关键点来产生数字图像的紧凑描述符，以产生例如数字图像。 本地和全局紧凑的图像描述符。 通过计算每个所述块的能量（方差），然后通过拒绝具有能量未能通过能量阈值的能量块来对数字图像分解成块。 仅在由剔除产生的块中检测到兴趣点，并且可能通过分别对于本地和全局紧凑描述符使用不同的选择阈值，从所检测的兴趣点中选出用于产生紧凑描述符的关键点。 用于生成紧凑描述符的关键点的数量可以是变化的。 通过自适应地改变在淘汰中产生的块中检测到的兴趣点的数量。

公开(公告)号：US20150091753A1

公开(公告)日：2015-04-02

申请号：US14461568

申请日：2014-08-18

Applicant: STMicroelectronics S.r.I.

Inventor： Giovanni Gogliettino

IPC: G01S19/27

CPC classification number: G01S19/27 ,  B64G1/1085 ,  B64G1/242 ,  B64G3/00

Abstract: A method of predicting the orbit of a satellite of a satellite positioning system, including: associating first and second types of satellites with first and second models of celestial mechanics forces, respectively; storing first ephemerides data of a satellite, associated to first time intervals and second ephemerides data associated to second time intervals. Further, the method comprises: calculating reference satellite positions based on the first ephemerides data; estimating first and second satellite positions in the first time intervals by using the second ephemerides data and the first and second forces models, respectively; determining first and second estimate errors by comparing the reference positions with the first and second positions, respectively; and detecting the type of satellite between the first and second types by an analysis of the first and second errors.

Abstract translation: 一种预测卫星定位系统的卫星的方法，包括：分别将第一和第二类卫星与第一和第二模型的天体力学力相关联; 存储与第一时间间隔相关联的卫星的第一星历数据和与第二时间间隔相关联的第二星历数据。 此外，该方法包括：基于第一星历数据计算参考卫星位置; 通过使用第二星历数据和第一和第二力模型分别在第一时间间隔估计第一和第二卫星位置; 通过将参考位置与第一和第二位置进行比较来确定第一和第二估计误差; 以及通过分析第一和第二误差来检测第一和第二类型之间的卫星的类型。

公开(公告)号：US20150052411A1

公开(公告)日：2015-02-19

申请号：US14496196

申请日：2014-09-25

Applicant: STMICROELECTRONICS S.r.I.

Inventor： Franco CESARI

IPC: G01R31/3177 ,  G01R31/317

CPC classification number: G01R31/3177 ,  G01R31/31725 ,  G01R31/31727 ,  G01R31/318552 ,  G01R31/318594

Abstract: An embodiment is directed to extended test coverage of complex multi-clock-domain integrated circuits without forgoing a structured and repeatable standard approach, thus avoiding custom solutions and freeing the designer to implement his RTL code, respecting only generally few mandatory rules identified by the DFT engineer. Such an embodiment is achieved by introducing in the test circuit an embodiment of an additional functional logic circuit block, named “inter-domain on chip clock controller” (icOCC), interfaced with every suitably adapted clock-gating circuit (OCC), of the different clock domains. The icOCC actuates synchronization among the different OCCs that source the test clock signals coming from an external ATE or ATPG tool and from internal at-speed test clock generators to the respective circuitries of the distinct clock domains. Scan structures like the OCCs, scan chain, etc., may be instantiated at gate pre-scan level, with low impact onto the functional RTL code written by the designer.

Abstract translation: 一个实施例涉及复杂的多时钟域集成电路的扩展测试覆盖，而不需要结构化和可重复的标准方法，因此避免了定制解决方案并释放设计者来实现他的RTL代码，仅仅遵循由DFT识别的一般强制规则 工程师。 这种实施例通过在测试电路中引入与每个适当适配的时钟门控电路（OCC）接口的附加功能逻辑电路块（称为“片上时钟控制器”（icOCC））的实施例， 不同的时钟域。 icOCC启动不同OCC之间的同步，它们将来自外部ATE或ATPG工具的测试时钟信号和从内部at速度测试时钟发生器输出到不同时钟域的相应电路。 诸如OCC，扫描链等的扫描结构可以在门预扫描级别实例化，对由设计者编写的功能RTL代码具有低影响。

公开(公告)号：US20150023587A1

公开(公告)日：2015-01-22

申请号：US14336763

申请日：2014-07-21

Applicant: STMicroelectronics S.r.I.

Inventor： Massimiliano Barone

IPC: G06T7/00

CPC classification number: G06T7/0075 ,  G06T7/593 ,  G06T2207/10028

Abstract: A depth map is generated from at least a first and a second image. Generally, a plurality of reference pixels are selected in the first image and associated with respective pixels in the second image. Next, the disparity between each reference pixel and the respective pixel in said second image is determined, and for each reference pixel a depth value as a function of the respective disparity. In particular, each reference pixel is associated with a respective pixel in the second image via a matching and a filtering operation. The matching operation selects for each reference pixel a plurality of candidate pixels in the second image and associates with each candidate pixel a respective cost function value and a respective disparity value.

Abstract translation: 从至少第一和第二图像生成深度图。 通常，在第一图像中选择多个参考像素并与第二图像中的相应像素相关联。 接下来，确定所述第二图像中的每个参考像素和相应像素之间的差异，并且对于每个参考像素，确定作为相应视差的函数的深度值。 特别地，每个参考像素经由匹配和滤波操作与第二图像中的相应像素相关联。 匹配操作为每个参考像素选择第二图像中的多个候选像素，并且将每个候选像素与相应的成本函数值和相应的视差值相关联。

公开(公告)号：US20140312954A1

公开(公告)日：2014-10-23

申请号：US14256689

申请日：2014-04-18

Applicant: STMicroelectronics S.r.I.

Inventor： Davide Ugo Ghisu ,  Sandro Rossi ,  Antonio Ricciardo

IPC: H03K3/356

CPC classification number: H03K3/356113 ,  H03K5/12 ,  H03K19/00361

Abstract: A multi-level shifter includes a first branch having first and second transistors coupled between a higher voltage terminal and a lower voltage terminal. The multi-level shifter comprises a second branch, in parallel with the first branch, having: a third transistor, coupled between said higher voltage reference terminal and an output node, a fourth switching transistor coupled between said output node and said lower voltage terminal. Said third and fourth transistors have respective control terminals controlled by drain terminals of said first and second transistors, respectively. The shifter includes a bidirectional battery coupled between said drain terminals of said first and second transistors to supply first and second voltages having the same magnitude and different polarities. Said fourth transistor is controlled according to the first voltage when said first transistor is turned on and said third transistor is controlled according to the second voltage when said second transistor is turned on.

Abstract translation: 多电平移位器包括具有耦合在较高电压端子和较低电压端子之间的第一和第二晶体管的第一支路。 多电平移位器包括与第一分支并联的第二分支，具有：耦合在所述高电压参考端和输出节点之间的第三晶体管，耦合在所述输出节点和所述下电压端之间的第四开关晶体管。 所述第三和第四晶体管分别具有由所述第一和第二晶体管的漏极端子控制的各个控制端子。 移位器包括耦合在所述第一和第二晶体管的所述漏极端子之间的双向电池，以提供具有相同幅度和不同极性的第一和第二电压。 当所述第一晶体管导通时，所述第四晶体管根据所述第一电压被控制，并且当所述第二晶体管导通时，根据所述第二电压来控制所述第三晶体管。

公开(公告)号：US20140299949A1

公开(公告)日：2014-10-09

申请号：US14312307

申请日：2014-06-23

Applicant: STMicroelectronics S.r.I.

Inventor： Sebastiano Conti ,  Benedetto Vigna ,  Mario Francesco Cortese

IPC: H04R19/00 ,  H04R19/04

CPC classification number: B81C1/00158 ,  B81B3/0018 ,  B81B7/0061 ,  B81B2201/0257 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48479 ,  H01L2924/00014 ,  H01L2924/16151 ,  H01L2924/16152 ,  H04R1/04 ,  H04R1/06 ,  H04R1/086 ,  H04R1/2838 ,  H04R19/005 ,  H04R19/04 ,  H04R2201/003 ,  H01L2224/48471 ,  H01L2224/4554 ,  H01L2924/00012

Abstract: A microelectromechanical-acoustic-transducer assembly has: a first die integrating a MEMS sensing structure having a membrane, which has a first surface in fluid communication with a front chamber and a second surface, opposite to the first surface, in fluid communication with a back chamber of the microelectromechanical acoustic transducer, is able to undergo deformation as a function of incident acoustic-pressure waves, and faces a rigid electrode so as to form a variable-capacitance capacitor; a second die, integrating an electronic reading circuit operatively coupled to the MEMS sensing structure and supplying an electrical output signal as a function of the capacitive variation; and a package, housing the first die and the second die and having a base substrate with external electrical contacts. The first and second dice are stacked in the package and directly connected together mechanically and electrically; the package delimits at least one of the front and back chambers.

Abstract translation: 微机电声换能器组件具有：集成具有膜的MEMS感测结构的第一模具，其具有与前室相反流体连通的第一表面和与第一表面相对的第二表面，其与背面流体连通 微机电声换能器的腔室能够经受作为入射声压波函数的变形，并且面向刚性电极以形成可变电容电容器; 集成了可操作地耦合到MEMS感测结构并且提供作为电容变化的函数的电输出信号的电子阅读电路; 以及包装体，其容纳所述第一模具和所述第二模具，并且具有带有外部电触点的基底基板。 第一和第二骰子堆叠在包装中并机械和电气直接连接在一起; 该包装限定前室和后室中的至少一个。

公开(公告)号：US20140283605A1

公开(公告)日：2014-09-25

申请号：US14220979

申请日：2014-03-20

Applicant: STMicroelectronics S.r.I.

Inventor： Leonardo Baldasarre ,  Alessandro Tocchio ,  Sarah Zerbini

IPC: G01P15/125

CPC classification number: G01P15/125 ,  G01P2015/0831 ,  G01P2015/0837

Abstract: A z-axis micro-electro-mechanical detection structure, having a substrate defining a plane and a suspended mass carried by two anchorage elements. The suspended mass includes a translating mass, suspended over the substrate, mobile in a transverse direction to the plane and arranged between the anchorage elements and two tilting masses, each of which is supported by the anchorage elements through respective elastic anchorage elements so as to be able to rotate with respect to respective oscillation axes. The oscillation axes are parallel to each other to enable a translation movement of the translating mass. Fixed electrodes face at a distance the tilting masses or the translating mass so as to be able to detect displacement of the suspended mass as a result of external forces. Elastic supporting elements are arranged between the translating mass and the tilting masses to enable relative rotation between the translating mass and the tilting masses.

Abstract translation: z轴微电子机械检测结构，其具有限定平面的基板和由两个锚固元件承载的悬架。 悬挂质量包括悬浮在基板上的平移质量块，在横向方向移动到平面并且布置在锚固元件和两个倾斜块之间，每个倾斜块通过相应的弹性锚固元件由锚固元件支撑，以便是 能够相对于各个摆动轴线旋转。 振荡轴线彼此平行，以便平移质量的平移运动。 固定电极面对倾斜质量或平移质量的距离，以便能够检测由于外力而导致的悬浮质量的位移。 弹性支撑元件设置在平移质量块和倾斜质量块之间，以实现平移质量块与倾斜质量块之间的相对旋转。

公开(公告)号：US20140084397A1

公开(公告)日：2014-03-27

申请号：US14030867

申请日：2013-09-18

Applicant: STMicroelectronics S.r.I.

Inventor： Federico Giovanni Ziglioli

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0021 ,  B81B7/007 ,  B81B2207/012 ,  B81B2207/096 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/0792 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/00014

Abstract: A wafer-level package for a MEMS integrated device, envisages: a first body integrating a micromechanical structure; a second body having an active region integrating an electronic circuit, coupled to the micromechanical structure; and a third body defining a covering structure for the first body. The second body defines a base portion of the package and has an inner surface coupled to which is the first body, and an outer surface provided on which are electrical contacts towards the electronic circuit; a routing layer has an inner surface set in contact with the outer surface of the second body and an outer surface that carries electrical contact elements towards the external environment. The third body defines a covering portion for covering the package and is directly coupled to the second body for closing a housing space for the first body.

Abstract translation: 用于MEMS集成器件的晶片级封装设想：集成微机械结构的第一体; 具有集成电子电路的有源区域的第二主体，耦合到所述微机械结构; 以及限定第一主体的覆盖结构的第三主体。 所述第二主体限定所述包装的基部，并且具有联接到所述第一主体的内表面，并且设置在所述外表面上的电接触朝向所述电子电路的外表面; 路由层具有与第二主体的外表面接触的内表面和将电接触元件朝外部环境承载的外表面。 第三主体限定用于覆盖封装的覆盖部分，并且直接联接到第二主体以封闭用于第一主体的容纳空间。

公开(公告)号：US20140070345A1

公开(公告)日：2014-03-13

申请号：US14079976

申请日：2013-11-14

Applicant: STMICROELECTRONICS S.r.I.

Inventor： Alberto PAGANI ,  Giovanni GIRLANDO

IPC: H01L29/82

CPC classification number: H01L25/0657 ,  G01R1/07314 ,  G01R31/3025 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L25/16 ,  H01L28/10 ,  H01L29/82 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/29 ,  H01L2224/29199 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/293 ,  H01L2224/29399 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06531 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01059 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19042 ,  H01L2924/207 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01Q1/2283 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q7/00 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05552

Abstract: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.

Abstract translation: 具有至少部分由半导体材料制成且具有顶表面，底表面和侧表面的主体的集成电子设备的实施例和集成在主体中并且能够进行磁耦合或电磁耦合的第一天线 具有另外的天线的集成电子设备。 集成电子设备还具有由磁性材料制成的耦合区域，其在使用中提供第一天线和另外的天线之间的通信信道。

公开(公告)号：US20130335864A1

公开(公告)日：2013-12-19

申请号：US13901460

申请日：2013-05-23

Applicant: STMicroelectronics S.r.I.

Inventor： Calogero Andrea Trecarichi ,  Giovanni Luca Torrisi ,  Donato Tagliavia

IPC: H02H9/04

CPC classification number: H02H9/041 ,  F02D41/00 ,  F02D41/1479 ,  F02P3/051 ,  F02P3/055 ,  F02P9/002 ,  H03K17/166 ,  H03K17/168

Abstract: An electronic system to discharge a transformer in case of a failure during a charging phase of the transformer. The system includes the transformer having a primary winding with a first terminal connected to a battery voltage and with a second terminal for generating a primary voltage signal, includes a switch serially connected to the primary winding and having a control terminal carrying a control voltage signal for opening or closing the switch and includes an electronic circuit. The electronic circuit further includes a current generator and a voltage clamping.

Abstract translation: 一种在变压器充电阶段发生故障时对变压器进行放电的电子系统。 该系统包括具有初级绕组的变压器，第一端子连接到电池电压，并且具有用于产生初级电压信号的第二端子，包括串联连接到初级绕组的开关，并且具有控制端子，该控制端子承载用于 打开或关闭开关并且包括电子电路。 电子电路还包括电流发生器和电压钳位。