公开(公告)号：US20160099304A1

公开(公告)日：2016-04-07

申请号：US14507462

申请日：2014-10-06

Applicant: Intermolecular, Inc.

Inventor： Monica Mathur

IPC: H01L49/02

CPC classification number: H01L28/75 ,  H01L27/10805 ,  H01L28/65

Abstract: A capacitor stack includes a base bottom electrode layer including a conductive metal nitride material. A second bottom electrode layer is formed above the first bottom electrode layer. The second bottom electrode layer includes a conductive metal oxide material, wherein the crystal structure of the conductive metal oxide material promotes a desired high-k crystal phase of a subsequently deposited dielectric layer. A dielectric layer is formed above the second bottom electrode layer. A molybdenum nitride or a molybdenum oxy-nitride layer is formed above the dielectric layer. A fourth top electrode layer is formed above the third top electrode layer. The base top electrode layer includes a conductive metal nitride material.

Abstract translation: 电容器堆叠包括包括导电金属氮化物材料的基底电极层。 在第一底部电极层的上方形成第二底部电极层。 第二底部电极层包括导电金属氧化物材料，其中导电金属氧化物材料的晶体结构促进随后沉积的介电层的期望的高k结晶相。 在第二底部电极层的上方形成电介质层。 在电介质层上方形成氮化钼或氮氧化钼层。 第四上电极层形成在第三顶电极层的上方。 基极电极层包括导电金属氮化物材料。

公开(公告)号：US09305791B2

公开(公告)日：2016-04-05

申请号：US14135505

申请日：2013-12-19

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim

IPC: H01L21/8234 ,  H01L21/30 ,  B08B3/04 ,  G11C13/00 ,  H01L27/24 ,  C23C14/08 ,  C23C14/22 ,  C23C14/34 ,  H01L21/02 ,  H01L21/66 ,  H01L45/00 ,  H01L21/306 ,  H01L21/67 ,  C23C18/16 ,  C25D17/02 ,  B01J19/00

CPC classification number: H01L21/30 ,  B01J19/0046 ,  B01J2219/00283 ,  B01J2219/00286 ,  B01J2219/00301 ,  B01J2219/00313 ,  B01J2219/0038 ,  B01J2219/00382 ,  B01J2219/00416 ,  B01J2219/00418 ,  B01J2219/00527 ,  B01J2219/00585 ,  B08B3/04 ,  C23C14/08 ,  C23C14/22 ,  C23C14/34 ,  C23C18/1619 ,  C23C18/1682 ,  C25D17/02 ,  G11C13/0004 ,  H01L21/02104 ,  H01L21/30604 ,  H01L21/67051 ,  H01L21/67057 ,  H01L21/6719 ,  H01L22/10 ,  H01L22/12 ,  H01L22/14 ,  H01L27/2463 ,  H01L45/1608

Abstract: Combinatorial workflow is provided for evaluating materials and processes for current selector devices in a cross point memory array. Blanket layers, metal-insulator-metal devices, and compete memory structures are combinatorially fabricated on multiple regions of a substrate, with each region having a different material and process condition for the current selector devices. The current selector devices are then characterized, and the data are compared to obtain the optimum materials and processes.

Abstract translation: 组合工作流程用于评估交叉点存储器阵列中当前选择器设备的材料和过程。 毯子层，金属 - 绝缘体 - 金属器件和竞争存储器结构组合地制造在衬底的多个区域上，每个区域对于当前选择器器件具有不同的材料和工艺条件。 然后对当前的选择器装置进行表征，并比较数据以获得最佳材料和工艺。

公开(公告)号：US20160093625A1

公开(公告)日：2016-03-31

申请号：US14502728

申请日：2014-09-30

Applicant: Intermolecular, Inc.

Inventor： Xiangxin Rui ,  Imran Hashim ,  Prashant B. Phatak

IPC: H01L27/108 ,  H01L49/02

CPC classification number: H01L28/75 ,  H01L27/1085 ,  H01L28/55

Abstract: A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive base layer and conductive metal oxide layer. The dielectric layer may include zirconium oxide or doped zirconium oxide. In some embodiments, the conductive metal oxide layer includes niobium oxide.

Abstract translation: 形成金属绝缘体金属（MIM）DRAM电容器的第一电极层，其中第一电极层包含导电基底层和导电金属氧化物层。 电介质层可以包括氧化锆或掺杂氧化锆。 在一些实施例中，导电金属氧化物层包括氧化铌。

公开(公告)号：US09281463B2

公开(公告)日：2016-03-08

申请号：US14138656

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Frank Greer ,  Andy Steinbach

IPC: H01L39/24

CPC classification number: H01L39/2493

Abstract: Metal oxide tunnel barrier layers for superconducting tunnel junctions are formed by atomic layer deposition. Both precursors include a metal (which may be the same metal or may be different). The first precursor is a metal alkoxide with oxygen bonded to the metal, and the second precursor is an oxygen-free metal precursor with an alkyl-reactive ligand such as a halogen or methyl group. The alkyl-reactive ligand reacts with the alkyl group of the alkoxide, forming a detached by-product and leaving a metal oxide monolayer. The temperature is selected to promote the reaction without causing the metal alkoxide to self-decompose. The oxygen in the alkoxide precursor is bonded to a metal before entering the chamber and remains bonded throughout the reaction that forms the monolayer. Therefore, the oxygen used in this process has no opportunity to oxidize the underlying superconducting electrode.

公开(公告)号：US09275727B2

公开(公告)日：2016-03-01

申请号：US14627760

申请日：2015-02-20

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Dipankar Pramanik ,  David E Lazovsky ,  Tim Minvielle ,  Takeshi Yamaguchi

IPC: G11C11/00 ,  G11C11/56 ,  G11C13/00 ,  G11C7/10 ,  G11C7/22 ,  G11C7/12 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C11/56 ,  G11C7/1006 ,  G11C7/1051 ,  G11C7/1078 ,  G11C7/12 ,  G11C7/22 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/32 ,  G11C2213/33 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/145 ,  H01L45/1608

Abstract: A resistor array for multi-bit data storage without the need to increase the size of a memory chip or scale down the feature size of a memory cell contained within the memory chip is provided. The resistor array incorporates a number of discrete resistive elements to be selectively connected, in different series combinations, to at least one memory cell or memory device. In one configuration, by connecting each memory cell or device with at least one resistor array, a resistive switching layer found in the resistive switching memory element of the connected memory device is capable of being at multiple resistance states for storing multiple bits of digital information. During device programming operations, when a desired series combination of the resistive elements within the resistor array is selected, the resistive switching layer in the connected memory device can be in a desired resistance state.

公开(公告)号：US09246096B2

公开(公告)日：2016-01-26

申请号：US14624295

申请日：2015-02-17

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Zhendong Hong ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Hieu Pham ,  Takeshi Yamaguchi

IPC: H01L29/768 ,  H01L29/40 ,  H01L21/8222 ,  H01L21/20 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

公开(公告)号：US09246085B1

公开(公告)日：2016-01-26

申请号：US14338949

申请日：2014-07-23

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L45/08 ,  H01L27/24 ,  H01L27/2409 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/165 ,  H01L45/1658

Abstract: Filament size and shape in a ReRAM stack can be controlled by doping layers of a variable-resistance stack to change the crystallization temperature. This changes the density of the grain boundaries that form during annealing and provide minimal-resistance paths for the migration of charged defects. Hf, Zr, or Ti decreases the crystallization temperature and narrows the filament, while Si or N increases the crystallization temperature and widens the filament. Tapered filaments are of interest: The narrow tip requires little energy to break and re-form, enabling the cell to operate at low power, yet the wider body and base are insensitive to entropic behavior of small numbers of defects, enabling the cell to retain data for long periods.

Abstract translation: 可以通过掺杂可变电阻堆叠层来控制ReRAM堆叠中的长丝尺寸和形状来改变结晶温度。 这改变了在退火期间形成的晶界的密度，并且为带电缺陷的迁移提供了最小的电阻路径。 Hf，Zr或Ti会降低结晶温度并使丝变窄，而Si或N则会增加结晶温度并加长丝。 锥形丝是令人感兴趣的：窄尖端需要很少的能量来破坏和重新形成，使得细胞能够以低功率运行，但是更宽的身体和基部对少数缺陷的熵行为不敏感，使细胞保留 长时间的数据。

公开(公告)号：US09245793B2

公开(公告)日：2016-01-26

申请号：US14135182

申请日：2013-12-19

Applicant: Intermolecular, Inc.

Inventor： Ratsamee Limdulpaiboon ,  Frank Greer ,  Chi-I Lang ,  J. Watanabe ,  Wenxian Zhu

IPC: H01L21/31 ,  H01L21/768 ,  H01L21/3105 ,  H01J37/32

CPC classification number: H01L21/76841 ,  H01J37/32357 ,  H01J37/32449 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76843

Abstract: Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The plasma system may be used to generate activated species. The activated species can be used to treat the surfaces of low-k and/or ultra low-k dielectric materials to facilitate improved deposition of diffusion barrier materials.

Abstract translation: 公开了使用远程等离子体源的处理方法和装置。 该装置包括封闭衬底支撑件，远程等离子体源和喷头的外室。 基板加热器可以安装在基板支撑件中。 运输系统移动基板支撑件并且能够定位基板。 等离子体系统可用于产生活化物质。 活化物质可用于处理低k和/或超低k介电材料的表面，以促进扩散阻挡材料的改进沉积。

公开(公告)号：US09245649B2

公开(公告)日：2016-01-26

申请号：US14108877

申请日：2013-12-17

Applicant: Intermolecular Inc.

Inventor： Federico Nardi ,  Ryan C. Clarke ,  Yun Wang

IPC: G11C27/02 ,  G11C13/00

CPC classification number: G11C27/02 ,  G11C13/0002 ,  G11C13/0007

Abstract: A nonvolatile sample and hold circuit can include a resistive switching circuit, a sample circuit, a reset circuit, and a converter circuit. The resistive switching circuit can be operable to accept an input voltage Vg, and provide a resistance response Rrs that corresponds to the input signal Vg. The sampling circuit can be operable to sample an input signal such as an input voltage Vin, to provide a sampled voltage Vg. The reset circuit can be operable to reset the resistive switching circuit to a high resistance state. The converter circuit can be operable to convert the resistive switching circuit to an output voltage. The novel sample and hold circuit can have no issues related to charge injection, no settling time and instantaneous sampling time, together with potentially infinite hold time.

Abstract translation: 非易失性采样和保持电路可以包括电阻开关电路，采样电路，复位电路和转换器电路。 电阻开关电路可操作以接受输入电压Vg，并且提供对应于输入信号Vg的电阻响应Rrs。 采样电路可以用于对诸如输入电压Vin的输入信号进行采样，以提供采样电压Vg。 复位电路可以用于将电阻式开关电路复位到高电阻状态。 转换器电路可操作以将电阻开关电路转换成输出电压。 新颖的采样和保持电路可以没有与电荷注入相关的问题，无需建立时间和瞬间采样时间，以及潜在的无限延时时间。

公开(公告)号：US20160020388A1

公开(公告)日：2016-01-21

申请号：US14336830

申请日：2014-07-21

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1616 ,  H01L45/1625

Abstract: A variable resistance layer in a resistive non-volatile memory (ReRAM) cell changes its resistance in response to an applied signal by breaking and re-forming covalent bonds (e.g., in sub-stoichiometric silicon oxide). Resistivity decreases with increasing density of broken “dangling” bonds. When an electric field is applied, more dangling bonds are created, forming a filament of defects through which charge carriers can tunnel through the covalent layer. Passing a high current through the dangling-bond filament causes localized heating that re-forms the bonds. Optionally, an ionic oxide or nitride layer in contact with the covalent switching layer may serve as an oxygen source for thermal re-oxidation during the heating.

Abstract translation: 电阻式非易失性存储器（ReRAM）单元中的可变电阻层通过破坏和重新形成共价键（例如，在亚化学计量的氧化硅中）而响应于所施加的信号改变其电阻。 电阻率随断裂“悬挂”键密度的增加而降低。 当施加电场时，产生更多的悬挂键，形成电荷载流子穿过共价层的缺陷细丝。 将高电流通过悬挂键丝引起局部加热，重新形成粘结。 任选地，与共价开关层接触的离子氧化物或氮化物层可以用作加热期间的热再氧化的氧源。