-
公开(公告)号：US20100309638A1
公开(公告)日：2010-12-09
申请号：US12783792
申请日：2010-05-20
申请人： Da-Jung Chen , Chi-Feng Huang , Yi-Tsung Chen , Huei-Ren You , Jeng-Jen Li
发明人： Da-Jung Chen , Chi-Feng Huang , Yi-Tsung Chen , Huei-Ren You , Jeng-Jen Li
IPC分类号： H05K7/02
CPC分类号： H01L23/49861 , H01L23/49548 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49175 , H01L2224/73265 , H01L2924/01013 , H01L2924/01019 , H01L2924/01079 , H01L2924/16152 , H01L2924/181 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2224/48145 , H01L2924/00012
摘要： An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame.
摘要翻译： 提供了一种包括引线框架，绝缘层和至少一个电子元件的电子元件封装模块。 引线框架是图案化金属片，并且具有第一表面，与其相对的第二表面和从第一表面延伸到第二表面的通孔。 通过沟槽限定引线框架的基板部分周围的基板部分和多个引线部分。 引线框架的第二表面暴露在电子元件封装模块的外部。 布置在通孔中的绝缘层分别具有与第一表面和第二表面大致共面的第三表面和第四表面。 布置在第一表面上的电子元件连接到引线框架。
-
公开(公告)号：US06972479B2
公开(公告)日：2005-12-06
申请号：US10710201
申请日：2004-06-25
申请人： Da-Jung Chen , Tung-Yi Yang , Steven Liu
发明人： Da-Jung Chen , Tung-Yi Yang , Steven Liu
IPC分类号： H01L23/15 , H01L23/495 , H01L23/498 , H01L23/538 , H01L25/16 , H05K1/14 , H05K3/34 , H05K3/36
CPC分类号： H01L23/49861 , H01L23/5385 , H01L24/48 , H01L25/162 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H05K1/144 , H05K3/341 , H05K3/368 , H05K2201/10242 , H05K2201/10924 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package having a plurality of stacked substrates is provided. The package has at least two substrates. One substrate is stacked over the other to construct a three-dimensional circuit structure. Elements are disposed on the respective substrates. At least a conductive column is disposed between the two substrates. A lead-frame is connected to the substrates or the elements. The lead-frame also has a plurality of leads. The two neighboring substrates are electrically connected through the conductive column so that the average signal transmission length is shortened and the signal transmission quality is improved. Furthermore, the conductive column increases the mechanical strength of the package and reduces the degree of warping in the package so that a longer life span can be expected.
摘要翻译： 提供具有多个层叠基板的封装。 该封装具有至少两个基板。 一个衬底彼此堆叠以构造三维电路结构。 元件设置在相应的基板上。 至少一个导电柱设置在两个基板之间。 引线框架连接到基板或元件。 引线框架还具有多个引线。 两个相邻的基板通过导电柱电连接，使得平均信号传输长度缩短并且提高信号传输质量。 此外，导电柱增加了封装的机械强度并降低了封装中的翘曲程度，从而可以期待更长的寿命。
-
![[PACKAGE WITH STACKED SUBSTRATES]](/abs-image/US/2005/09/22/US20050205970A1/abs.jpg.150x150.jpg)
公开(公告)号：US20050205970A1
公开(公告)日：2005-09-22
申请号：US10710201
申请日：2004-06-25
申请人： Da-Jung Chen , Tung-Yi Yang , Steven Liu
发明人： Da-Jung Chen , Tung-Yi Yang , Steven Liu
IPC分类号： H01L23/15 , H01L23/495 , H01L23/498 , H01L23/538 , H01L25/16 , H05K1/14 , H05K3/34 , H05K3/36
CPC分类号： H01L23/49861 , H01L23/5385 , H01L24/48 , H01L25/162 , H01L2224/48091 , H01L2224/48247 , H01L2924/00014 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H05K1/144 , H05K3/341 , H05K3/368 , H05K2201/10242 , H05K2201/10924 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package having a plurality of stacked substrates is provided. The package has at least two substrates. One substrate is stacked over the other to construct a three-dimensional circuit structure. Elements are disposed on the respective substrates. At least a conductive column is disposed between the two substrates. A lead-frame is connected to the substrates or the elements. The lead-frame also has a plurality of leads. The two neighboring substrates are electrically connected through the conductive column so that the average signal transmission length is shortened and the signal transmission quality is improved. Furthermore, the conductive column increases the mechanical strength of the package and reduces the degree of warping in the package so that a longer life span can be expected.
摘要翻译： 提供具有多个层叠基板的封装。 该封装具有至少两个基板。 一个衬底彼此堆叠以构造三维电路结构。 元件设置在相应的基板上。 至少一个导电柱设置在两个基板之间。 引线框架连接到基板或元件。 引线框架还具有多个引线。 两个相邻的基板通过导电柱电连接，使得平均信号传输长度缩短并且提高信号传输质量。 此外，导电柱增加了封装的机械强度并降低了封装中的翘曲程度，从而可以期待更长的寿命。
-
公开(公告)号：US08824165B2
公开(公告)日：2014-09-02
申请号：US13185573
申请日：2011-07-19
申请人： Da-Jung Chen , Chau-Chun Wen , Chun-Tiao Liu
发明人： Da-Jung Chen , Chau-Chun Wen , Chun-Tiao Liu
IPC分类号： H05K5/02
CPC分类号： H05K1/181 , H01F27/027 , H01L2224/48091 , H01L2224/48227 , H01L2924/181 , H01L2924/19105 , H05K3/3421 , H05K2201/1003 , H05K2201/10515 , H05K2201/10537 , H05K2201/10924 , Y02P70/611 , H01L2924/00012 , H01L2924/00014
摘要： An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.
摘要翻译： 提供了包括至少一个第一电子元件，第二电子元件和引线框架的电子封装结构。 第二电子元件包括具有空腔的主体。 第一电子元件设置在空腔中。 引线框架具有多个引线。 每个引线具有第一端和第二端。 至少一个引线的第一端延伸到腔体以电连接第一电子元件。
-
公开(公告)号：US20100117216A1
公开(公告)日：2010-05-13
申请号：US12540021
申请日：2009-08-12
申请人： BAU-RU LU , Chau-Chun Wen , Da-Jung Chen , Chun-Hsien Lu
发明人： BAU-RU LU , Chau-Chun Wen , Da-Jung Chen , Chun-Hsien Lu
IPC分类号： H01L23/48
CPC分类号： H01L23/49811 , H01L23/36 , H01L23/3735 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48247 , H01L2224/49 , H01L2224/73265 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/1305 , H01L2924/13055 , H01L2924/15312 , H01L2924/1532 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip package structure including a substrate, at least one chip, a heat dissipation device, at least one first conductive bar, a molding compound, and at least one second conductive bar is provided. The chip and the heat dissipation device are respectively disposed on a first and a second surface of the substrate. The first conductive bar has two opposite end surfaces, wherein one end surface is disposed on the first surface of the substrate, the other end surface is extended away from the substrate, and a fastening slot is disposed between the two end surfaces and passes through the other end surface. The molding compound encapsulates the substrate, the chip, part of the heat dissipation device, and the first conductive bar. The second conductive bar is disposed on one surface of the molding compound and has a protrusion portion fastened to the fastening slot of the first conductive bar.
摘要翻译： 提供一种芯片封装结构，包括基板，至少一个芯片，散热装置，至少一个第一导电棒，模塑料和至少一个第二导电棒。 芯片和散热装置分别设置在基板的第一和第二表面上。 第一导电棒具有两个相对的端面，其中一个端面设置在基板的第一表面上，另一端表面远离基板延伸，并且紧固槽设置在两个端面之间并穿过 另一端面。 模塑料封装基板，芯片，散热装置的一部分和第一导电棒。 第二导电棒设置在模制化合物的一个表面上，并且具有紧固到第一导电棒的紧固槽的突起部分。
-
公开(公告)号：US06975513B2
公开(公告)日：2005-12-13
申请号：US10437183
申请日：2003-05-14
申请人： Da-Jung Chen , Chin-Hsiung Liao
发明人： Da-Jung Chen , Chin-Hsiung Liao
IPC分类号： H01L23/373 , H01L23/433 , H01L23/495 , H05K7/20
CPC分类号： H01L23/3735 , H01L23/4334 , H01L23/49575 , H01L24/48 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A high-density power module package wherein the circuits and a part of chips of the power module are formed on respective substrates such that the circuit patterns are not influenced by the chips. Accordingly, the density of the circuit can be improved so as to save the required area of substrate and production cost.
摘要翻译： 一种高密度功率模块封装，其中电路和功率模块的芯片的一部分形成在各个基板上，使得电路图案不受芯片的影响。 因此，可以提高电路的密度，以节省基板所需的面积和生产成本。
-
公开(公告)号：US09601412B2
公开(公告)日：2017-03-21
申请号：US13612852
申请日：2012-09-13
申请人： Da-Jung Chen , Chun-Tiao Liu , Chau-Chun Wen
发明人： Da-Jung Chen , Chun-Tiao Liu , Chau-Chun Wen
IPC分类号： H01L23/495 , H01L23/552 , H01L23/00 , H01L25/10
CPC分类号： H01L25/162 , H01L23/04 , H01L23/495 , H01L23/49517 , H01L23/49555 , H01L23/49558 , H01L23/49562 , H01L23/49575 , H01L23/49811 , H01L23/49861 , H01L23/552 , H01L23/645 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/105 , H01L25/16 , H01L2224/16245 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2225/1029 , H01L2924/00014 , H01L2924/09701 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.
-
公开(公告)号：US09386686B2
公开(公告)日：2016-07-05
申请号：US13450229
申请日：2012-04-18
申请人： Chi-Feng Huang , Bau-Ru Lu , Da-Jung Chen , Jeng-Jen Li
发明人： Chi-Feng Huang , Bau-Ru Lu , Da-Jung Chen , Jeng-Jen Li
CPC分类号： H05K1/0204 , H01L2224/48091 , H01L2224/48247 , H01L2224/48248 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H05K1/0203 , H05K1/021 , H05K1/181 , H05K1/184 , H05K3/445 , H05K2201/10515 , Y02P70/611 , H01L2924/00014 , H01L2924/00
摘要： An electronic package structure is provided which comprises a metal core PCB, an energy storage device and at least one electronic component. The at least one electronic component is disposed between the metal core PCB and the energy storage device. The metal core PCB defines at least a through hole. A thermal passage is disposed in the through hole. An insulating layer is disposed in the through hole and located between the metal layer of the metal core PCB and the thermal passage to prevent the electric coupling between the thermal passage and the metal layer. The energy storage device comprises at least a connecting pin in thermal contact with the thermal passage.
摘要翻译： 提供一种电子封装结构，其包括金属芯PCB，能量存储装置和至少一个电子元件。 至少一个电子部件设置在金属芯PCB和能量存储装置之间。 金属芯PCB至少定义一个通孔。 热通道设置在通孔中。 绝缘层设置在通孔中并且位于金属芯PCB的金属层和热通道之间，以防止热通道和金属层之间的电耦合。 能量存储装置至少包括与热通道热接触的连接销。
-
公开(公告)号：US08338928B2
公开(公告)日：2012-12-25
申请号：US11847351
申请日：2007-08-30
申请人： Da-Jung Chen , Chun-Tiao Liu , Chau-Chun Wen
发明人： Da-Jung Chen , Chun-Tiao Liu , Chau-Chun Wen
IPC分类号： H01L23/02
CPC分类号： H01L23/495 , H01L23/49555 , H01L23/49575 , H01L23/552 , H01L24/48 , H01L2224/48091 , H01L2924/00014 , H01L2924/13091 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The shielding layer is disposed between the control component and at least part of the magnetic body to inhibit or reduce EMI (Electro-Magnetic Interference) from the energy storage element and to get a tiny package structure. The three-dimensional package structure is applicable to a POL (Point of Load) converter.
-
公开(公告)号：US08253041B2
公开(公告)日：2012-08-28
申请号：US12783792
申请日：2010-05-20
申请人： Da-Jung Chen , Chi-Feng Huang , Yi-Tsung Chen , Huei-Ren You , Jeng-Jen Li
发明人： Da-Jung Chen , Chi-Feng Huang , Yi-Tsung Chen , Huei-Ren You , Jeng-Jen Li
IPC分类号： H01L23/495
CPC分类号： H01L23/49861 , H01L23/49548 , H01L24/16 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49175 , H01L2224/73265 , H01L2924/01013 , H01L2924/01019 , H01L2924/01079 , H01L2924/16152 , H01L2924/181 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2224/48145 , H01L2924/00012
摘要： An electronic element packaging module including a lead frame, an insulating layer and at least one electronic element is provided. The lead frame is a patterned metal sheet and has a first surface, a second surface opposite thereto and a through trench passing from the first surface to the second surface. A substrate portion and a plurality of lead portions around the substrate portion of the lead frame are defined by the through trench. The second surface of the lead frame is exposed outside the electronic element packaging module. The insulating layer disposed in the through trench has a third surface and a forth surface substantially coplanar with the first and the second surfaces, respectively. The electronic element disposed on the first surface is coupled to the lead frame.
摘要翻译： 提供了一种包括引线框架，绝缘层和至少一个电子元件的电子元件封装模块。 引线框架是图案化金属片，并且具有第一表面，与其相对的第二表面和从第一表面延伸到第二表面的通孔。 通过沟槽限定引线框架的基板部分周围的基板部分和多个引线部分。 引线框架的第二表面暴露在电子元件封装模块的外部。 布置在通孔中的绝缘层分别具有与第一表面和第二表面大致共面的第三表面和第四表面。 布置在第一表面上的电子元件连接到引线框架。
-
-
-
-
-
-
-
-
-
搜索结果
43 条记录 (耗时 0.071 秒)
