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39 条记录 (耗时 0.028 秒)

    CONDUCTING PASTE FOR DEVICE LEVEL INTERCONNECTS
    22.
    发明申请
    CONDUCTING PASTE FOR DEVICE LEVEL INTERCONNECTS 有权
    用于设备级互连的导电胶

    公开(公告)号：US20120069531A1

    公开(公告)日：2012-03-22

    申请号：US12884657

    申请日：2010-09-17

    申请人： Rabindra N. Das ,  Roy H. Magnuson ,  Mark D. Poliks ,  Voya R. Markovich

    发明人： Rabindra N. Das ,  Roy H. Magnuson ,  Mark D. Poliks ,  Voya R. Markovich

    IPC分类号： H05K7/00 ,  H01B1/02 ,  H01B1/22 ,  H01R43/00

    CPC分类号： H01B1/22 ,  H01L2224/81 ,  Y10T29/49117

    摘要： A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.

    摘要翻译： 导电糊和形成用于器件级互连的糊的方法。 导电浆料含有80-95％范围内的金属负载，可用于制造五微米器件级互连。 通过混合两种不同的导电浆料制成导电糊料，即使在最终固化后，每个糊料仍将其微量级独立富含区域保持在混合糊料中。 一种糊状物含有至少一种低熔点合金，另一种糊状物含有贵金属填料如金或银薄片。 通常，小于5微米的平均片尺寸适用于五微米互连。 然而，对于5微米互连，优选1微米或更小的银薄片和LMP混合物。 最终混合物中基于LMP的糊剂的量优选为20-50重量％。 纳米微膏实施例显示良好的电收率（81％）和低接触电阻。

    Circuitized substrate with internal cooling structure and electrical assembly utilizing same
    23.
    发明授权
    Circuitized substrate with internal cooling structure and electrical assembly utilizing same 失效
    具有内部冷却结构的电路化基板和利用其的电气组件

    公开(公告)号：US07738249B2

    公开(公告)日：2010-06-15

    申请号：US11976468

    申请日：2007-10-25

    申请人： Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

    发明人： Benson Chan ,  Frank D. Egitto ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  David L. Thomas

    IPC分类号： H05K7/20

    CPC分类号： H05K1/0206 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0061 ,  H05K3/44 ,  H05K2201/064 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T428/24917 ,  H01L2924/00

    摘要： An electrical assembly which includes a circuitized substrate including a first plurality of dielectric and electrically conductive circuit layers alternatively oriented in a stacked orientation, a thermal cooling structure bonded to one of the dielectric layers and at least one electrical component mounted on the circuitized substrate. The circuitized substrate includes a plurality of electrically conductive and thermally conductive thru-holes located therein, selected ones of the thermally conductive thru-holes thermally coupled to the electrical component(s) and extending through the first plurality of dielectric and electrically conductive circuit layers and being thermally coupled to the thermal cooling structure, each of these selected ones of thermally conductive thru-holes providing a thermal path from the electrical component to the thermal cooling structure during assembly operation. The thermal cooling structure is adapted for having cooling fluid pass there-through during operation of the assembly. A method of making the substrate is also provided.

    摘要翻译： 一种电气组件，其包括电路化衬底，其包括以层叠取向交替取向的第一多个电介质和导电电路层，结合到所述电介质层之一的热冷结构和安装在所述电路化衬底上的至少一个电气部件。 电路化衬底包括位于其中的多个导电和导热通孔，选择的导热通孔热耦合到电气部件并延伸穿过第一多个电介质和导电电路层，并且 热耦合到热冷却结构，这些选择的导热通孔中的每一个在组装操作期间提供从电气部件到热冷却结构的热路径。 热冷却结构适于在组件的操作期间使冷却流体通过。 还提供了制造基板的方法。

    Method of making circuitized substrate with internal optical pathway using photolithography
    26.
    发明申请
    Method of making circuitized substrate with internal optical pathway using photolithography 失效
    使用光刻法制造具有内部光学路径的电路化衬底的方法

    公开(公告)号：US20090093073A1

    公开(公告)日：2009-04-09

    申请号：US11907004

    申请日：2007-10-09

    申请人： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

    发明人： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

    IPC分类号： H01L21/77

    CPC分类号： G02B6/43 ,  G02B6/132 ,  G02B6/136 ,  H05K1/0274

    摘要： A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum. The formed substrate is capable of being both optically and electrically coupled to one or more other substrates possessing similar capabilities, thereby forming an electro-optical assembly of such substrates.

    摘要翻译： 一种制造电路化衬底（例如，PCB）的方法，其包括至少一个可能的几个内部光学路径作为其一部分，使得所得到的衬底将能够传输和/或接收电信号和光信号。 该方法包括在光学核心的一侧和相邻的直立构件之间形成至少一个开口，使得开口由至少一个角形侧壁限定。 通过光学芯材料（或从上方进入芯体）的光从该角形侧壁反射。 因此，开口内的介质（例如空气）由于其相对于相邻的光学芯材料的反射率而与反射介质一样起作用。 该方法利用了常规PCB制造中使用的许多工艺，从而将成本降至最低。 所形成的基底能够光学和电耦合到具有相似能力的一个或多个其它基底，从而形成这种基底的电光学组件。

    Method of making circuitized substrate with internal optical pathway
    27.
    发明申请
    Method of making circuitized substrate with internal optical pathway 有权
    制造具有内部光通路的电路化基板的方法

    公开(公告)号：US20090092353A1

    公开(公告)日：2009-04-09

    申请号：US11907006

    申请日：2007-10-09

    申请人： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

    发明人： Benson Chan ,  How T. Lin ,  Roy H. Magnuson ,  Voya R. Markovich ,  Mark D. Poliks

    IPC分类号： G02B6/122

    CPC分类号： G02B6/1221 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4246 ,  H05K1/0274

    摘要： A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.

    摘要翻译： 包括作为其一部分的内部光学路径的电路化衬底（例如，PCB），使得衬底能够传输和/或接收电信号和光信号。 衬底包括在一个包覆层上的角反射器，使得穿过光学核心的光信号将撞击角形反射器的成角度的反射表面，并通过开口（包括其中具有光学透明材料的一个）反射，例如 涉及另外还具有至少一个内部光学路径作为其一部分的第二电路化基板，从而光学地连接两个基板。 还提供了制造基板的方法。

    Electroless plating with bi-level control of dissolved oxygen, with specific location of chemical maintenance means
    30.
    发明授权
    Electroless plating with bi-level control of dissolved oxygen, with specific location of chemical maintenance means 失效
    化学镀具有双层控制溶解氧，具有化学维护方式的具体位置

    公开(公告)号：US4967690A

    公开(公告)日：1990-11-06

    申请号：US508510

    申请日：1990-04-12

    申请人： Edmond O. Fey ,  Peter Haselbauer ,  Dae Y. Jung ,  Ronald A. Kaschak ,  Hans-Dieter Kilthau ,  Roy H. Magnuson ,  Robert J. Wagner

    发明人： Edmond O. Fey ,  Peter Haselbauer ,  Dae Y. Jung ,  Ronald A. Kaschak ,  Hans-Dieter Kilthau ,  Roy H. Magnuson ,  Robert J. Wagner

    IPC分类号： C23C18/16 ,  C23C18/40 ,  H05K3/18

    CPC分类号： C23C18/40 ,  C23C18/1619 ,  C23C18/1682 ,  C23C18/1683 ,  H05K3/187

    摘要： Nodule formation in a continuous electroless copper plating system is minimized by independently controlling the dissolved oxygen contents on the plating solution in the bath and in the associated external piping. The level of dissolved oxygen in the plating tank is maintained at a value such that satisfactory plating takes place. At the point where the plating solution leaves the tank, additional oxygen gas is introducted into the solution so that the level of dissolved oxygen in the plating solution in the external piping is high enough to prevent any plating from taking place in the external piping and so that in the external piping the copper is etched or dissolved back into solution. At the end of the external piping, the dissolved oxygen level is reduced so that the dissolved oxygen level of the plating solution in the tank is maintained at the level where plating will take place.

    摘要翻译： 通过独立地控制浴中的镀液和相关的外部管道中的溶解氧含量，使连续化学镀铜系统中的结节形成最小化。 电镀槽中的溶解氧水平保持在这样的值，使得发生令人满意的电镀。 在电镀液离开槽的地方，另外的氧气被引入到溶液中，使得外部管道中的电镀溶液中的溶解氧水平足够高，以防止在外部管道中发生任何电镀 在外部管道中，铜被蚀刻或溶解回溶液中。 在外部管道的末端，溶解氧水平降低，使得罐中的电镀液的溶解氧水平保持在电镀的水平。