DISPLAY DEVICE, DISPLAY METHOD, AND COMPUTER PROGRAM
    22.
    发明申请
    DISPLAY DEVICE, DISPLAY METHOD, AND COMPUTER PROGRAM 审中-公开
    显示设备,显示方法和计算机程序

    公开(公告)号:US20120062580A1

    公开(公告)日:2012-03-15

    申请号:US13113436

    申请日:2011-05-23

    IPC分类号: G09G5/02

    摘要: A display device includes a first measurement unit measuring information on luminance of a first image signal to output a first measurement result, a second measurement unit measuring information on a luminance of a second image signal to output a second measurement result, a comparator comparing the first measurement result with the second measurement result to output differential data, a correction amount determination unit determining a correction amount for the first image signal and/or the second image signal based on the differential data, and a correction unit correcting the luminance of the first image signal and/or the second image signal based on the correction amount.

    摘要翻译: 显示装置包括测量第一图像信号的亮度信息以输出第一测量结果的第一测量单元,测量关于第二图像信号的亮度的信息以输出第二测量结果的第二测量单元,比较第一测量结果的比较器 测量结果与第二测量结果输出差分数据;校正量确定单元,基于差分数据确定第一图像信号和/或第二图像信号的校正量;以及校正单元,校正第一图像的亮度 信号和/或第二图像信号。

    Image processing apparatus, image processing method and program
    23.
    发明申请
    Image processing apparatus, image processing method and program 失效
    图像处理装置,图像处理方法和程序

    公开(公告)号:US20090009665A1

    公开(公告)日:2009-01-08

    申请号:US12214996

    申请日:2008-06-24

    IPC分类号: H04N5/202

    CPC分类号: H04N5/202 H04N9/045

    摘要: An image processing apparatus according to an embodiment of the present invention includes a correction interval setting unit for setting a correction interval; a correction interval dividing unit for dividing the correction interval into a black side interval and a white side interval; histogram calculating units for calculating a total number of luminance histograms of the black side interval and the white side interval, respectively; gain setting units for setting gains of a γ curve for raising the luminance and a γ curve for lowering the luminance, respectively; gamma curve generating units for generating a gamma curve for raising the luminance and a gamma curve for lowering the luminance, respectively; a gamma curve combining unit for combining the gamma curve for raising the luminance and the gamma curve for lowering the luminance; and a luminance conversion unit for performing the luminance conversion process using the combined gamma curve.

    摘要翻译: 根据本发明的实施例的图像处理装置包括:校正间隔设定单元,用于设定校正间隔; 校正间隔分割单元,用于将校正间隔分成黑色侧间隔和白色侧间隔; 用于计算黑色侧面间隔和白色侧面间隔的亮度直方图的总数的直方图计算单元; 用于设置用于提高亮度的伽马曲线的增益的增益设置单元和用于降低亮度的伽马曲线; 用于产生用于提高亮度的伽马曲线的伽马曲线生成单元和用于降低亮度的伽马曲线; 用于组合用于提高亮度的伽马曲线和用于降低亮度的伽马曲线的伽马曲线组合单元; 以及亮度转换单元,用于使用组合的伽马曲线来执行亮度转换处理。

    Multilayer interconnection structure including an alignment mark
    26.
    发明授权
    Multilayer interconnection structure including an alignment mark 失效
    多层互连结构包括对准标记

    公开(公告)号:US06677682B1

    公开(公告)日:2004-01-13

    申请号:US09620555

    申请日:2000-07-20

    IPC分类号: H01L23544

    摘要: An interlayer insulating film (21) is formed on a substrate (1), and a polysilicon layer (10) is formed on the interlayer insulating film (21). An interlayer insulating film (22) is formed to cover the polysilicon layer (10), and a polysilicon layer (11) is formed on the interlayer insulating film (22). An interlayer insulating film (23) is formed to cover the interlayer insulating film (22). A hole (20M) for a mark to constitute an alignment mark or the like is formed from a surface (23S) of the interlayer insulating film (23) to the polysilicon layer (11). The hole (20M) for a mark is larger than a contact hole formed from the surface (23S) to the substrate (1) but is shallower than the contact hole. Consequently, a concave portion corresponding to the hole (20M) for a mark is formed, with difficulty, on a silicon oxide layer to be subjected to CMP polishing and then become an interlayer insulting film (4). Therefore, it is possible to prevent a slurry from remaining in the concave portion. Thus, it is possible to obtain a semiconductor device having high reliability without a disadvantage such as a wiring disconnection or the like which is caused by the remaining or scattering of the slurry to be used for a CMP method.

    摘要翻译: 在基板(1)上形成层间绝缘膜(21),在层间绝缘膜(21)上形成多晶硅层(10)。 形成层间绝缘膜(22)以覆盖多晶硅层(10),并且在层间绝缘膜(22)上形成多晶硅层(11)。 形成层间绝缘膜(23)以覆盖层间绝缘膜(22)。 从层间绝缘膜(23)到多晶硅层(11)的表面(23S)形成用于构成对准标记等的标记的孔(20M)。 用于标记的孔(20M)大于从表面(23S)到基板(1)形成的接触孔,但是比接触孔浅。 因此,难以在氧化硅层上形成与用于标记的孔(20M)对应的凹部,进行CMP研磨后,成为层间绝缘膜(4)。 因此,可以防止浆料残留在凹部中。 因此,可以获得具有高可靠性的半导体器件,而没有由用于CMP方法的浆料的剩余或散射引起的诸如布线断开等的缺点。

    Stereoscopic video display method and apparatus, stereoscopic video system, and stereoscopic video forming method
    27.
    发明授权
    Stereoscopic video display method and apparatus, stereoscopic video system, and stereoscopic video forming method 失效
    立体视频显示方法和装置,立体视频系统和立体视频形成方法

    公开(公告)号:US06466255B1

    公开(公告)日:2002-10-15

    申请号:US09482086

    申请日:2000-01-13

    IPC分类号: H04H1300

    摘要: In a foreground/background discriminating circuit based on focusing, a leading edge of a boundary portion is detected from a video signal and a parallax control signal is outputted on the basis of the detected leading edge. Similarly, in foreground/background discriminating circuits based on color differences and based on a luminance, a chroma component and a luminance component of the video signal are detected and parallax control signals are generated on the basis of the detected chroma and luminance components, respectively. In a multiplier, the parallax control signals generated from the foreground/background discriminating circuits are multiplied. In a parallax limiting circuit, a delay amount control signal for a left video signal and a delay amount control signal for a right video signal are formed in a manner such that a binocular parallax amount lies within a predetermined value and within a range of an amount such that the existence of the parallax is recognized clearly.

    摘要翻译: 在基于聚焦的前景/背景鉴别电路中,根据视频信号检测边界部分的前沿,并且基于检测到的前沿输出视差控制信号。 类似地,在基于色差和基于亮度的前景/背景识别电路中,检测视频信号的色度分量和亮度分量,并且基于检测到的色度和亮度分量生成视差控制信号。 在乘法器中,将从前景/背景识别电路产生的视差控制信号相乘。 在视差限制电路中,形成用于左视频信号的延迟量控制信号和用于右视频信号的延迟量控制信号,使得双目视差量位于预定值内并在量的范围内 使得视差的存在被清楚地识别。

    Semiconductor integrated circuit interconnection structures
    29.
    发明授权
    Semiconductor integrated circuit interconnection structures 失效
    半导体集成电路互连结构

    公开(公告)号:US5712509A

    公开(公告)日:1998-01-27

    申请号:US873015

    申请日:1992-04-24

    摘要: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in the first electrically conducting interconnection layer proximate the through-hole extending to the first electrically insulating layer and filled with part of the second electrically insulating layer, constraining current flowing between the first and second electrically conducting interconnection layers to flow around the current barrier.

    摘要翻译: 半导体集成电路结构包括半导体衬底; 设置在所述基板中的电子元件; 设置在所述基板和所述电子元件上的第一电绝缘层; 电连接到所述电子元件并且至少部分地设置在所述第一电绝缘层上的第一导电互连层; 设置在所述第一导电互连层上的第二电绝缘层; 设置在所述第二电绝缘层上的第二导电互连层; 以及穿过所述第二电绝缘层到所述第一导电互连层的通孔,所述第二互连层的一部分设置在所述通孔内并与所述第一导电互连层接触,其中所述第一导电互连层包括电流 阻挡层,包括靠近通孔延伸到第一电绝缘层的第一导电互连层中的至少一个开口,并填充有第二电绝缘层的一部分,约束在第一和第二导电互连层之间流动的电流流动 围绕当前的障碍。