公开(公告)号：US20140291868A1

公开(公告)日：2014-10-02

申请号：US14148717

申请日：2014-01-06

申请人： JIN-HO LEE ,  HEE-SEOK LEE ,  SE-HO YOU ,  JEONG-OH HA

发明人： JIN-HO LEE ,  HEE-SEOK LEE ,  SE-HO YOU ,  JEONG-OH HA

IPC分类号： H01L23/00

CPC分类号： H01L25/105 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/13101 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13169 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45171 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48601 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48701 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48801 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2224/85401 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/19106 ,  H05K1/0271 ,  H05K3/284 ,  H05K2201/09136 ,  H05K2201/09909 ,  H05K2201/10734 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A stack type semiconductor package includes a lower semiconductor package including a lower package substrate and at least one lower semiconductor chip disposed on the lower package substrate; an upper semiconductor package including an upper package substrate larger than the lower package substrate and at least one upper semiconductor chip disposed on the upper package substrate; an inter-package connector connecting an upper surface of the lower package substrate to a lower surface of the upper package substrate; and a filler filling in between the lower package substrate and the upper package substrate while substantially surrounding the inter-package connector.

摘要翻译： 堆叠型半导体封装包括下半导体封装，其包括下封装衬底和设置在下封装衬底上的至少一个下半导体芯片; 上半导体封装，包括比下封装衬底大的上封装衬底和设置在上封装衬底上的至少一个上半导体芯片; 将所述下封装基板的上表面连接到所述上封装基板的下表面的封装间连接器; 以及填充在下封装基板和上封装基板之间的填料，同时基本上围绕封装间连接器。

公开(公告)号：US20140285979A1

公开(公告)日：2014-09-25

申请号：US13849580

申请日：2013-03-25

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Bruce J. Chamberlin ,  Joseph P. Kuczynski ,  Paula M. Nixa

IPC分类号： H05K1/02

CPC分类号： H05K3/4611 ,  H05K2201/09136 ,  H05K2203/068

摘要： A printed circuit board and method of manufacturing same, the printed circuit board comprising a stack of layers. The stack of layers being comprised of alternating circuit layers and insulating layers that are laminated together. The stack of layers includes an area with resin cured to a degree. The area has a coefficient of thermal expansion that is dependent, at least in part, on the degree of curing of the resin.

摘要翻译： 一种印刷电路板及其制造方法，所述印刷电路板包括一叠层。 层叠层由层叠在一起的交替电路层和绝缘层组成。 层叠层包括一定程度固化的树脂区域。 该区域的热膨胀系数至少部分地取决于树脂的固化程度。

公开(公告)号：US20140268603A1

公开(公告)日：2014-09-18

申请号：US13796453

申请日：2013-03-12

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Mark K. Hoffmeyer ,  Amanda E. Mikhail ,  Arvind K. Sinha

IPC分类号： G06F17/50 ,  H05K1/18

CPC分类号： H05K1/0271 ,  G01R31/26 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5081 ,  G06F2217/12 ,  G06F2217/14 ,  G06F2217/38 ,  G06F2217/40 ,  G06F2217/80 ,  H05K1/11 ,  H05K1/181 ,  H05K3/3436 ,  H05K3/3494 ,  H05K2201/09136 ,  H05K2201/10734 ,  Y02P70/613

摘要： A method for designing structures with complimentary dynamic warp characteristics for attachment of a component to a PC board is disclosed. The method may include determining characteristics of thermally induced dynamic warp of the PC board and of the first component, analyzing and comparing differences between the dynamic warp characteristics of the PC board and the first component and selecting design modifications to match PC board and the first component dynamic warp characteristics. Selecting design modifications may include determining if the first component dynamic warp characteristics can be changed, determining if matching the dynamic warp characteristics of the PC board and the first component can be achieved by modifying the design of at least one of the PC board and the first component. The result of the method may be modified dynamic warp characteristics of at least one of the PC board and the first component.

摘要翻译： 公开了一种用于设计具有用于将部件附接到PC板的具有互补的动态翘曲特性的结构的方法。 该方法可以包括确定PC板和第一部件的热诱导的动态翘曲的特性，分析和比较PC板和第一部件的动态翘曲特性之间的差异，并且选择设计修改以匹配PC板和第一部件 动态翘曲特性。 选择设计修改可以包括确定是否可以改变第一分量动态翘曲特性，确定是否通过修改PC板和第一组件中的至少一个的设计来实现PC板和第一组件的动态翘曲特性是否匹配 零件。 该方法的结果可以是改变PC板和第一部件中的至少一个的动态翘曲特性。

公开(公告)号：US20140182889A1

公开(公告)日：2014-07-03

申请号：US14061160

申请日：2013-10-23

申请人： SAMSUNG ELECTRO-MECHANICS CO., LTD.

发明人： Yee Na SHIN ,  Seung Eun Lee ,  Yul Kyo Chung ,  Doo Hwan Lee

IPC分类号： H05K1/02 ,  H05K1/11

CPC分类号： H05K3/4673 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/0154 ,  H05K2201/029 ,  H05K2201/09136

摘要： Disclosed herein is a multilayered substrate including: a second insulating layer having a fine pattern layer formed on an upper surface thereof; and a third insulating layer having a circuit pattern layer formed on an upper surface thereof and formed of a material different from the second insulating layer, the circuit pattern layer having a pattern pitch larger than that of the fine pattern layer, thereby making it possible to solve a warpage problem and perform refinement and improvement in a degree of integration of an inner wiring.

摘要翻译： 本文公开了一种多层基板，包括：在其上表面上形成有精细图案层的第二绝缘层; 以及第三绝缘层，其具有形成在其上表面上并且由与第二绝缘层不同的材料形成的电路图案层，该电路图案层具有比精细图案层的间距大的图案间距，从而使得可以 解决翘曲问题，并且在内部布线的集成度方面进行细化和改进。

公开(公告)号：US20140116755A1

公开(公告)日：2014-05-01

申请号：US13663250

申请日：2012-10-29

申请人： KINSUS INTERCONNECT TECHNOLOGY CORP.

发明人： Ting-Hao Lin ,  Yu-Te Lu ,  De-Hao Lu

IPC分类号： H05K1/02

CPC分类号： H05K1/0271 ,  H05K3/4682 ,  H05K2201/09136 ,  H05K2201/2018

摘要： A laminate circuit board structure which includes a first circuit metal layer, a first insulation layer, at least one second circuit metal layer, at least one second insulation layer and a support frame is disclosed. The total thickness of the laminate circuit board structure is less than 150 μm. The support frame provided at the outer edge of the co-plane surface formed by the first circuit metal layer and the first insulation layer does not cover the first circuit metal layer, and is formed of at least one metal material. The support frame provides physical support for the entire board structure without influence on the circuit connection so as to prevent the laminate circuit board structure from warping.

摘要翻译： 公开了一种层叠电路板结构，其包括第一电路金属层，第一绝缘层，至少一个第二电路金属层，至少一个第二绝缘层和支撑框架。 叠层电路板结构的总厚度小于150μm。 设置在由第一电路金属层和第一绝缘层形成的共面的外边缘处的支撑框架不覆盖第一电路金属层，并且由至少一种金属材料形成。 支撑框架为整个板结构提供物理支撑，而不影响电路连接，从而防止层压电路板结构翘曲。

公开(公告)号：US20140083746A1

公开(公告)日：2014-03-27

申请号：US14039895

申请日：2013-09-27

申请人： IBIDEN CO., LTD.

发明人： Satoshi WATANABE

IPC分类号： H05K1/02 ,  H05K3/00

CPC分类号： H05K1/0298 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K3/00 ,  H05K3/4602 ,  H05K3/4655 ,  H05K2201/029 ,  H05K2201/09136 ,  H01L2924/00

摘要： A printed wiring board includes multiple insulating layers laminated on each other and each including resin and core, the insulating layers having first-surface sides and second-surface sides on the opposite side, respectively, and including multiple first insulating and second insulating layers, multiple first-surface-side conductive layers formed on the first-surface sides of the first insulating layers, respectively, multiple second-surface-side conductive layers formed on the second-surface sides of the second insulating layers, respectively. The insulating layers include one or more insulating layer having the core positioned such that the core is shifted toward the first-surface side from the center in the thickness direction, the insulating layers include a central insulating layer positioned in the center of the insulating layers, and the first-surface-side and second-surface-side conductive layers are formed such that the first-surface side conductive layers have the total area which is set smaller than the total area of the second-surface-side conductive layers.

摘要翻译： 印刷电路板包括彼此层叠的各绝缘层，各绝缘层各自包括树脂和芯，绝缘层分别具有相反侧的第一表面侧和第二表面侧，并且包括多个第一绝缘和第二绝缘层，多个绝缘层 分别形成在第一绝缘层的第一表面侧上的第一表面侧导电层分别形成在第二绝缘层的第二表面侧上的多个第二表面侧导电层。 所述绝缘层包括一个或多个绝缘层，所述绝缘层具有定位成使得所述芯从所述厚度方向的中心向所述第一表面侧移位，所述绝缘层包括位于所述绝缘层的中心的中心绝缘层， 并且第一表面侧和第二表面侧导电层形成为使得第一表面侧导电层的总面积设定为小于第二表面侧导电层的总面积。

公开(公告)号：US20140057131A1

公开(公告)日：2014-02-27

申请号：US14006546

申请日：2011-03-29

申请人： Hideyo Osanai ,  Takayuki Takahashi ,  Satoru Ideguchi ,  Hirotaka Kotani

发明人： Hideyo Osanai ,  Takayuki Takahashi ,  Satoru Ideguchi ,  Hirotaka Kotani

IPC分类号： H05K1/05 ,  B22D19/00 ,  B22D19/04

CPC分类号： H05K1/053 ,  B22D19/0081 ,  B22D19/04 ,  H01L21/481 ,  H01L21/4871 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/0061 ,  H05K3/022 ,  H05K2201/09136 ,  H05K2201/2009 ,  H05K2203/128 ,  Y10T428/12618 ,  Y10T428/2457 ,  Y10T428/2462 ,  Y10T428/24942 ,  H01L2924/00

摘要： A metal/ceramic bonding substrate includes: a ceramic substrate; a metal plate bonded directly to one side of the ceramic substrate; a metal base plate bonded directly to the other side of the ceramic substrate; and a reinforcing member having a higher strength than that of the metal base plate, the reinforcing member being arranged so as to extend from one of both end faces of the metal base plate to the other end face thereof without interrupting that the metal base plate extends between a bonded surface of the metal base plate to the ceramic substrate and the opposite surface thereof.

摘要翻译： 金属/陶瓷接合基板包括：陶瓷基板; 直接结合在陶瓷基板的一侧的金属板; 金属基板直接结合到陶瓷基板的另一侧; 所述加强构件具有比所述金属基板高的强度，所述加强构件被布置成从所述金属基板的两个端面之一延伸到所述另一端面，而不会中断所述金属基板延伸 在金属基板与陶瓷基板的接合面与其相对面之间。

公开(公告)号：US20130186677A1

公开(公告)日：2013-07-25

申请号：US13788916

申请日：2013-03-07

申请人： Jong-Jin LEE

发明人： Jong-Jin LEE

IPC分类号： H05K3/00 ,  H05K1/02

CPC分类号： H05K3/0058 ,  H05K1/0271 ,  H05K3/022 ,  H05K3/382 ,  H05K2201/0352 ,  H05K2201/0355 ,  H05K2201/09136 ,  Y10T29/49124

摘要： A printed circuit board and a method of manufacturing the printed circuit board are disclosed. In an embodiment of the present invention, the method of manufacturing a printed circuit board can include: providing a pair of conductive layers, in which roughness of one surface of one of the pair of conductive layers is different from roughness of one surface of the other of the pair of conductive layers; and stacking the pair of the conductive layers on a dielectric layer such that one surface of one of the pair of conductive layers faces one surface of the dielectric layer and one surface of the other of the pair of conductive layers faces another surface of the dielectric layer.

摘要翻译： 公开了印刷电路板和印刷电路板的制造方法。 在本发明的实施例中，制造印刷电路板的方法可以包括：提供一对导电层，其中一对导电层之一的一个表面的粗糙度与另一个导电层的一个表面的粗糙度不同 的一对导电层; 并且将所述一对导电层堆叠在电介质层上，使得所述一对导电层中的一个导电层的一个表面面对所述电介质层的一个表面，并且所述一对导电层中另一个表面的一个表面面向所述电介质层的另一个表面 。

公开(公告)号：US08450617B2

公开(公告)日：2013-05-28

申请号：US13288497

申请日：2011-11-03

申请人： Shinnosuke Maeda

发明人： Shinnosuke Maeda

IPC分类号： H05K1/03

CPC分类号： H05K3/4682 ,  H01L23/49822 ,  H01L2924/0002 ,  H05K2201/0191 ,  H05K2201/0352 ,  H05K2201/09136 ,  H01L2924/00

摘要： A multilayer wiring substrate has a main face and a back face, and a configuration in which a plurality of resin insulation layers and a plurality of conductor layers are laminated. A plurality of conductor layers provided on the side toward the back face in relation to a resin insulation layer serving as a center layer are formed such that the average of their area ratios becomes greater than the average of area ratios of a plurality of conductor layers provided on the side toward the main face in relation to the center layer. A plurality of resin insulation layers provided on the side toward the back face are formed such that the average of their thicknesses becomes greater than the average of thicknesses of a plurality of resin insulation layers provided on the side toward the main face.

摘要翻译： 多层布线基板具有主面和背面，以及层叠有多个树脂绝缘层和多个导体层的结构。 形成相对于作为中心层的树脂绝缘层在背面侧设置的多个导体层，使得它们的面积比的平均值大于设置的多个导体层的面积比的平均值 在相对于中心层的主面侧。 形成在背面侧的多个树脂绝缘层，使得其厚度的平均值大于设置在朝向主面的一侧的多个树脂绝缘层的厚度的平均值。

公开(公告)号：US20130069250A1

公开(公告)日：2013-03-21

申请号：US13671727

申请日：2012-11-08

申请人： Roden Topacio ,  Adam Zbrzezny

发明人： Roden Topacio ,  Adam Zbrzezny

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L23/3128 ,  H01L23/16 ,  H01L23/562 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/3452 ,  H05K3/3457 ,  H05K2201/09136 ,  H05K2201/09781 ,  H05K2203/043 ,  H01L2924/014 ,  H01L2924/00014

摘要： Various semiconductor chip package substrates with reinforcement and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a package substrate that has a first side and a second side opposite to the first side. The first side has a central area adapted to receive a semiconductor chip. A solder reinforcement structure is formed on the first side of the package substrate outside of the central area to resist bending of the package substrate.

摘要翻译： 公开了具有增强的各种半导体芯片封装基板及其制造方法。 一方面，提供一种制造方法，其包括提供具有第一侧和与第一侧相对的第二侧的封装基板。 第一侧具有适于接收半导体芯片的中心区域。 在中心区域外部的封装基板的第一侧上形成焊料增强结构，以抵抗封装基板的弯曲。